Lines Matching full:g
255 const struct tegra_pingroup *g;
259 g = &pmx->soc->groups[group];
261 if (WARN_ON(g->mux_reg < 0))
264 for (i = 0; i < ARRAY_SIZE(g->funcs); i++) {
265 if (g->funcs[i] == function)
268 if (WARN_ON(i == ARRAY_SIZE(g->funcs)))
271 val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
272 val &= ~(0x3 << g->mux_bit);
273 val |= i << g->mux_bit;
276 val |= (1 << g->sfsel_bit);
277 pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
401 const struct tegra_pingroup *g,
408 *bank = g->pupd_bank;
409 *reg = g->pupd_reg;
410 *bit = g->pupd_bit;
414 *bank = g->tri_bank;
415 *reg = g->tri_reg;
416 *bit = g->tri_bit;
420 *bank = g->mux_bank;
421 *reg = g->mux_reg;
422 *bit = g->einput_bit;
426 *bank = g->mux_bank;
427 *reg = g->mux_reg;
428 *bit = g->odrain_bit;
432 *bank = g->mux_bank;
433 *reg = g->mux_reg;
434 *bit = g->lock_bit;
438 *bank = g->mux_bank;
439 *reg = g->mux_reg;
440 *bit = g->ioreset_bit;
444 *bank = g->mux_bank;
445 *reg = g->mux_reg;
446 *bit = g->rcv_sel_bit;
451 *bank = g->mux_bank;
452 *reg = g->mux_reg;
454 *bank = g->drv_bank;
455 *reg = g->drv_reg;
457 *bit = g->hsm_bit;
462 *bank = g->mux_bank;
463 *reg = g->mux_reg;
465 *bank = g->drv_bank;
466 *reg = g->drv_reg;
468 *bit = g->schmitt_bit;
472 *bank = g->drv_bank;
473 *reg = g->drv_reg;
474 *bit = g->lpmd_bit;
478 *bank = g->drv_bank;
479 *reg = g->drv_reg;
480 *bit = g->drvdn_bit;
481 *width = g->drvdn_width;
484 *bank = g->drv_bank;
485 *reg = g->drv_reg;
486 *bit = g->drvup_bit;
487 *width = g->drvup_width;
490 *bank = g->drv_bank;
491 *reg = g->drv_reg;
492 *bit = g->slwf_bit;
493 *width = g->slwf_width;
496 *bank = g->drv_bank;
497 *reg = g->drv_reg;
498 *bit = g->slwr_bit;
499 *width = g->slwr_width;
503 *bank = g->mux_bank;
504 *reg = g->mux_reg;
506 *bank = g->drv_bank;
507 *reg = g->drv_reg;
509 *bit = g->drvtype_bit;
514 *bank = g->mux_bank;
515 *reg = g->mux_reg;
516 *bit = g->sfsel_bit;
541 param, prop, g->name);
570 const struct tegra_pingroup *g;
576 g = &pmx->soc->groups[group];
578 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit,
599 const struct tegra_pingroup *g;
605 g = &pmx->soc->groups[group];
611 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit,
667 const struct tegra_pingroup *g;
673 g = &pmx->soc->groups[group];
676 ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false,
689 if (g->mux_reg >= 0) {
691 val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
692 val = g->funcs[(val >> g->mux_bit) & 0x3];
733 const struct tegra_pingroup *g;
737 g = &pmx->soc->groups[i];
738 if (g->parked_bitmask > 0) {
741 if (g->mux_reg != -1) {
742 bank = g->mux_bank;
743 reg = g->mux_reg;
745 bank = g->drv_bank;
746 reg = g->drv_reg;
750 val &= ~g->parked_bitmask;
871 const struct tegra_pingroup *g = &pmx->soc->groups[gn];
873 if (g->mux_reg == -1)
877 if (g->funcs[gfn] == fn)
884 *group_pins++ = g->name;