66 static u32 sunxi_bank_offset(const struct sunxi_pinctrl *pctl, u32 pin)  in sunxi_bank_offset()  argument
75 	return offset + (pin / PINS_PER_BANK) * pctl->bank_mem_size;  in sunxi_bank_offset()
78 static void sunxi_mux_reg(const struct sunxi_pinctrl *pctl,  in sunxi_mux_reg()  argument
83 	*reg   = sunxi_bank_offset(pctl, pin) + MUX_REGS_OFFSET +  in sunxi_mux_reg()
89 static void sunxi_data_reg(const struct sunxi_pinctrl *pctl,  in sunxi_data_reg()  argument
94 	*reg   = sunxi_bank_offset(pctl, pin) + DATA_REGS_OFFSET +  in sunxi_data_reg()
100 static void sunxi_dlevel_reg(const struct sunxi_pinctrl *pctl,  in sunxi_dlevel_reg()  argument
103 	u32 offset = pin % PINS_PER_BANK * pctl->dlevel_field_width;  in sunxi_dlevel_reg()
105 	*reg   = sunxi_bank_offset(pctl, pin) + DLEVEL_REGS_OFFSET +  in sunxi_dlevel_reg()
108 	*mask  = (BIT(pctl->dlevel_field_width) - 1) << *shift;  in sunxi_dlevel_reg()
111 static void sunxi_pull_reg(const struct sunxi_pinctrl *pctl,  in sunxi_pull_reg()  argument
116 	*reg   = sunxi_bank_offset(pctl, pin) + pctl->pull_regs_offset +  in sunxi_pull_reg()
123 sunxi_pinctrl_find_group_by_name(struct sunxi_pinctrl *pctl, const char *group)  in sunxi_pinctrl_find_group_by_name()  argument
127 	for (i = 0; i < pctl->ngroups; i++) {  in sunxi_pinctrl_find_group_by_name()
128 		struct sunxi_pinctrl_group *grp = pctl->groups + i;  in sunxi_pinctrl_find_group_by_name()
138 sunxi_pinctrl_find_function_by_name(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_find_function_by_name()  argument
141 	struct sunxi_pinctrl_function *func = pctl->functions;  in sunxi_pinctrl_find_function_by_name()
144 	for (i = 0; i < pctl->nfunctions; i++) {  in sunxi_pinctrl_find_function_by_name()
156 sunxi_pinctrl_desc_find_function_by_name(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_desc_find_function_by_name()  argument
162 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_desc_find_function_by_name()
163 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_desc_find_function_by_name()
171 					func->variant & pctl->variant))  in sunxi_pinctrl_desc_find_function_by_name()
183 sunxi_pinctrl_desc_find_function_by_pin(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_desc_find_function_by_pin()  argument
189 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_desc_find_function_by_pin()
190 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_desc_find_function_by_pin()
209 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pctrl_get_groups_count()  local
211 	return pctl->ngroups;  in sunxi_pctrl_get_groups_count()
217 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pctrl_get_group_name()  local
219 	return pctl->groups[group].name;  in sunxi_pctrl_get_group_name()
227 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pctrl_get_group_pins()  local
229 	*pins = (unsigned *)&pctl->groups[group].pin;  in sunxi_pctrl_get_group_pins()
405 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pctrl_dt_node_to_map()  local
418 		dev_err(pctl->dev, "missing function property in node %pOFn\n",  in sunxi_pctrl_dt_node_to_map()
425 		dev_err(pctl->dev, "missing pins property in node %pOFn\n",  in sunxi_pctrl_dt_node_to_map()
450 			sunxi_pinctrl_find_group_by_name(pctl, group);  in sunxi_pctrl_dt_node_to_map()
453 			dev_err(pctl->dev, "unknown pin %s", group);  in sunxi_pctrl_dt_node_to_map()
457 		if (!sunxi_pinctrl_desc_find_function_by_name(pctl,  in sunxi_pctrl_dt_node_to_map()
460 			dev_err(pctl->dev, "unsupported function %s on pin %s",  in sunxi_pctrl_dt_node_to_map()
532 static int sunxi_pconf_reg(const struct sunxi_pinctrl *pctl,  in sunxi_pconf_reg()  argument
538 		sunxi_dlevel_reg(pctl, pin, reg, shift, mask);  in sunxi_pconf_reg()
544 		sunxi_pull_reg(pctl, pin, reg, shift, mask);  in sunxi_pconf_reg()
557 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pconf_get()  local
563 	pin -= pctl->desc->pin_base;  in sunxi_pconf_get()
565 	ret = sunxi_pconf_reg(pctl, pin, param, &reg, &shift, &mask);  in sunxi_pconf_get()
569 	val = (readl(pctl->membase + reg) & mask) >> shift;  in sunxi_pconf_get()
609 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pconf_group_get()  local
610 	struct sunxi_pinctrl_group *g = &pctl->groups[group];  in sunxi_pconf_group_get()
619 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pconf_set()  local
622 	pin -= pctl->desc->pin_base;  in sunxi_pconf_set()
633 		ret = sunxi_pconf_reg(pctl, pin, param, &reg, &shift, &mask);  in sunxi_pconf_set()
669 		raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pconf_set()
670 		writel((readl(pctl->membase + reg) & ~mask) | val << shift,  in sunxi_pconf_set()
671 		       pctl->membase + reg);  in sunxi_pconf_set()
672 		raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pconf_set()
681 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pconf_group_set()  local
682 	struct sunxi_pinctrl_group *g = &pctl->groups[group];  in sunxi_pconf_group_set()
696 static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_set_io_bias_cfg()  argument
705 	if (!pctl->desc->io_bias_cfg_variant)  in sunxi_pinctrl_set_io_bias_cfg()
716 	pin -= pctl->desc->pin_base;  in sunxi_pinctrl_set_io_bias_cfg()
719 	switch (pctl->desc->io_bias_cfg_variant) {  in sunxi_pinctrl_set_io_bias_cfg()
736 		reg = readl(pctl->membase + sunxi_grp_config_reg(pin));  in sunxi_pinctrl_set_io_bias_cfg()
738 		writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin));  in sunxi_pinctrl_set_io_bias_cfg()
743 		raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_set_io_bias_cfg()
744 		reg = readl(pctl->membase + pctl->pow_mod_sel_offset +  in sunxi_pinctrl_set_io_bias_cfg()
747 		writel(reg | val, pctl->membase + pctl->pow_mod_sel_offset +  in sunxi_pinctrl_set_io_bias_cfg()
749 		raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_set_io_bias_cfg()
755 		raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_set_io_bias_cfg()
756 		reg = readl(pctl->membase + pctl->pow_mod_sel_offset);  in sunxi_pinctrl_set_io_bias_cfg()
759 		       pctl->membase + pctl->pow_mod_sel_offset);  in sunxi_pinctrl_set_io_bias_cfg()
760 		raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_set_io_bias_cfg()
769 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_get_funcs_cnt()  local
771 	return pctl->nfunctions;  in sunxi_pmx_get_funcs_cnt()
777 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_get_func_name()  local
779 	return pctl->functions[function].name;  in sunxi_pmx_get_func_name()
787 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_get_func_groups()  local
789 	*groups = pctl->functions[function].groups;  in sunxi_pmx_get_func_groups()
790 	*num_groups = pctl->functions[function].ngroups;  in sunxi_pmx_get_func_groups()
799 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_set()  local
803 	pin -= pctl->desc->pin_base;  in sunxi_pmx_set()
804 	sunxi_mux_reg(pctl, pin, &reg, &shift, &mask);  in sunxi_pmx_set()
806 	raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pmx_set()
808 	writel((readl(pctl->membase + reg) & ~mask) | config << shift,  in sunxi_pmx_set()
809 	       pctl->membase + reg);  in sunxi_pmx_set()
811 	raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pmx_set()
818 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_set_mux()  local
819 	struct sunxi_pinctrl_group *g = pctl->groups + group;  in sunxi_pmx_set_mux()
820 	struct sunxi_pinctrl_function *func = pctl->functions + function;  in sunxi_pmx_set_mux()
822 		sunxi_pinctrl_desc_find_function_by_name(pctl,  in sunxi_pmx_set_mux()
840 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_gpio_set_direction()  local
849 	desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, offset, func);  in sunxi_pmx_gpio_set_direction()
860 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_request()  local
862 	unsigned short bank_offset = bank - pctl->desc->pin_base /  in sunxi_pmx_request()
864 	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];  in sunxi_pmx_request()
869 	if (WARN_ON_ONCE(bank_offset >= ARRAY_SIZE(pctl->regulators)))  in sunxi_pmx_request()
878 	reg = regulator_get(pctl->dev, supply);  in sunxi_pmx_request()
880 		return dev_err_probe(pctl->dev, PTR_ERR(reg),  in sunxi_pmx_request()
886 		dev_err(pctl->dev,  in sunxi_pmx_request()
891 	sunxi_pinctrl_set_io_bias_cfg(pctl, offset, reg);  in sunxi_pmx_request()
906 	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in sunxi_pmx_free()  local
908 	unsigned short bank_offset = bank - pctl->desc->pin_base /  in sunxi_pmx_free()
910 	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];  in sunxi_pmx_free()
936 	struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);  in sunxi_pinctrl_gpio_direction_input()  local
938 	return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL,  in sunxi_pinctrl_gpio_direction_input()
944 	struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);  in sunxi_pinctrl_gpio_get()  local
945 	bool set_mux = pctl->desc->irq_read_needs_mux &&  in sunxi_pinctrl_gpio_get()
950 	sunxi_data_reg(pctl, offset, &reg, &shift, &mask);  in sunxi_pinctrl_gpio_get()
953 		sunxi_pmx_set(pctl->pctl_dev, pin, SUN4I_FUNC_INPUT);  in sunxi_pinctrl_gpio_get()
955 	val = (readl(pctl->membase + reg) & mask) >> shift;  in sunxi_pinctrl_gpio_get()
958 		sunxi_pmx_set(pctl->pctl_dev, pin, SUN4I_FUNC_IRQ);  in sunxi_pinctrl_gpio_get()
966 	struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);  in sunxi_pinctrl_gpio_set()  local
970 	sunxi_data_reg(pctl, offset, &reg, &shift, &mask);  in sunxi_pinctrl_gpio_set()
972 	raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_gpio_set()
974 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_gpio_set()
981 	writel(val, pctl->membase + reg);  in sunxi_pinctrl_gpio_set()
983 	raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_gpio_set()
991 	struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);  in sunxi_pinctrl_gpio_direction_output()  local
994 	return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL,  in sunxi_pinctrl_gpio_direction_output()
1018 	struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);  in sunxi_pinctrl_gpio_to_irq()  local
1020 	unsigned pinnum = pctl->desc->pin_base + offset;  in sunxi_pinctrl_gpio_to_irq()
1026 	desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pinnum, "irq");  in sunxi_pinctrl_gpio_to_irq()
1035 	return irq_find_mapping(pctl->domain, irqnum);  in sunxi_pinctrl_gpio_to_irq()
1040 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_request_resources()  local
1044 	func = sunxi_pinctrl_desc_find_function_by_pin(pctl,  in sunxi_pinctrl_irq_request_resources()
1045 					pctl->irq_array[d->hwirq], "irq");  in sunxi_pinctrl_irq_request_resources()
1049 	ret = gpiochip_lock_as_irq(pctl->chip,  in sunxi_pinctrl_irq_request_resources()
1050 			pctl->irq_array[d->hwirq] - pctl->desc->pin_base);  in sunxi_pinctrl_irq_request_resources()
1052 		dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n",  in sunxi_pinctrl_irq_request_resources()
1058 	sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq], func->muxval);  in sunxi_pinctrl_irq_request_resources()
1065 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_release_resources()  local
1067 	gpiochip_unlock_as_irq(pctl->chip,  in sunxi_pinctrl_irq_release_resources()
1068 			      pctl->irq_array[d->hwirq] - pctl->desc->pin_base);  in sunxi_pinctrl_irq_release_resources()
1073 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_set_type()  local
1074 	u32 reg = sunxi_irq_cfg_reg(pctl->desc, d->hwirq);  in sunxi_pinctrl_irq_set_type()
1100 	raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_irq_set_type()
1109 	regval = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_set_type()
1111 	writel(regval | (mode << index), pctl->membase + reg);  in sunxi_pinctrl_irq_set_type()
1113 	raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_irq_set_type()
1120 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_ack()  local
1121 	u32 status_reg = sunxi_irq_status_reg(pctl->desc, d->hwirq);  in sunxi_pinctrl_irq_ack()
1125 	writel(1 << status_idx, pctl->membase + status_reg);  in sunxi_pinctrl_irq_ack()
1130 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_mask()  local
1131 	u32 reg = sunxi_irq_ctrl_reg(pctl->desc, d->hwirq);  in sunxi_pinctrl_irq_mask()
1136 	raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_irq_mask()
1139 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_mask()
1140 	writel(val & ~(1 << idx), pctl->membase + reg);  in sunxi_pinctrl_irq_mask()
1142 	raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_irq_mask()
1147 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_unmask()  local
1148 	u32 reg = sunxi_irq_ctrl_reg(pctl->desc, d->hwirq);  in sunxi_pinctrl_irq_unmask()
1153 	raw_spin_lock_irqsave(&pctl->lock, flags);  in sunxi_pinctrl_irq_unmask()
1156 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_unmask()
1157 	writel(val | (1 << idx), pctl->membase + reg);  in sunxi_pinctrl_irq_unmask()
1159 	raw_spin_unlock_irqrestore(&pctl->lock, flags);  in sunxi_pinctrl_irq_unmask()
1170 	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);  in sunxi_pinctrl_irq_set_wake()  local
1173 	return irq_set_irq_wake(pctl->irq[bank], on);  in sunxi_pinctrl_irq_set_wake()
1213 	struct sunxi_pinctrl *pctl = d->host_data;  in sunxi_pinctrl_irq_of_xlate()  local
1221 	pin = pctl->desc->pin_base + base + intspec[1];  in sunxi_pinctrl_irq_of_xlate()
1223 	desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pin, "irq");  in sunxi_pinctrl_irq_of_xlate()
1241 	struct sunxi_pinctrl *pctl = irq_desc_get_handler_data(desc);  in sunxi_pinctrl_irq_handler()  local
1244 	for (bank = 0; bank < pctl->desc->irq_banks; bank++)  in sunxi_pinctrl_irq_handler()
1245 		if (irq == pctl->irq[bank])  in sunxi_pinctrl_irq_handler()
1248 	WARN_ON(bank == pctl->desc->irq_banks);  in sunxi_pinctrl_irq_handler()
1252 	reg = sunxi_irq_status_reg_from_bank(pctl->desc, bank);  in sunxi_pinctrl_irq_handler()
1253 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_handler()
1259 			generic_handle_domain_irq(pctl->domain,  in sunxi_pinctrl_irq_handler()
1266 static int sunxi_pinctrl_add_function(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_add_function()  argument
1269 	struct sunxi_pinctrl_function *func = pctl->functions;  in sunxi_pinctrl_add_function()
1283 	pctl->nfunctions++;  in sunxi_pinctrl_add_function()
1290 	struct sunxi_pinctrl *pctl = platform_get_drvdata(pdev);  in sunxi_pinctrl_build_state()  local
1305 	pctl->groups = devm_kcalloc(&pdev->dev,  in sunxi_pinctrl_build_state()
1306 				    pctl->desc->npins, sizeof(*pctl->groups),  in sunxi_pinctrl_build_state()
1308 	if (!pctl->groups)  in sunxi_pinctrl_build_state()
1311 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_build_state()
1312 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()
1313 		struct sunxi_pinctrl_group *group = pctl->groups + pctl->ngroups;  in sunxi_pinctrl_build_state()
1315 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1322 		pctl->ngroups++;  in sunxi_pinctrl_build_state()
1331 	pctl->functions = kcalloc(7 * pctl->ngroups + 4,  in sunxi_pinctrl_build_state()
1332 				  sizeof(*pctl->functions),  in sunxi_pinctrl_build_state()
1334 	if (!pctl->functions)  in sunxi_pinctrl_build_state()
1338 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_build_state()
1339 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()
1342 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1346 			if (func->variant && !(pctl->variant & func->variant))  in sunxi_pinctrl_build_state()
1352 				pctl->irq_array[irqnum] = pin->pin.number;  in sunxi_pinctrl_build_state()
1355 			sunxi_pinctrl_add_function(pctl, func->name);  in sunxi_pinctrl_build_state()
1360 	ptr = krealloc(pctl->functions,  in sunxi_pinctrl_build_state()
1361 		       pctl->nfunctions * sizeof(*pctl->functions),  in sunxi_pinctrl_build_state()
1364 		kfree(pctl->functions);  in sunxi_pinctrl_build_state()
1365 		pctl->functions = NULL;  in sunxi_pinctrl_build_state()
1368 	pctl->functions = ptr;  in sunxi_pinctrl_build_state()
1370 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_build_state()
1371 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()
1374 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1381 			if (func->variant && !(pctl->variant & func->variant))  in sunxi_pinctrl_build_state()
1384 			func_item = sunxi_pinctrl_find_function_by_name(pctl,  in sunxi_pinctrl_build_state()
1387 				kfree(pctl->functions);  in sunxi_pinctrl_build_state()
1398 					kfree(pctl->functions);  in sunxi_pinctrl_build_state()
1436 static int sunxi_pinctrl_setup_debounce(struct sunxi_pinctrl *pctl,  in sunxi_pinctrl_setup_debounce()  argument
1453 	losc = devm_clk_get(pctl->dev, "losc");  in sunxi_pinctrl_setup_debounce()
1457 	hosc = devm_clk_get(pctl->dev, "hosc");  in sunxi_pinctrl_setup_debounce()
1461 	for (i = 0; i < pctl->desc->irq_banks; i++) {  in sunxi_pinctrl_setup_debounce()
1491 		       pctl->membase +  in sunxi_pinctrl_setup_debounce()
1492 		       sunxi_irq_debounce_reg_from_bank(pctl->desc, i));  in sunxi_pinctrl_setup_debounce()
1505 	struct sunxi_pinctrl *pctl;  in sunxi_pinctrl_init_with_flags()  local
1510 	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);  in sunxi_pinctrl_init_with_flags()
1511 	if (!pctl)  in sunxi_pinctrl_init_with_flags()
1513 	platform_set_drvdata(pdev, pctl);  in sunxi_pinctrl_init_with_flags()
1515 	raw_spin_lock_init(&pctl->lock);  in sunxi_pinctrl_init_with_flags()
1517 	pctl->membase = devm_platform_ioremap_resource(pdev, 0);  in sunxi_pinctrl_init_with_flags()
1518 	if (IS_ERR(pctl->membase))  in sunxi_pinctrl_init_with_flags()
1519 		return PTR_ERR(pctl->membase);  in sunxi_pinctrl_init_with_flags()
1521 	pctl->dev = &pdev->dev;  in sunxi_pinctrl_init_with_flags()
1522 	pctl->desc = desc;  in sunxi_pinctrl_init_with_flags()
1523 	pctl->variant = flags & SUNXI_PINCTRL_VARIANT_MASK;  in sunxi_pinctrl_init_with_flags()
1525 		pctl->bank_mem_size = D1_BANK_MEM_SIZE;  in sunxi_pinctrl_init_with_flags()
1526 		pctl->pull_regs_offset = D1_PULL_REGS_OFFSET;  in sunxi_pinctrl_init_with_flags()
1527 		pctl->dlevel_field_width = D1_DLEVEL_FIELD_WIDTH;  in sunxi_pinctrl_init_with_flags()
1529 		pctl->bank_mem_size = BANK_MEM_SIZE;  in sunxi_pinctrl_init_with_flags()
1530 		pctl->pull_regs_offset = PULL_REGS_OFFSET;  in sunxi_pinctrl_init_with_flags()
1531 		pctl->dlevel_field_width = DLEVEL_FIELD_WIDTH;  in sunxi_pinctrl_init_with_flags()
1534 		pctl->pow_mod_sel_offset = PIO_11B_POW_MOD_SEL_REG;  in sunxi_pinctrl_init_with_flags()
1536 		pctl->pow_mod_sel_offset = PIO_POW_MOD_SEL_REG;  in sunxi_pinctrl_init_with_flags()
1538 	pctl->irq_array = devm_kcalloc(&pdev->dev,  in sunxi_pinctrl_init_with_flags()
1539 				       IRQ_PER_BANK * pctl->desc->irq_banks,  in sunxi_pinctrl_init_with_flags()
1540 				       sizeof(*pctl->irq_array),  in sunxi_pinctrl_init_with_flags()
1542 	if (!pctl->irq_array)  in sunxi_pinctrl_init_with_flags()
1552 			    pctl->desc->npins, sizeof(*pins),  in sunxi_pinctrl_init_with_flags()
1557 	for (i = 0, pin_idx = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_init_with_flags()
1558 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_init_with_flags()
1560 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_init_with_flags()
1575 	pctrl_desc->npins = pctl->ngroups;  in sunxi_pinctrl_init_with_flags()
1589 	pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);  in sunxi_pinctrl_init_with_flags()
1590 	if (IS_ERR(pctl->pctl_dev)) {  in sunxi_pinctrl_init_with_flags()
1592 		return PTR_ERR(pctl->pctl_dev);  in sunxi_pinctrl_init_with_flags()
1595 	pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL);  in sunxi_pinctrl_init_with_flags()
1596 	if (!pctl->chip)  in sunxi_pinctrl_init_with_flags()
1599 	last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number;  in sunxi_pinctrl_init_with_flags()
1600 	pctl->chip->owner = THIS_MODULE;  in sunxi_pinctrl_init_with_flags()
1601 	pctl->chip->request = gpiochip_generic_request;  in sunxi_pinctrl_init_with_flags()
1602 	pctl->chip->free = gpiochip_generic_free;  in sunxi_pinctrl_init_with_flags()
1603 	pctl->chip->set_config = gpiochip_generic_config;  in sunxi_pinctrl_init_with_flags()
1604 	pctl->chip->direction_input = sunxi_pinctrl_gpio_direction_input;  in sunxi_pinctrl_init_with_flags()
1605 	pctl->chip->direction_output = sunxi_pinctrl_gpio_direction_output;  in sunxi_pinctrl_init_with_flags()
1606 	pctl->chip->get = sunxi_pinctrl_gpio_get;  in sunxi_pinctrl_init_with_flags()
1607 	pctl->chip->set_rv = sunxi_pinctrl_gpio_set;  in sunxi_pinctrl_init_with_flags()
1608 	pctl->chip->of_xlate = sunxi_pinctrl_gpio_of_xlate;  in sunxi_pinctrl_init_with_flags()
1609 	pctl->chip->to_irq = sunxi_pinctrl_gpio_to_irq;  in sunxi_pinctrl_init_with_flags()
1610 	pctl->chip->of_gpio_n_cells = 3;  in sunxi_pinctrl_init_with_flags()
1611 	pctl->chip->can_sleep = false;  in sunxi_pinctrl_init_with_flags()
1612 	pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) -  in sunxi_pinctrl_init_with_flags()
1613 			    pctl->desc->pin_base;  in sunxi_pinctrl_init_with_flags()
1614 	pctl->chip->label = dev_name(&pdev->dev);  in sunxi_pinctrl_init_with_flags()
1615 	pctl->chip->parent = &pdev->dev;  in sunxi_pinctrl_init_with_flags()
1616 	pctl->chip->base = pctl->desc->pin_base;  in sunxi_pinctrl_init_with_flags()
1618 	ret = gpiochip_add_data(pctl->chip, pctl);  in sunxi_pinctrl_init_with_flags()
1622 	for (i = 0; i < pctl->desc->npins; i++) {  in sunxi_pinctrl_init_with_flags()
1623 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_init_with_flags()
1625 		ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev),  in sunxi_pinctrl_init_with_flags()
1626 					     pin->pin.number - pctl->desc->pin_base,  in sunxi_pinctrl_init_with_flags()
1639 	pctl->irq = devm_kcalloc(&pdev->dev,  in sunxi_pinctrl_init_with_flags()
1640 				 pctl->desc->irq_banks,  in sunxi_pinctrl_init_with_flags()
1641 				 sizeof(*pctl->irq),  in sunxi_pinctrl_init_with_flags()
1643 	if (!pctl->irq) {  in sunxi_pinctrl_init_with_flags()
1648 	for (i = 0; i < pctl->desc->irq_banks; i++) {  in sunxi_pinctrl_init_with_flags()
1649 		pctl->irq[i] = platform_get_irq(pdev, i);  in sunxi_pinctrl_init_with_flags()
1650 		if (pctl->irq[i] < 0) {  in sunxi_pinctrl_init_with_flags()
1651 			ret = pctl->irq[i];  in sunxi_pinctrl_init_with_flags()
1656 	pctl->domain = irq_domain_create_linear(dev_fwnode(&pdev->dev),  in sunxi_pinctrl_init_with_flags()
1657 						pctl->desc->irq_banks * IRQ_PER_BANK,  in sunxi_pinctrl_init_with_flags()
1658 						&sunxi_pinctrl_irq_domain_ops, pctl);  in sunxi_pinctrl_init_with_flags()
1659 	if (!pctl->domain) {  in sunxi_pinctrl_init_with_flags()
1665 	for (i = 0; i < (pctl->desc->irq_banks * IRQ_PER_BANK); i++) {  in sunxi_pinctrl_init_with_flags()
1666 		int irqno = irq_create_mapping(pctl->domain, i);  in sunxi_pinctrl_init_with_flags()
1672 		irq_set_chip_data(irqno, pctl);  in sunxi_pinctrl_init_with_flags()
1675 	for (i = 0; i < pctl->desc->irq_banks; i++) {  in sunxi_pinctrl_init_with_flags()
1677 		writel(0, pctl->membase +  in sunxi_pinctrl_init_with_flags()
1678 			  sunxi_irq_ctrl_reg_from_bank(pctl->desc, i));  in sunxi_pinctrl_init_with_flags()
1680 		       pctl->membase +  in sunxi_pinctrl_init_with_flags()
1681 		       sunxi_irq_status_reg_from_bank(pctl->desc, i));  in sunxi_pinctrl_init_with_flags()
1683 		irq_set_chained_handler_and_data(pctl->irq[i],  in sunxi_pinctrl_init_with_flags()
1685 						 pctl);  in sunxi_pinctrl_init_with_flags()
1688 	sunxi_pinctrl_setup_debounce(pctl, node);  in sunxi_pinctrl_init_with_flags()
1695 	gpiochip_remove(pctl->chip);  in sunxi_pinctrl_init_with_flags()