Lines Matching +full:0 +full:x6
20 #define PINCTRL_SUN6I_A31 BIT(0)
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
28 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
30 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
31 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */
33 SUNXI_FUNCTION(0x0, "gpio_in"),
34 SUNXI_FUNCTION(0x1, "gpio_out"),
35 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
36 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
38 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
39 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PA_EINT1 */
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
44 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
46 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
47 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PA_EINT2 */
49 SUNXI_FUNCTION(0x0, "gpio_in"),
50 SUNXI_FUNCTION(0x1, "gpio_out"),
51 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
52 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
54 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
55 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PA_EINT3 */
57 SUNXI_FUNCTION(0x0, "gpio_in"),
58 SUNXI_FUNCTION(0x1, "gpio_out"),
59 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
60 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
62 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
63 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out"),
67 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
68 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
70 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
71 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PA_EINT5 */
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
76 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
78 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
79 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PA_EINT6 */
81 SUNXI_FUNCTION(0x0, "gpio_in"),
82 SUNXI_FUNCTION(0x1, "gpio_out"),
83 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
84 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
86 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
87 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PA_EINT7 */
89 SUNXI_FUNCTION(0x0, "gpio_in"),
90 SUNXI_FUNCTION(0x1, "gpio_out"),
91 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
92 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
94 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PA_EINT8 */
96 SUNXI_FUNCTION(0x0, "gpio_in"),
97 SUNXI_FUNCTION(0x1, "gpio_out"),
98 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
99 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
101 SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */
102 SUNXI_FUNCTION(0x5, "mmc2"), /* CMD */
103 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PA_EINT9 */
105 SUNXI_FUNCTION(0x0, "gpio_in"),
106 SUNXI_FUNCTION(0x1, "gpio_out"),
107 SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */
108 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
110 SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */
111 SUNXI_FUNCTION(0x5, "mmc2"), /* CLK */
112 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
117 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
119 SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */
120 SUNXI_FUNCTION(0x5, "mmc2"), /* D0 */
121 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
123 SUNXI_FUNCTION(0x0, "gpio_in"),
124 SUNXI_FUNCTION(0x1, "gpio_out"),
125 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
126 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
128 SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */
129 SUNXI_FUNCTION(0x5, "mmc2"), /* D1 */
130 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
135 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
137 SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */
138 SUNXI_FUNCTION(0x5, "mmc2"), /* D2 */
139 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */
141 SUNXI_FUNCTION(0x0, "gpio_in"),
142 SUNXI_FUNCTION(0x1, "gpio_out"),
143 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
144 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
146 SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */
147 SUNXI_FUNCTION(0x5, "mmc2"), /* D3 */
148 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
153 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
155 SUNXI_FUNCTION(0x4, "clk_out_a"),
156 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
158 SUNXI_FUNCTION(0x0, "gpio_in"),
159 SUNXI_FUNCTION(0x1, "gpio_out"),
160 SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
161 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
163 SUNXI_FUNCTION(0x4, "dmic"), /* CLK */
164 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
166 SUNXI_FUNCTION(0x0, "gpio_in"),
167 SUNXI_FUNCTION(0x1, "gpio_out"),
168 SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
169 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
171 SUNXI_FUNCTION(0x4, "dmic"), /* DIN */
172 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out"),
176 SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
177 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
179 SUNXI_FUNCTION(0x4, "clk_out_b"),
180 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */
185 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
187 SUNXI_FUNCTION(0x4, "pwm3"), /* Positive */
188 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */
190 SUNXI_FUNCTION(0x0, "gpio_in"),
191 SUNXI_FUNCTION(0x1, "gpio_out"),
192 SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */
193 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
195 SUNXI_FUNCTION(0x4, "pwm3"), /* Negative */
196 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */
198 SUNXI_FUNCTION(0x0, "gpio_in"),
199 SUNXI_FUNCTION(0x1, "gpio_out"),
200 SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */
201 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
203 SUNXI_FUNCTION(0x4, "spi3"), /* CS0 */
204 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */
206 SUNXI_FUNCTION(0x0, "gpio_in"),
207 SUNXI_FUNCTION(0x1, "gpio_out"),
208 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
209 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
211 SUNXI_FUNCTION(0x4, "spi3"), /* CLK */
212 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 22)), /* PA_EINT22 */
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "gmac"), /* COL */
217 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
219 SUNXI_FUNCTION(0x4, "spi3"), /* MOSI */
220 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 23)), /* PA_EINT23 */
222 SUNXI_FUNCTION(0x0, "gpio_in"),
223 SUNXI_FUNCTION(0x1, "gpio_out"),
224 SUNXI_FUNCTION(0x2, "gmac"), /* CRS */
225 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
227 SUNXI_FUNCTION(0x4, "spi3"), /* MISO */
228 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 24)), /* PA_EINT24 */
230 SUNXI_FUNCTION(0x0, "gpio_in"),
231 SUNXI_FUNCTION(0x1, "gpio_out"),
232 SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */
233 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
235 SUNXI_FUNCTION(0x4, "spi3"), /* CS1 */
236 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 25)), /* PA_EINT25 */
238 SUNXI_FUNCTION(0x0, "gpio_in"),
239 SUNXI_FUNCTION(0x1, "gpio_out"),
240 SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
241 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
243 SUNXI_FUNCTION(0x4, "clk_out_c"),
244 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)), /* PA_EINT26 */
246 SUNXI_FUNCTION(0x0, "gpio_in"),
247 SUNXI_FUNCTION(0x1, "gpio_out"),
248 SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */
249 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
251 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 27)), /* PA_EINT27 */
253 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
257 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
258 SUNXI_FUNCTION_VARIANT(0x4, "csi",
260 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PB_EINT0 */
262 SUNXI_FUNCTION(0x0, "gpio_in"),
263 SUNXI_FUNCTION(0x1, "gpio_out"),
264 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
265 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PB_EINT1 */
267 SUNXI_FUNCTION(0x0, "gpio_in"),
268 SUNXI_FUNCTION(0x1, "gpio_out"),
269 SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
270 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PB_EINT2 */
272 SUNXI_FUNCTION(0x0, "gpio_in"),
273 SUNXI_FUNCTION(0x1, "gpio_out"),
274 SUNXI_FUNCTION(0x2, "i2s0"), /* DO0 */
275 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PB_EINT3 */
277 SUNXI_FUNCTION(0x0, "gpio_in"),
278 SUNXI_FUNCTION(0x1, "gpio_out"),
279 SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */
280 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
281 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PB_EINT4 */
283 SUNXI_FUNCTION(0x0, "gpio_in"),
284 SUNXI_FUNCTION(0x1, "gpio_out"),
285 SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */
286 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
287 SUNXI_FUNCTION(0x4, "i2c3"), /* SCK */
288 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PB_EINT5 */
290 SUNXI_FUNCTION(0x0, "gpio_in"),
291 SUNXI_FUNCTION(0x1, "gpio_out"),
292 SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */
293 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
294 SUNXI_FUNCTION(0x4, "i2c3"), /* SDA */
295 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PB_EINT6 */
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x3, "i2s0"), /* DI */
300 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PB_EINT7 */
302 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out"),
305 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
306 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
308 SUNXI_FUNCTION(0x0, "gpio_in"),
309 SUNXI_FUNCTION(0x1, "gpio_out"),
310 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
311 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
316 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
322 SUNXI_FUNCTION(0x0, "gpio_in"),
323 SUNXI_FUNCTION(0x1, "gpio_out"),
324 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
326 SUNXI_FUNCTION(0x0, "gpio_in"),
327 SUNXI_FUNCTION(0x1, "gpio_out"),
328 SUNXI_FUNCTION(0x2, "nand0")), /* RE */
330 SUNXI_FUNCTION(0x0, "gpio_in"),
331 SUNXI_FUNCTION(0x1, "gpio_out"),
332 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
333 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
334 SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */
336 SUNXI_FUNCTION(0x0, "gpio_in"),
337 SUNXI_FUNCTION(0x1, "gpio_out"),
338 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
339 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
340 SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */
342 SUNXI_FUNCTION(0x0, "gpio_in"),
343 SUNXI_FUNCTION(0x1, "gpio_out"),
344 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
345 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
346 SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
351 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
352 SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */
354 SUNXI_FUNCTION(0x0, "gpio_in"),
355 SUNXI_FUNCTION(0x1, "gpio_out"),
356 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
357 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
358 SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */
360 SUNXI_FUNCTION(0x0, "gpio_in"),
361 SUNXI_FUNCTION(0x1, "gpio_out"),
362 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
363 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
364 SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
369 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
370 SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */
372 SUNXI_FUNCTION(0x0, "gpio_in"),
373 SUNXI_FUNCTION(0x1, "gpio_out"),
374 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
375 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
376 SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
381 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
382 SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */
384 SUNXI_FUNCTION(0x0, "gpio_in"),
385 SUNXI_FUNCTION(0x1, "gpio_out"),
386 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
387 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
388 SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "nand0"), /* DQ8 */
394 SUNXI_FUNCTION(0x3, "nand1")), /* DQ0 */
396 SUNXI_FUNCTION(0x0, "gpio_in"),
397 SUNXI_FUNCTION(0x1, "gpio_out"),
398 SUNXI_FUNCTION(0x2, "nand0"), /* DQ9 */
399 SUNXI_FUNCTION(0x3, "nand1")), /* DQ1 */
401 SUNXI_FUNCTION(0x0, "gpio_in"),
402 SUNXI_FUNCTION(0x1, "gpio_out"),
403 SUNXI_FUNCTION(0x2, "nand0"), /* DQ10 */
404 SUNXI_FUNCTION(0x3, "nand1")), /* DQ2 */
406 SUNXI_FUNCTION(0x0, "gpio_in"),
407 SUNXI_FUNCTION(0x1, "gpio_out"),
408 SUNXI_FUNCTION(0x2, "nand0"), /* DQ11 */
409 SUNXI_FUNCTION(0x3, "nand1")), /* DQ3 */
411 SUNXI_FUNCTION(0x0, "gpio_in"),
412 SUNXI_FUNCTION(0x1, "gpio_out"),
413 SUNXI_FUNCTION(0x2, "nand0"), /* DQ12 */
414 SUNXI_FUNCTION(0x3, "nand1")), /* DQ4 */
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out"),
418 SUNXI_FUNCTION(0x2, "nand0"), /* DQ13 */
419 SUNXI_FUNCTION(0x3, "nand1")), /* DQ5 */
421 SUNXI_FUNCTION(0x0, "gpio_in"),
422 SUNXI_FUNCTION(0x1, "gpio_out"),
423 SUNXI_FUNCTION(0x2, "nand0"), /* DQ14 */
424 SUNXI_FUNCTION(0x3, "nand1")), /* DQ6 */
426 SUNXI_FUNCTION(0x0, "gpio_in"),
427 SUNXI_FUNCTION(0x1, "gpio_out"),
428 SUNXI_FUNCTION(0x2, "nand0"), /* DQ15 */
429 SUNXI_FUNCTION(0x3, "nand1")), /* DQ7 */
431 SUNXI_FUNCTION(0x0, "gpio_in"),
432 SUNXI_FUNCTION(0x1, "gpio_out"),
433 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
434 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
435 SUNXI_FUNCTION(0x4, "mmc3")), /* RST */
437 SUNXI_FUNCTION(0x0, "gpio_in"),
438 SUNXI_FUNCTION(0x1, "gpio_out"),
439 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
441 SUNXI_FUNCTION(0x0, "gpio_in"),
442 SUNXI_FUNCTION(0x1, "gpio_out"),
443 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
445 SUNXI_FUNCTION(0x0, "gpio_in"),
446 SUNXI_FUNCTION(0x1, "gpio_out"),
447 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
449 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
450 SUNXI_FUNCTION(0x0, "gpio_in"),
451 SUNXI_FUNCTION(0x1, "gpio_out"),
452 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
453 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
455 SUNXI_FUNCTION(0x0, "gpio_in"),
456 SUNXI_FUNCTION(0x1, "gpio_out"),
457 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
458 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
460 SUNXI_FUNCTION(0x0, "gpio_in"),
461 SUNXI_FUNCTION(0x1, "gpio_out"),
462 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
463 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
465 SUNXI_FUNCTION(0x0, "gpio_in"),
466 SUNXI_FUNCTION(0x1, "gpio_out"),
467 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
468 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
470 SUNXI_FUNCTION(0x0, "gpio_in"),
471 SUNXI_FUNCTION(0x1, "gpio_out"),
472 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
473 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
475 SUNXI_FUNCTION(0x0, "gpio_in"),
476 SUNXI_FUNCTION(0x1, "gpio_out"),
477 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
478 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
480 SUNXI_FUNCTION(0x0, "gpio_in"),
481 SUNXI_FUNCTION(0x1, "gpio_out"),
482 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
483 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
485 SUNXI_FUNCTION(0x0, "gpio_in"),
486 SUNXI_FUNCTION(0x1, "gpio_out"),
487 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
488 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
493 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
495 SUNXI_FUNCTION(0x0, "gpio_in"),
496 SUNXI_FUNCTION(0x1, "gpio_out"),
497 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
498 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
500 SUNXI_FUNCTION(0x0, "gpio_in"),
501 SUNXI_FUNCTION(0x1, "gpio_out"),
502 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
503 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
506 SUNXI_FUNCTION(0x0, "gpio_in"),
507 SUNXI_FUNCTION(0x1, "gpio_out"),
508 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
509 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
515 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
518 SUNXI_FUNCTION(0x0, "gpio_in"),
519 SUNXI_FUNCTION(0x1, "gpio_out"),
520 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
521 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
524 SUNXI_FUNCTION(0x0, "gpio_in"),
525 SUNXI_FUNCTION(0x1, "gpio_out"),
526 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
527 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
530 SUNXI_FUNCTION(0x0, "gpio_in"),
531 SUNXI_FUNCTION(0x1, "gpio_out"),
532 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
533 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
536 SUNXI_FUNCTION(0x0, "gpio_in"),
537 SUNXI_FUNCTION(0x1, "gpio_out"),
538 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
539 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
542 SUNXI_FUNCTION(0x0, "gpio_in"),
543 SUNXI_FUNCTION(0x1, "gpio_out"),
544 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
545 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
548 SUNXI_FUNCTION(0x0, "gpio_in"),
549 SUNXI_FUNCTION(0x1, "gpio_out"),
550 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
551 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
554 SUNXI_FUNCTION(0x0, "gpio_in"),
555 SUNXI_FUNCTION(0x1, "gpio_out"),
556 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
557 SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
562 SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
566 SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */
568 SUNXI_FUNCTION(0x0, "gpio_in"),
569 SUNXI_FUNCTION(0x1, "gpio_out"),
570 SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */
572 SUNXI_FUNCTION(0x0, "gpio_in"),
573 SUNXI_FUNCTION(0x1, "gpio_out"),
574 SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */
576 SUNXI_FUNCTION(0x0, "gpio_in"),
577 SUNXI_FUNCTION(0x1, "gpio_out"),
578 SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */
580 SUNXI_FUNCTION(0x0, "gpio_in"),
581 SUNXI_FUNCTION(0x1, "gpio_out"),
582 SUNXI_FUNCTION(0x2, "lcd0")), /* DE */
584 SUNXI_FUNCTION(0x0, "gpio_in"),
585 SUNXI_FUNCTION(0x1, "gpio_out"),
586 SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */
588 SUNXI_FUNCTION(0x0, "gpio_in"),
589 SUNXI_FUNCTION(0x1, "gpio_out"),
590 SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */
592 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
593 SUNXI_FUNCTION(0x0, "gpio_in"),
594 SUNXI_FUNCTION(0x1, "gpio_out"),
595 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
596 SUNXI_FUNCTION(0x3, "ts"), /* CLK */
597 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PE_EINT0 */
599 SUNXI_FUNCTION(0x0, "gpio_in"),
600 SUNXI_FUNCTION(0x1, "gpio_out"),
601 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
602 SUNXI_FUNCTION(0x3, "ts"), /* ERR */
603 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PE_EINT1 */
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
608 SUNXI_FUNCTION(0x3, "ts"), /* SYNC */
609 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PE_EINT2 */
611 SUNXI_FUNCTION(0x0, "gpio_in"),
612 SUNXI_FUNCTION(0x1, "gpio_out"),
613 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
614 SUNXI_FUNCTION(0x3, "ts"), /* DVLD */
615 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PE_EINT3 */
617 SUNXI_FUNCTION(0x0, "gpio_in"),
618 SUNXI_FUNCTION(0x1, "gpio_out"),
619 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
620 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
621 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PE_EINT4 */
623 SUNXI_FUNCTION(0x0, "gpio_in"),
624 SUNXI_FUNCTION(0x1, "gpio_out"),
625 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
626 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
627 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PE_EINT5 */
629 SUNXI_FUNCTION(0x0, "gpio_in"),
630 SUNXI_FUNCTION(0x1, "gpio_out"),
631 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
632 SUNXI_FUNCTION(0x3, "uart5"), /* RTS */
633 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PE_EINT6 */
635 SUNXI_FUNCTION(0x0, "gpio_in"),
636 SUNXI_FUNCTION(0x1, "gpio_out"),
637 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
638 SUNXI_FUNCTION(0x3, "uart5"), /* CTS */
639 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PE_EINT7 */
641 SUNXI_FUNCTION(0x0, "gpio_in"),
642 SUNXI_FUNCTION(0x1, "gpio_out"),
643 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
644 SUNXI_FUNCTION(0x3, "ts"), /* D0 */
645 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PE_EINT8 */
647 SUNXI_FUNCTION(0x0, "gpio_in"),
648 SUNXI_FUNCTION(0x1, "gpio_out"),
649 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
650 SUNXI_FUNCTION(0x3, "ts"), /* D1 */
651 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PE_EINT9 */
653 SUNXI_FUNCTION(0x0, "gpio_in"),
654 SUNXI_FUNCTION(0x1, "gpio_out"),
655 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
656 SUNXI_FUNCTION(0x3, "ts"), /* D2 */
657 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PE_EINT10 */
659 SUNXI_FUNCTION(0x0, "gpio_in"),
660 SUNXI_FUNCTION(0x1, "gpio_out"),
661 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
662 SUNXI_FUNCTION(0x3, "ts"), /* D3 */
663 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PE_EINT11 */
665 SUNXI_FUNCTION(0x0, "gpio_in"),
666 SUNXI_FUNCTION(0x1, "gpio_out"),
667 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
668 SUNXI_FUNCTION(0x3, "ts"), /* D4 */
669 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PE_EINT12 */
671 SUNXI_FUNCTION(0x0, "gpio_in"),
672 SUNXI_FUNCTION(0x1, "gpio_out"),
673 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
674 SUNXI_FUNCTION(0x3, "ts"), /* D5 */
675 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PE_EINT13 */
677 SUNXI_FUNCTION(0x0, "gpio_in"),
678 SUNXI_FUNCTION(0x1, "gpio_out"),
679 SUNXI_FUNCTION(0x2, "csi"), /* D10 */
680 SUNXI_FUNCTION(0x3, "ts"), /* D6 */
681 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* PE_EINT14 */
683 SUNXI_FUNCTION(0x0, "gpio_in"),
684 SUNXI_FUNCTION(0x1, "gpio_out"),
685 SUNXI_FUNCTION(0x2, "csi"), /* D11 */
686 SUNXI_FUNCTION(0x3, "ts"), /* D7 */
687 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), /* PE_EINT15 */
689 SUNXI_FUNCTION(0x0, "gpio_in"),
690 SUNXI_FUNCTION(0x1, "gpio_out"),
691 SUNXI_FUNCTION(0x2, "csi"), /* MIPI CSI MCLK */
692 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), /* PE_EINT16 */
694 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
695 SUNXI_FUNCTION(0x0, "gpio_in"),
696 SUNXI_FUNCTION(0x1, "gpio_out"),
697 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
698 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
700 SUNXI_FUNCTION(0x0, "gpio_in"),
701 SUNXI_FUNCTION(0x1, "gpio_out"),
702 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
703 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
705 SUNXI_FUNCTION(0x0, "gpio_in"),
706 SUNXI_FUNCTION(0x1, "gpio_out"),
707 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
708 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
710 SUNXI_FUNCTION(0x0, "gpio_in"),
711 SUNXI_FUNCTION(0x1, "gpio_out"),
712 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
713 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
715 SUNXI_FUNCTION(0x0, "gpio_in"),
716 SUNXI_FUNCTION(0x1, "gpio_out"),
717 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
718 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
720 SUNXI_FUNCTION(0x0, "gpio_in"),
721 SUNXI_FUNCTION(0x1, "gpio_out"),
722 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
723 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
725 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
726 SUNXI_FUNCTION(0x0, "gpio_in"),
727 SUNXI_FUNCTION(0x1, "gpio_out"),
728 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
729 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)), /* PG_EINT0 */
731 SUNXI_FUNCTION(0x0, "gpio_in"),
732 SUNXI_FUNCTION(0x1, "gpio_out"),
733 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
734 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)), /* PG_EINT1 */
736 SUNXI_FUNCTION(0x0, "gpio_in"),
737 SUNXI_FUNCTION(0x1, "gpio_out"),
738 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
739 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)), /* PG_EINT2 */
741 SUNXI_FUNCTION(0x0, "gpio_in"),
742 SUNXI_FUNCTION(0x1, "gpio_out"),
743 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
744 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)), /* PG_EINT3 */
746 SUNXI_FUNCTION(0x0, "gpio_in"),
747 SUNXI_FUNCTION(0x1, "gpio_out"),
748 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
749 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)), /* PG_EINT4 */
751 SUNXI_FUNCTION(0x0, "gpio_in"),
752 SUNXI_FUNCTION(0x1, "gpio_out"),
753 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
754 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)), /* PG_EINT5 */
756 SUNXI_FUNCTION(0x0, "gpio_in"),
757 SUNXI_FUNCTION(0x1, "gpio_out"),
758 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
759 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)), /* PG_EINT6 */
761 SUNXI_FUNCTION(0x0, "gpio_in"),
762 SUNXI_FUNCTION(0x1, "gpio_out"),
763 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
764 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)), /* PG_EINT7 */
766 SUNXI_FUNCTION(0x0, "gpio_in"),
767 SUNXI_FUNCTION(0x1, "gpio_out"),
768 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
769 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)), /* PG_EINT8 */
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
774 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)), /* PG_EINT9 */
776 SUNXI_FUNCTION(0x0, "gpio_in"),
777 SUNXI_FUNCTION(0x1, "gpio_out"),
778 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
779 SUNXI_FUNCTION_VARIANT(0x3, "usb",
781 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), /* PG_EINT10 */
783 SUNXI_FUNCTION(0x0, "gpio_in"),
784 SUNXI_FUNCTION(0x1, "gpio_out"),
785 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
786 SUNXI_FUNCTION_VARIANT(0x3, "usb",
788 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)), /* PG_EINT11 */
790 SUNXI_FUNCTION(0x0, "gpio_in"),
791 SUNXI_FUNCTION(0x1, "gpio_out"),
792 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
793 SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */
794 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)), /* PG_EINT12 */
796 SUNXI_FUNCTION(0x0, "gpio_in"),
797 SUNXI_FUNCTION(0x1, "gpio_out"),
798 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
799 SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */
800 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)), /* PG_EINT13 */
802 SUNXI_FUNCTION(0x0, "gpio_in"),
803 SUNXI_FUNCTION(0x1, "gpio_out"),
804 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
805 SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */
806 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)), /* PG_EINT14 */
808 SUNXI_FUNCTION(0x0, "gpio_in"),
809 SUNXI_FUNCTION(0x1, "gpio_out"),
810 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
811 SUNXI_FUNCTION(0x3, "i2s1"), /* DIN */
812 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)), /* PG_EINT15 */
814 SUNXI_FUNCTION(0x0, "gpio_in"),
815 SUNXI_FUNCTION(0x1, "gpio_out"),
816 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
817 SUNXI_FUNCTION(0x3, "i2s1"), /* DOUT */
818 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)), /* PG_EINT16 */
820 SUNXI_FUNCTION(0x0, "gpio_in"),
821 SUNXI_FUNCTION(0x1, "gpio_out"),
822 SUNXI_FUNCTION(0x2, "uart4"), /* TX */
823 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)), /* PG_EINT17 */
825 SUNXI_FUNCTION(0x0, "gpio_in"),
826 SUNXI_FUNCTION(0x1, "gpio_out"),
827 SUNXI_FUNCTION(0x2, "uart4"), /* RX */
828 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)), /* PG_EINT18 */
830 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 0), PINCTRL_SUN6I_A31,
831 SUNXI_FUNCTION(0x0, "gpio_in"),
832 SUNXI_FUNCTION(0x1, "gpio_out"),
833 SUNXI_FUNCTION(0x2, "nand1")), /* WE */
835 SUNXI_FUNCTION(0x0, "gpio_in"),
836 SUNXI_FUNCTION(0x1, "gpio_out"),
837 SUNXI_FUNCTION(0x2, "nand1")), /* ALE */
839 SUNXI_FUNCTION(0x0, "gpio_in"),
840 SUNXI_FUNCTION(0x1, "gpio_out"),
841 SUNXI_FUNCTION(0x2, "nand1")), /* CLE */
843 SUNXI_FUNCTION(0x0, "gpio_in"),
844 SUNXI_FUNCTION(0x1, "gpio_out"),
845 SUNXI_FUNCTION(0x2, "nand1")), /* CE1 */
847 SUNXI_FUNCTION(0x0, "gpio_in"),
848 SUNXI_FUNCTION(0x1, "gpio_out"),
849 SUNXI_FUNCTION(0x2, "nand1")), /* CE0 */
851 SUNXI_FUNCTION(0x0, "gpio_in"),
852 SUNXI_FUNCTION(0x1, "gpio_out"),
853 SUNXI_FUNCTION(0x2, "nand1")), /* RE */
855 SUNXI_FUNCTION(0x0, "gpio_in"),
856 SUNXI_FUNCTION(0x1, "gpio_out"),
857 SUNXI_FUNCTION(0x2, "nand1")), /* RB0 */
859 SUNXI_FUNCTION(0x0, "gpio_in"),
860 SUNXI_FUNCTION(0x1, "gpio_out"),
861 SUNXI_FUNCTION(0x2, "nand1")), /* RB1 */
863 SUNXI_FUNCTION(0x0, "gpio_in"),
864 SUNXI_FUNCTION(0x1, "gpio_out"),
865 SUNXI_FUNCTION(0x2, "nand1")), /* DQS */
867 SUNXI_FUNCTION(0x0, "gpio_in"),
868 SUNXI_FUNCTION(0x1, "gpio_out"),
869 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
870 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
871 SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */
873 SUNXI_FUNCTION(0x0, "gpio_in"),
874 SUNXI_FUNCTION(0x1, "gpio_out"),
875 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
876 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
877 SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */
879 SUNXI_FUNCTION(0x0, "gpio_in"),
880 SUNXI_FUNCTION(0x1, "gpio_out"),
881 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
882 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
883 SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */
885 SUNXI_FUNCTION(0x0, "gpio_in"),
886 SUNXI_FUNCTION(0x1, "gpio_out"),
887 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
888 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
889 SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */
891 SUNXI_FUNCTION(0x0, "gpio_in"),
892 SUNXI_FUNCTION(0x1, "gpio_out"),
893 SUNXI_FUNCTION(0x2, "pwm0")),
895 SUNXI_FUNCTION(0x0, "gpio_in"),
896 SUNXI_FUNCTION(0x1, "gpio_out"),
897 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
899 SUNXI_FUNCTION(0x0, "gpio_in"),
900 SUNXI_FUNCTION(0x1, "gpio_out"),
901 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
903 SUNXI_FUNCTION(0x0, "gpio_in"),
904 SUNXI_FUNCTION(0x1, "gpio_out"),
905 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
907 SUNXI_FUNCTION(0x0, "gpio_in"),
908 SUNXI_FUNCTION(0x1, "gpio_out"),
909 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
911 SUNXI_FUNCTION(0x0, "gpio_in"),
912 SUNXI_FUNCTION(0x1, "gpio_out"),
913 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
915 SUNXI_FUNCTION(0x0, "gpio_in"),
916 SUNXI_FUNCTION(0x1, "gpio_out"),
917 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
919 SUNXI_FUNCTION(0x0, "gpio_in"),
920 SUNXI_FUNCTION(0x1, "gpio_out"),
921 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
923 SUNXI_FUNCTION(0x0, "gpio_in"),
924 SUNXI_FUNCTION(0x1, "gpio_out"),
925 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
927 SUNXI_FUNCTION(0x0, "gpio_in"),
928 SUNXI_FUNCTION(0x1, "gpio_out")),
930 SUNXI_FUNCTION(0x0, "gpio_in"),
931 SUNXI_FUNCTION(0x1, "gpio_out")),
933 SUNXI_FUNCTION(0x0, "gpio_in"),
934 SUNXI_FUNCTION(0x1, "gpio_out")),
936 SUNXI_FUNCTION(0x0, "gpio_in"),
937 SUNXI_FUNCTION(0x1, "gpio_out")),
939 SUNXI_FUNCTION(0x0, "gpio_in"),
940 SUNXI_FUNCTION(0x1, "gpio_out")),
942 SUNXI_FUNCTION(0x0, "gpio_in"),
943 SUNXI_FUNCTION(0x1, "gpio_out"),
949 SUNXI_FUNCTION(0x3, "spdif")), /* SPDIF IN */
951 SUNXI_FUNCTION(0x0, "gpio_in"),
952 SUNXI_FUNCTION(0x1, "gpio_out"),
954 SUNXI_FUNCTION(0x3, "spdif")), /* SPDIF OUT */
957 SUNXI_FUNCTION(0x0, "gpio_in"),
958 SUNXI_FUNCTION(0x1, "gpio_out"),
959 SUNXI_FUNCTION(0x2, "nand1")), /* CE2 */
961 SUNXI_FUNCTION(0x0, "gpio_in"),
962 SUNXI_FUNCTION(0x1, "gpio_out"),
963 SUNXI_FUNCTION(0x2, "nand1")), /* CE3 */