Lines Matching full:bank

85  * @EINT_TYPE_NONE: bank does not support external interrupts
86  * @EINT_TYPE_GPIO: bank supportes external gpio interrupts
87  * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
88  * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts
91  * in a pin bank can support external gpio interrupts or external wakeup
125  * struct samsung_pin_bank_type: pin bank type description
135  * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
136  * @type: type of the bank (register offsets and bitfield widths)
137  * @pctl_offset: starting offset of the pin-bank registers.
138  * @pctl_res_idx: index of base address for pin-bank registers.
139  * @nr_pins: number of pins included in this bank.
141  * @eint_type: type of the external interrupt supported by the bank.
143  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
145  * @eint_con_offset: ExynosAuto SoC-specific EINT control register offset of bank.
146  * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
147  * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
149  * @name: name to be prefixed for each pin in this pin bank.
169  * struct samsung_pin_bank: represent a controller pin-bank.
170  * @type: type of the bank (register offsets and bitfield widths)
171  * @pctl_base: base address of the pin-bank registers
172  * @pctl_offset: starting offset of the pin-bank registers.
173  * @nr_pins: number of pins included in this bank.
174  * @eint_base: base address of the pin-bank EINT registers.
176  * @eint_type: type of the external interrupt supported by the bank.
178  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
180  * @eint_con_offset: ExynosAuto SoC-specific EINT register or interrupt offset of bank.
181  * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
182  * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
184  * @name: name to be prefixed for each pin in this pin bank.
185  * @id: id of the bank, propagated to the pin range.
186  * @pin_base: starting pin number of the bank.
187  * @soc_priv: per-bank private data for SoC-specific code.
188  * @of_node: OF node of the bank.
190  * @irq_domain: IRQ domain of the bank.
191  * @gpio_chip: GPIO chip of the bank.
192  * @grange: linux gpio pin range supported by this bank.
194  * @slock: spinlock protecting bank registers
229  * struct samsung_retention_data: runtime pin-bank retention control data.
233  * @refcnt: atomic counter if retention control affects more than one bank.
249  * struct samsung_retention_data: represent a pin-bank retention control data.
253  * @refcnt: atomic counter if retention control affects more than one bank.
292 	void		(*suspend)(struct samsung_pin_bank *bank);
293 	void		(*resume)(struct samsung_pin_bank *bank);
300  *             to each bank samsung_pin_bank->pctl_base and used on legacy
342 	void (*suspend)(struct samsung_pin_bank *bank);
343 	void (*resume)(struct samsung_pin_bank *bank);