Lines Matching +full:part +full:- +full:1 +full:- +full:pins
1 /* SPDX-License-Identifier: GPL-2.0+ */
45 #define EXYNOS_EINT_LEVEL_HIGH 1
55 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ argument
59 .nr_pins = pins, \
64 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
68 .nr_pins = pins, \
74 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
78 .nr_pins = pins, \
84 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
88 .nr_pins = pins, \
94 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
98 .nr_pins = pins, \
104 #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \ argument
108 .nr_pins = pins, \
115 #define EXYNOS850_PIN_BANK_EINTN(pins, reg, id) \ argument
119 .nr_pins = pins, \
124 #define EXYNOS850_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
128 .nr_pins = pins, \
134 #define EXYNOS850_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
138 .nr_pins = pins, \
144 #define EXYNOS8895_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
148 .nr_pins = pins, \
154 #define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, con_offs, mask_offs, pend_offs) \ argument
158 .nr_pins = pins, \
166 #define EXYNOSV920_PIN_BANK_EINTW(pins, reg, id, con_offs, mask_offs, pend_offs) \ argument
170 .nr_pins = pins, \
192 * @nr_banks: count of banks being part of the mux
193 * @banks: array of banks being part of the mux