767 	struct exynos_eint_gpio_save *save = bank->soc_priv;  in exynos_pinctrl_suspend_bank()  local
776 	save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET  in exynos_pinctrl_suspend_bank()
778 	save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET  in exynos_pinctrl_suspend_bank()
780 	save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET  in exynos_pinctrl_suspend_bank()
782 	save->eint_mask = readl(regs + bank->irq_chip->eint_mask  in exynos_pinctrl_suspend_bank()
787 	pr_debug("%s: save     con %#010x\n", bank->name, save->eint_con);  in exynos_pinctrl_suspend_bank()
788 	pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0);  in exynos_pinctrl_suspend_bank()
789 	pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1);  in exynos_pinctrl_suspend_bank()
790 	pr_debug("%s: save    mask %#010x\n", bank->name, save->eint_mask);  in exynos_pinctrl_suspend_bank()
796 	struct exynos_eint_gpio_save *save = bank->soc_priv;  in exynosauto_pinctrl_suspend_bank()  local
805 	save->eint_con = readl(regs + bank->pctl_offset + bank->eint_con_offset);  in exynosauto_pinctrl_suspend_bank()
806 	save->eint_mask = readl(regs + bank->pctl_offset + bank->eint_mask_offset);  in exynosauto_pinctrl_suspend_bank()
810 	pr_debug("%s: save     con %#010x\n", bank->name, save->eint_con);  in exynosauto_pinctrl_suspend_bank()
811 	pr_debug("%s: save    mask %#010x\n", bank->name, save->eint_mask);  in exynosauto_pinctrl_suspend_bank()
841 	struct exynos_eint_gpio_save *save = bank->soc_priv;  in exynos_pinctrl_resume_bank()  local
852 			+ bank->eint_offset), save->eint_con);  in exynos_pinctrl_resume_bank()
855 			+ 2 * bank->eint_offset), save->eint_fltcon0);  in exynos_pinctrl_resume_bank()
858 			+ 2 * bank->eint_offset + 4), save->eint_fltcon1);  in exynos_pinctrl_resume_bank()
861 			+ bank->eint_offset), save->eint_mask);  in exynos_pinctrl_resume_bank()
863 	writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET  in exynos_pinctrl_resume_bank()
865 	writel(save->eint_fltcon0, regs + EXYNOS_GPIO_EFLTCON_OFFSET  in exynos_pinctrl_resume_bank()
867 	writel(save->eint_fltcon1, regs + EXYNOS_GPIO_EFLTCON_OFFSET  in exynos_pinctrl_resume_bank()
869 	writel(save->eint_mask, regs + bank->irq_chip->eint_mask  in exynos_pinctrl_resume_bank()
878 	struct exynos_eint_gpio_save *save = bank->soc_priv;  in exynosauto_pinctrl_resume_bank()  local
888 		 readl(regs + bank->pctl_offset + bank->eint_con_offset), save->eint_con);  in exynosauto_pinctrl_resume_bank()
890 		 readl(regs + bank->pctl_offset + bank->eint_mask_offset), save->eint_mask);  in exynosauto_pinctrl_resume_bank()
892 	writel(save->eint_con, regs + bank->pctl_offset + bank->eint_con_offset);  in exynosauto_pinctrl_resume_bank()
893 	writel(save->eint_mask, regs + bank->pctl_offset + bank->eint_mask_offset);  in exynosauto_pinctrl_resume_bank()