Lines Matching +full:exynos5410 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
49 unsigned int *pud_val = drvdata->pud_val; in s5pv210_pud_value_init()
58 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
75 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
77 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
79 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
81 pr_err("%s: failed to find clock controller DT node\n", in s5pv210_retention_init()
83 return ERR_PTR(-ENODEV); in s5pv210_retention_init()
89 pr_err("%s: failed to map clock registers\n", __func__); in s5pv210_retention_init()
90 return ERR_PTR(-EINVAL); in s5pv210_retention_init()
93 ctrl->priv = (void __force *)clk_base; in s5pv210_retention_init()
94 ctrl->disable = s5pv210_retention_disable; in s5pv210_retention_init()
103 /* pin banks of s5pv210 pin-controller */
144 /* pin-controller instance 0 data */
164 /* pin banks of exynos3250 pin-controller 0 */
176 /* pin banks of exynos3250 pin-controller 1 */
223 * two gpio/pin-mux/pinconfig controllers.
227 /* pin-controller instance 0 data */
235 /* pin-controller instance 1 data */
251 /* pin banks of exynos4210 pin-controller 0 */
272 /* pin banks of exynos4210 pin-controller 1 */
297 /* pin banks of exynos4210 pin-controller 2 */
335 * three gpio/pin-mux/pinconfig controllers.
339 /* pin-controller instance 0 data */
347 /* pin-controller instance 1 data */
356 /* pin-controller instance 2 data */
368 /* pin banks of exynos4x12 pin-controller 0 */
386 /* pin banks of exynos4x12 pin-controller 1 */
414 /* pin banks of exynos4x12 pin-controller 2 */
420 /* pin banks of exynos4x12 pin-controller 3 */
432 * four gpio/pin-mux/pinconfig controllers.
436 /* pin-controller instance 0 data */
444 /* pin-controller instance 1 data */
453 /* pin-controller instance 2 data */
461 /* pin-controller instance 3 data */
475 /* pin banks of exynos5250 pin-controller 0 */
505 /* pin banks of exynos5250 pin-controller 1 */
519 /* pin banks of exynos5250 pin-controller 2 */
529 /* pin banks of exynos5250 pin-controller 3 */
537 * four gpio/pin-mux/pinconfig controllers.
541 /* pin-controller instance 0 data */
550 /* pin-controller instance 1 data */
558 /* pin-controller instance 2 data */
565 /* pin-controller instance 3 data */
580 /* pin banks of exynos5260 pin-controller 0 */
606 /* pin banks of exynos5260 pin-controller 1 */
616 /* pin banks of exynos5260 pin-controller 2 */
625 * three gpio/pin-mux/pinconfig controllers.
629 /* pin-controller instance 0 data */
637 /* pin-controller instance 1 data */
644 /* pin-controller instance 2 data */
658 /* pin banks of exynos5410 pin-controller 0 */
698 /* pin banks of exynos5410 pin-controller 1 */
712 /* pin banks of exynos5410 pin-controller 2 */
722 /* pin banks of exynos5410 pin-controller 3 */
729 * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes
730 * four gpio/pin-mux/pinconfig controllers.
734 /* pin-controller instance 0 data */
742 /* pin-controller instance 1 data */
749 /* pin-controller instance 2 data */
756 /* pin-controller instance 3 data */
770 /* pin banks of exynos5420 pin-controller 0 */
780 /* pin banks of exynos5420 pin-controller 1 */
798 /* pin banks of exynos5420 pin-controller 2 */
811 /* pin banks of exynos5420 pin-controller 3 */
825 /* pin banks of exynos5420 pin-controller 4 */
857 * four gpio/pin-mux/pinconfig controllers.
861 /* pin-controller instance 0 data */
870 /* pin-controller instance 1 data */
878 /* pin-controller instance 2 data */
886 /* pin-controller instance 3 data */
894 /* pin-controller instance 4 data */