Lines Matching refs:PINMUX_CFG_REG
3028 { PINMUX_CFG_REG("GPSR1", 0xE6050840, 32, 1, GROUP(
3088 { PINMUX_CFG_REG("GPSR3", 0xE6058840, 32, 1, GROUP(
3235 { PINMUX_CFG_REG("IP0SR0", 0xE6050060, 32, 4, GROUP(
3245 { PINMUX_CFG_REG("IP1SR0", 0xE6050064, 32, 4, GROUP(
3263 { PINMUX_CFG_REG("IP0SR1", 0xE6050860, 32, 4, GROUP(
3273 { PINMUX_CFG_REG("IP1SR1", 0xE6050864, 32, 4, GROUP(
3283 { PINMUX_CFG_REG("IP2SR1", 0xE6050868, 32, 4, GROUP(
3304 { PINMUX_CFG_REG("IP0SR2", 0xE6058060, 32, 4, GROUP(
3314 { PINMUX_CFG_REG("IP1SR2", 0xE6058064, 32, 4, GROUP(
3333 { PINMUX_CFG_REG("IP0SR3", 0xE6058860, 32, 4, GROUP(
3343 { PINMUX_CFG_REG("IP1SR3", 0xE6058864, 32, 4, GROUP(
3353 { PINMUX_CFG_REG("IP2SR3", 0xE6058868, 32, 4, GROUP(
3363 { PINMUX_CFG_REG("IP3SR3", 0xE605886C, 32, 4, GROUP(
3373 { PINMUX_CFG_REG("IP0SR4", 0xE6060060, 32, 4, GROUP(
3383 { PINMUX_CFG_REG("IP1SR4", 0xE6060064, 32, 4, GROUP(
3407 { PINMUX_CFG_REG("IP0SR5", 0xE6060860, 32, 4, GROUP(
3417 { PINMUX_CFG_REG("IP1SR5", 0xE6060864, 32, 4, GROUP(
3437 { PINMUX_CFG_REG("IP0SR6", 0xE6061060, 32, 4, GROUP(
3447 { PINMUX_CFG_REG("IP1SR6", 0xE6061064, 32, 4, GROUP(
3467 { PINMUX_CFG_REG("IP0SR7", 0xE6061860, 32, 4, GROUP(
3477 { PINMUX_CFG_REG("IP1SR7", 0xE6061864, 32, 4, GROUP(