Lines Matching refs:sfx
14 #define CPU_ALL_GP(fn, sfx) \ argument
15 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
16 PORT_GP_CFG_32(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
17 PORT_GP_CFG_1(2, 0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
18 PORT_GP_1(2, 1, fn, sfx), \
19 PORT_GP_1(2, 2, fn, sfx), \
20 PORT_GP_1(2, 3, fn, sfx), \
21 PORT_GP_1(2, 4, fn, sfx), \
22 PORT_GP_1(2, 5, fn, sfx), \
23 PORT_GP_1(2, 6, fn, sfx), \
24 PORT_GP_1(2, 7, fn, sfx), \
25 PORT_GP_1(2, 8, fn, sfx), \
26 PORT_GP_1(2, 9, fn, sfx), \
27 PORT_GP_1(2, 10, fn, sfx), \
28 PORT_GP_1(2, 11, fn, sfx), \
29 PORT_GP_1(2, 12, fn, sfx), \
30 PORT_GP_1(2, 13, fn, sfx), \
31 PORT_GP_1(2, 14, fn, sfx), \
32 PORT_GP_1(2, 15, fn, sfx), \
33 PORT_GP_1(2, 16, fn, sfx), \
34 PORT_GP_1(2, 17, fn, sfx), \
35 PORT_GP_1(2, 18, fn, sfx), \
36 PORT_GP_1(2, 19, fn, sfx), \
37 PORT_GP_1(2, 20, fn, sfx), \
38 PORT_GP_1(2, 21, fn, sfx), \
39 PORT_GP_1(2, 22, fn, sfx), \
40 PORT_GP_1(2, 23, fn, sfx), \
41 PORT_GP_1(2, 24, fn, sfx), \
42 PORT_GP_1(2, 25, fn, sfx), \
43 PORT_GP_1(2, 26, fn, sfx), \
44 PORT_GP_1(2, 27, fn, sfx), \
45 PORT_GP_1(2, 28, fn, sfx), \
46 PORT_GP_1(2, 29, fn, sfx), \
47 PORT_GP_CFG_1(2, 30, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
48 PORT_GP_CFG_1(2, 31, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
49 PORT_GP_CFG_25(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
50 PORT_GP_1(3, 25, fn, sfx), \
51 PORT_GP_1(3, 26, fn, sfx), \
52 PORT_GP_1(3, 27, fn, sfx), \
53 PORT_GP_CFG_1(3, 28, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
54 PORT_GP_CFG_1(3, 29, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
55 PORT_GP_CFG_1(3, 30, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
56 PORT_GP_CFG_1(3, 31, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
57 PORT_GP_CFG_32(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
58 PORT_GP_CFG_32(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
59 PORT_GP_CFG_9(6, fn, sfx, SH_PFC_PIN_CFG_PULL_UP)