Lines Matching +full:pmic +full:- +full:mpp
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
25 #include "../pinctrl-utils.h"
27 /* MPP registers */
31 /* MPP Type: type */
90 * struct pm8xxx_pin_data - dynamic configuration for a pin
96 * @paired: mpp operates in paired mode
97 * @output_value: logical output value of the mpp
135 {"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0},
136 {"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0},
175 switch (pin->mode) { in pm8xxx_mpp_update()
177 if (pin->dtest) { in pm8xxx_mpp_update()
179 ctrl = pin->dtest - 1; in pm8xxx_mpp_update()
180 } else if (pin->input && pin->output) { in pm8xxx_mpp_update()
182 if (pin->high_z) in pm8xxx_mpp_update()
184 else if (pin->pullup == 600) in pm8xxx_mpp_update()
186 else if (pin->pullup == 10000) in pm8xxx_mpp_update()
190 } else if (pin->input) { in pm8xxx_mpp_update()
192 if (pin->dtest) in pm8xxx_mpp_update()
193 ctrl = pin->dtest; in pm8xxx_mpp_update()
198 ctrl = !!pin->output_value; in pm8xxx_mpp_update()
199 if (pin->paired) in pm8xxx_mpp_update()
203 level = pin->power_source; in pm8xxx_mpp_update()
206 if (pin->output) { in pm8xxx_mpp_update()
208 level = pin->aout_level; in pm8xxx_mpp_update()
209 ctrl = pin->output_value; in pm8xxx_mpp_update()
210 if (pin->paired) in pm8xxx_mpp_update()
214 level = pin->amux; in pm8xxx_mpp_update()
219 level = (pin->drive_strength / 5) - 1; in pm8xxx_mpp_update()
220 if (pin->dtest) { in pm8xxx_mpp_update()
222 ctrl = pin->dtest - 1; in pm8xxx_mpp_update()
225 ctrl = pin->output_value; in pm8xxx_mpp_update()
226 if (pin->paired) in pm8xxx_mpp_update()
231 return -EINVAL; in pm8xxx_mpp_update()
235 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_mpp_update()
237 dev_err(pctrl->dev, "failed to write register\n"); in pm8xxx_mpp_update()
246 return pctrl->npins; in pm8xxx_get_groups_count()
263 *pins = &pctrl->desc.pins[group].number; in pm8xxx_get_group_pins()
296 *num_groups = pctrl->npins; in pm8xxx_get_function_groups()
305 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux()
307 pin->mode = function; in pm8xxx_pinmux_set_mux()
325 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get()
331 arg = pin->pullup; in pm8xxx_pin_config_get()
334 arg = pin->high_z; in pm8xxx_pin_config_get()
337 arg = pin->input; in pm8xxx_pin_config_get()
340 arg = pin->output_value; in pm8xxx_pin_config_get()
343 arg = pin->power_source; in pm8xxx_pin_config_get()
346 arg = pin->drive_strength; in pm8xxx_pin_config_get()
349 arg = pin->dtest; in pm8xxx_pin_config_get()
352 arg = pin->amux; in pm8xxx_pin_config_get()
355 arg = pin->aout_level; in pm8xxx_pin_config_get()
358 arg = pin->paired; in pm8xxx_pin_config_get()
361 return -EINVAL; in pm8xxx_pin_config_get()
375 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_set()
386 pin->pullup = arg; in pm8xxx_pin_config_set()
389 pin->high_z = true; in pm8xxx_pin_config_set()
392 pin->input = true; in pm8xxx_pin_config_set()
395 pin->output = true; in pm8xxx_pin_config_set()
396 pin->output_value = !!arg; in pm8xxx_pin_config_set()
399 pin->power_source = arg; in pm8xxx_pin_config_set()
402 pin->drive_strength = arg; in pm8xxx_pin_config_set()
405 pin->dtest = arg; in pm8xxx_pin_config_set()
408 pin->amux = arg; in pm8xxx_pin_config_set()
411 pin->aout_level = arg; in pm8xxx_pin_config_set()
414 pin->paired = !!arg; in pm8xxx_pin_config_set()
417 dev_err(pctrl->dev, in pm8xxx_pin_config_set()
420 return -EINVAL; in pm8xxx_pin_config_set()
447 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_direction_input()
449 switch (pin->mode) { in pm8xxx_mpp_direction_input()
451 pin->input = true; in pm8xxx_mpp_direction_input()
454 pin->input = true; in pm8xxx_mpp_direction_input()
455 pin->output = true; in pm8xxx_mpp_direction_input()
458 return -EINVAL; in pm8xxx_mpp_direction_input()
471 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_direction_output()
473 switch (pin->mode) { in pm8xxx_mpp_direction_output()
475 pin->output = true; in pm8xxx_mpp_direction_output()
478 pin->input = false; in pm8xxx_mpp_direction_output()
479 pin->output = true; in pm8xxx_mpp_direction_output()
482 pin->input = false; in pm8xxx_mpp_direction_output()
483 pin->output = true; in pm8xxx_mpp_direction_output()
495 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_get()
499 if (!pin->input) in pm8xxx_mpp_get()
500 return !!pin->output_value; in pm8xxx_mpp_get()
502 irq = chip->to_irq(chip, offset); in pm8xxx_mpp_get()
516 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_set()
518 pin->output_value = !!value; in pm8xxx_mpp_set()
527 if (chip->of_gpio_n_cells < 2) in pm8xxx_mpp_of_xlate()
528 return -EINVAL; in pm8xxx_mpp_of_xlate()
531 *flags = gpio_desc->args[1]; in pm8xxx_mpp_of_xlate()
533 return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET; in pm8xxx_mpp_of_xlate()
546 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_dbg_show_one()
549 "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2", in pm8xxx_mpp_dbg_show_one()
558 seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET); in pm8xxx_mpp_dbg_show_one()
560 switch (pin->mode) { in pm8xxx_mpp_dbg_show_one()
563 if (pin->dtest) { in pm8xxx_mpp_dbg_show_one()
564 seq_printf(s, "dtest%d\n", pin->dtest); in pm8xxx_mpp_dbg_show_one()
565 } else if (pin->input && pin->output) { in pm8xxx_mpp_dbg_show_one()
566 if (pin->high_z) in pm8xxx_mpp_dbg_show_one()
567 seq_puts(s, "bi-dir high-z"); in pm8xxx_mpp_dbg_show_one()
569 seq_printf(s, "bi-dir %dOhm", pin->pullup); in pm8xxx_mpp_dbg_show_one()
570 } else if (pin->input) { in pm8xxx_mpp_dbg_show_one()
571 if (pin->dtest) in pm8xxx_mpp_dbg_show_one()
572 seq_printf(s, "in dtest%d", pin->dtest); in pm8xxx_mpp_dbg_show_one()
575 } else if (pin->output) { in pm8xxx_mpp_dbg_show_one()
578 if (!pin->paired) { in pm8xxx_mpp_dbg_show_one()
579 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
582 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
589 if (pin->output) { in pm8xxx_mpp_dbg_show_one()
590 seq_printf(s, "out %s ", aout_lvls[pin->aout_level]); in pm8xxx_mpp_dbg_show_one()
591 if (!pin->paired) { in pm8xxx_mpp_dbg_show_one()
592 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
595 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
599 seq_printf(s, "input mux %s", amuxs[pin->amux]); in pm8xxx_mpp_dbg_show_one()
603 seq_printf(s, " sink %dmA ", pin->drive_strength); in pm8xxx_mpp_dbg_show_one()
604 if (pin->dtest) { in pm8xxx_mpp_dbg_show_one()
605 seq_printf(s, "dtest%d", pin->dtest); in pm8xxx_mpp_dbg_show_one()
607 if (!pin->paired) { in pm8xxx_mpp_dbg_show_one()
608 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
611 seq_puts(s, pin->output_value ? in pm8xxx_mpp_dbg_show_one()
621 unsigned gpio = chip->base; in pm8xxx_mpp_dbg_show()
624 for (i = 0; i < chip->ngpio; i++, gpio++) { in pm8xxx_mpp_dbg_show()
653 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_pin_populate()
655 dev_err(pctrl->dev, "failed to read register\n"); in pm8xxx_pin_populate()
665 pin->mode = PM8XXX_MPP_DIGITAL; in pm8xxx_pin_populate()
666 pin->input = true; in pm8xxx_pin_populate()
667 pin->power_source = level; in pm8xxx_pin_populate()
668 pin->dtest = ctrl; in pm8xxx_pin_populate()
671 pin->mode = PM8XXX_MPP_DIGITAL; in pm8xxx_pin_populate()
672 pin->output = true; in pm8xxx_pin_populate()
673 pin->power_source = level; in pm8xxx_pin_populate()
674 pin->output_value = !!(ctrl & BIT(0)); in pm8xxx_pin_populate()
675 pin->paired = !!(ctrl & BIT(1)); in pm8xxx_pin_populate()
678 pin->mode = PM8XXX_MPP_DIGITAL; in pm8xxx_pin_populate()
679 pin->input = true; in pm8xxx_pin_populate()
680 pin->output = true; in pm8xxx_pin_populate()
681 pin->power_source = level; in pm8xxx_pin_populate()
684 pin->pullup = 600; in pm8xxx_pin_populate()
687 pin->high_z = true; in pm8xxx_pin_populate()
690 pin->pullup = 10000; in pm8xxx_pin_populate()
693 pin->pullup = 30000; in pm8xxx_pin_populate()
698 pin->mode = PM8XXX_MPP_ANALOG; in pm8xxx_pin_populate()
699 pin->input = true; in pm8xxx_pin_populate()
700 pin->amux = level; in pm8xxx_pin_populate()
703 pin->mode = PM8XXX_MPP_ANALOG; in pm8xxx_pin_populate()
704 pin->output = true; in pm8xxx_pin_populate()
705 pin->aout_level = level; in pm8xxx_pin_populate()
706 pin->output_value = !!(ctrl & BIT(0)); in pm8xxx_pin_populate()
707 pin->paired = !!(ctrl & BIT(1)); in pm8xxx_pin_populate()
710 pin->mode = PM8XXX_MPP_SINK; in pm8xxx_pin_populate()
711 pin->drive_strength = 5 * (level + 1); in pm8xxx_pin_populate()
712 pin->output_value = !!(ctrl & BIT(0)); in pm8xxx_pin_populate()
713 pin->paired = !!(ctrl & BIT(1)); in pm8xxx_pin_populate()
716 pin->mode = PM8XXX_MPP_SINK; in pm8xxx_pin_populate()
717 pin->dtest = ctrl + 1; in pm8xxx_pin_populate()
718 pin->drive_strength = 5 * (level + 1); in pm8xxx_pin_populate()
721 pin->mode = PM8XXX_MPP_DIGITAL; in pm8xxx_pin_populate()
722 pin->power_source = level; in pm8xxx_pin_populate()
724 pin->dtest = ctrl; in pm8xxx_pin_populate()
736 struct pm8xxx_mpp *pctrl = container_of(domain->host_data, in pm8xxx_mpp_domain_translate()
739 if (fwspec->param_count != 2 || in pm8xxx_mpp_domain_translate()
740 fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET || in pm8xxx_mpp_domain_translate()
741 fwspec->param[0] > pctrl->chip.ngpio) in pm8xxx_mpp_domain_translate()
742 return -EINVAL; in pm8xxx_mpp_domain_translate()
744 *hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET; in pm8xxx_mpp_domain_translate()
745 *type = fwspec->param[1]; in pm8xxx_mpp_domain_translate()
795 .name = "ssbi-mpp",
807 { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 },
808 { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 },
809 { .compatible = "qcom,pm8058-mpp", .data = (void *) 12 },
810 { .compatible = "qcom,pm8821-mpp", .data = (void *) 4 },
811 { .compatible = "qcom,pm8917-mpp", .data = (void *) 10 },
812 { .compatible = "qcom,pm8921-mpp", .data = (void *) 12 },
828 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in pm8xxx_mpp_probe()
830 return -ENOMEM; in pm8xxx_mpp_probe()
832 pctrl->dev = &pdev->dev; in pm8xxx_mpp_probe()
833 pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev); in pm8xxx_mpp_probe()
835 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); in pm8xxx_mpp_probe()
836 if (!pctrl->regmap) { in pm8xxx_mpp_probe()
837 dev_err(&pdev->dev, "parent regmap unavailable\n"); in pm8xxx_mpp_probe()
838 return -ENXIO; in pm8xxx_mpp_probe()
841 pctrl->desc = pm8xxx_pinctrl_desc; in pm8xxx_mpp_probe()
842 pctrl->desc.npins = pctrl->npins; in pm8xxx_mpp_probe()
844 pins = devm_kcalloc(&pdev->dev, in pm8xxx_mpp_probe()
845 pctrl->desc.npins, in pm8xxx_mpp_probe()
849 return -ENOMEM; in pm8xxx_mpp_probe()
851 pin_data = devm_kcalloc(&pdev->dev, in pm8xxx_mpp_probe()
852 pctrl->desc.npins, in pm8xxx_mpp_probe()
856 return -ENOMEM; in pm8xxx_mpp_probe()
858 for (i = 0; i < pctrl->desc.npins; i++) { in pm8xxx_mpp_probe()
869 pctrl->desc.pins = pins; in pm8xxx_mpp_probe()
871 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings); in pm8xxx_mpp_probe()
872 pctrl->desc.custom_params = pm8xxx_mpp_bindings; in pm8xxx_mpp_probe()
874 pctrl->desc.custom_conf_items = pm8xxx_conf_items; in pm8xxx_mpp_probe()
877 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); in pm8xxx_mpp_probe()
878 if (IS_ERR(pctrl->pctrl)) { in pm8xxx_mpp_probe()
879 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n"); in pm8xxx_mpp_probe()
880 return PTR_ERR(pctrl->pctrl); in pm8xxx_mpp_probe()
883 pctrl->chip = pm8xxx_mpp_template; in pm8xxx_mpp_probe()
884 pctrl->chip.base = -1; in pm8xxx_mpp_probe()
885 pctrl->chip.parent = &pdev->dev; in pm8xxx_mpp_probe()
886 pctrl->chip.of_gpio_n_cells = 2; in pm8xxx_mpp_probe()
887 pctrl->chip.label = dev_name(pctrl->dev); in pm8xxx_mpp_probe()
888 pctrl->chip.ngpio = pctrl->npins; in pm8xxx_mpp_probe()
890 parent_node = of_irq_find_parent(pctrl->dev->of_node); in pm8xxx_mpp_probe()
892 return -ENXIO; in pm8xxx_mpp_probe()
897 return -ENXIO; in pm8xxx_mpp_probe()
899 girq = &pctrl->chip.irq; in pm8xxx_mpp_probe()
901 girq->default_type = IRQ_TYPE_NONE; in pm8xxx_mpp_probe()
902 girq->handler = handle_level_irq; in pm8xxx_mpp_probe()
903 girq->fwnode = dev_fwnode(pctrl->dev); in pm8xxx_mpp_probe()
904 girq->parent_domain = parent_domain; in pm8xxx_mpp_probe()
905 if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp")) in pm8xxx_mpp_probe()
906 girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq; in pm8xxx_mpp_probe()
908 girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq; in pm8xxx_mpp_probe()
909 girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell; in pm8xxx_mpp_probe()
910 girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq; in pm8xxx_mpp_probe()
911 girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate; in pm8xxx_mpp_probe()
913 ret = gpiochip_add_data(&pctrl->chip, pctrl); in pm8xxx_mpp_probe()
915 dev_err(&pdev->dev, "failed register gpiochip\n"); in pm8xxx_mpp_probe()
919 ret = gpiochip_add_pin_range(&pctrl->chip, in pm8xxx_mpp_probe()
920 dev_name(pctrl->dev), in pm8xxx_mpp_probe()
921 0, 0, pctrl->chip.ngpio); in pm8xxx_mpp_probe()
923 dev_err(pctrl->dev, "failed to add pin range\n"); in pm8xxx_mpp_probe()
929 dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n"); in pm8xxx_mpp_probe()
934 gpiochip_remove(&pctrl->chip); in pm8xxx_mpp_probe()
943 gpiochip_remove(&pctrl->chip); in pm8xxx_mpp_remove()
948 .name = "qcom-ssbi-mpp",
958 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");