Lines Matching +full:stmfx +full:- +full:0300
1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
10 #include <linux/mfd/stmfx.h>
20 #include "pinctrl-utils.h"
53 * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
54 * Pins availability is managed thanks to gpio-ranges property.
85 struct stmfx *stmfx; member
113 ret = regmap_read(pctl->stmfx->map, reg, &value); in stmfx_gpio_get()
124 return regmap_write_bits(pctl->stmfx->map, reg + get_reg(offset), in stmfx_gpio_set()
136 ret = regmap_read(pctl->stmfx->map, reg, &val); in stmfx_gpio_get_direction()
138 * On stmfx, gpio pins direction is (0)input, (1)output. in stmfx_gpio_get_direction()
155 return regmap_write_bits(pctl->stmfx->map, reg, mask, 0); in stmfx_gpio_direction_input()
170 return regmap_write_bits(pctl->stmfx->map, reg, mask, mask); in stmfx_gpio_direction_output()
180 ret = regmap_read(pctl->stmfx->map, reg, &pupd); in stmfx_pinconf_get_pupd()
193 return regmap_write_bits(pctl->stmfx->map, reg, mask, pupd ? mask : 0); in stmfx_pinconf_set_pupd()
203 ret = regmap_read(pctl->stmfx->map, reg, &type); in stmfx_pinconf_get_type()
216 return regmap_write_bits(pctl->stmfx->map, reg, mask, type ? mask : 0); in stmfx_pinconf_set_type()
230 return -EINVAL; in stmfx_pinconf_get()
232 dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin); in stmfx_pinconf_get()
272 return -EINVAL; in stmfx_pinconf_get()
274 ret = stmfx_gpio_get(&pctl->gpio_chip, pin); in stmfx_pinconf_get()
281 return -ENOTSUPP; in stmfx_pinconf_get()
300 dev_err(pctldev->dev, "pin %d is not available\n", pin); in stmfx_pinconf_set()
301 return -EINVAL; in stmfx_pinconf_set()
338 ret = stmfx_gpio_direction_output(&pctl->gpio_chip, in stmfx_pinconf_set()
344 return -ENOTSUPP; in stmfx_pinconf_set()
362 dir = stmfx_gpio_get_direction(&pctl->gpio_chip, offset); in stmfx_pinconf_dbg_show()
371 val = stmfx_gpio_get(&pctl->gpio_chip, offset); in stmfx_pinconf_dbg_show()
378 seq_printf(s, "open drain %s internal pull-up ", in stmfx_pinconf_dbg_show()
385 seq_printf(s, "with internal pull-%s ", in stmfx_pinconf_dbg_show()
414 return -ENOTSUPP; in stmfx_pinctrl_get_group_pins()
429 u32 reg = get_reg(data->hwirq); in stmfx_pinctrl_irq_mask()
430 u32 mask = get_mask(data->hwirq); in stmfx_pinctrl_irq_mask()
432 pctl->irq_gpi_src[reg] &= ~mask; in stmfx_pinctrl_irq_mask()
440 u32 reg = get_reg(data->hwirq); in stmfx_pinctrl_irq_unmask()
441 u32 mask = get_mask(data->hwirq); in stmfx_pinctrl_irq_unmask()
444 pctl->irq_gpi_src[reg] |= mask; in stmfx_pinctrl_irq_unmask()
451 u32 reg = get_reg(data->hwirq); in stmfx_pinctrl_irq_set_type()
452 u32 mask = get_mask(data->hwirq); in stmfx_pinctrl_irq_set_type()
455 return -EINVAL; in stmfx_pinctrl_irq_set_type()
458 pctl->irq_gpi_evt[reg] |= mask; in stmfx_pinctrl_irq_set_type()
461 pctl->irq_gpi_evt[reg] &= ~mask; in stmfx_pinctrl_irq_set_type()
466 pctl->irq_gpi_type[reg] |= mask; in stmfx_pinctrl_irq_set_type()
468 pctl->irq_gpi_type[reg] &= ~mask; in stmfx_pinctrl_irq_set_type()
478 pctl->irq_toggle_edge[reg] |= mask; in stmfx_pinctrl_irq_set_type()
480 pctl->irq_toggle_edge[reg] &= mask; in stmfx_pinctrl_irq_set_type()
490 mutex_lock(&pctl->lock); in stmfx_pinctrl_irq_bus_lock()
497 u32 reg = get_reg(data->hwirq); in stmfx_pinctrl_irq_bus_sync_unlock()
498 u32 mask = get_mask(data->hwirq); in stmfx_pinctrl_irq_bus_sync_unlock()
505 if (pctl->irq_toggle_edge[reg] & mask) { in stmfx_pinctrl_irq_bus_sync_unlock()
506 if (stmfx_gpio_get(gpio_chip, data->hwirq)) in stmfx_pinctrl_irq_bus_sync_unlock()
507 pctl->irq_gpi_type[reg] &= ~mask; in stmfx_pinctrl_irq_bus_sync_unlock()
509 pctl->irq_gpi_type[reg] |= mask; in stmfx_pinctrl_irq_bus_sync_unlock()
512 regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT, in stmfx_pinctrl_irq_bus_sync_unlock()
513 pctl->irq_gpi_evt, NR_GPIO_REGS); in stmfx_pinctrl_irq_bus_sync_unlock()
514 regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE, in stmfx_pinctrl_irq_bus_sync_unlock()
515 pctl->irq_gpi_type, NR_GPIO_REGS); in stmfx_pinctrl_irq_bus_sync_unlock()
516 regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC, in stmfx_pinctrl_irq_bus_sync_unlock()
517 pctl->irq_gpi_src, NR_GPIO_REGS); in stmfx_pinctrl_irq_bus_sync_unlock()
519 mutex_unlock(&pctl->lock); in stmfx_pinctrl_irq_bus_sync_unlock()
527 ret = stmfx_gpio_direction_input(gpio_chip, data->hwirq); in stmfx_gpio_irq_request_resources()
531 return gpiochip_reqres_irq(gpio_chip, data->hwirq); in stmfx_gpio_irq_request_resources()
538 return gpiochip_relres_irq(gpio_chip, data->hwirq); in stmfx_gpio_irq_release_resources()
548 if (!(pctl->irq_toggle_edge[reg] & mask)) in stmfx_pinctrl_irq_toggle_trigger()
551 val = stmfx_gpio_get(&pctl->gpio_chip, offset); in stmfx_pinctrl_irq_toggle_trigger()
556 pctl->irq_gpi_type[reg] &= mask; in stmfx_pinctrl_irq_toggle_trigger()
557 regmap_write_bits(pctl->stmfx->map, in stmfx_pinctrl_irq_toggle_trigger()
562 pctl->irq_gpi_type[reg] |= mask; in stmfx_pinctrl_irq_toggle_trigger()
563 regmap_write_bits(pctl->stmfx->map, in stmfx_pinctrl_irq_toggle_trigger()
572 struct gpio_chip *gc = &pctl->gpio_chip; in stmfx_pinctrl_irq_thread_fn()
578 ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_IRQ_GPI_PENDING, in stmfx_pinctrl_irq_thread_fn()
583 regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC, in stmfx_pinctrl_irq_thread_fn()
589 for_each_set_bit(n, &status, gc->ngpio) { in stmfx_pinctrl_irq_thread_fn()
590 handle_nested_irq(irq_find_mapping(gc->irq.domain, n)); in stmfx_pinctrl_irq_thread_fn()
594 regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC, in stmfx_pinctrl_irq_thread_fn()
595 pctl->irq_gpi_src, NR_GPIO_REGS); in stmfx_pinctrl_irq_thread_fn()
605 seq_puts(p, dev_name(pctl->dev)); in stmfx_pinctrl_irq_print_chip()
623 struct pinctrl_dev *pctl_dev = pctl->pctl_dev; in stmfx_pinctrl_gpio_function_enable()
626 pctl->gpio_valid_mask = GENMASK(15, 0); in stmfx_pinctrl_gpio_function_enable()
631 pctl->gpio_valid_mask |= GENMASK(19, 16); in stmfx_pinctrl_gpio_function_enable()
637 pctl->gpio_valid_mask |= GENMASK(23, 20); in stmfx_pinctrl_gpio_function_enable()
640 return stmfx_function_enable(pctl->stmfx, func); in stmfx_pinctrl_gpio_function_enable()
645 struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent); in stmfx_pinctrl_probe() local
646 struct device_node *np = pdev->dev.of_node; in stmfx_pinctrl_probe()
651 pctl = devm_kzalloc(stmfx->dev, sizeof(*pctl), GFP_KERNEL); in stmfx_pinctrl_probe()
653 return -ENOMEM; in stmfx_pinctrl_probe()
657 pctl->dev = &pdev->dev; in stmfx_pinctrl_probe()
658 pctl->stmfx = stmfx; in stmfx_pinctrl_probe()
660 if (!of_property_present(np, "gpio-ranges")) { in stmfx_pinctrl_probe()
661 dev_err(pctl->dev, "missing required gpio-ranges property\n"); in stmfx_pinctrl_probe()
662 return -EINVAL; in stmfx_pinctrl_probe()
669 mutex_init(&pctl->lock); in stmfx_pinctrl_probe()
672 pctl->pctl_desc.name = "stmfx-pinctrl"; in stmfx_pinctrl_probe()
673 pctl->pctl_desc.pctlops = &stmfx_pinctrl_ops; in stmfx_pinctrl_probe()
674 pctl->pctl_desc.confops = &stmfx_pinconf_ops; in stmfx_pinctrl_probe()
675 pctl->pctl_desc.pins = stmfx_pins; in stmfx_pinctrl_probe()
676 pctl->pctl_desc.npins = ARRAY_SIZE(stmfx_pins); in stmfx_pinctrl_probe()
677 pctl->pctl_desc.owner = THIS_MODULE; in stmfx_pinctrl_probe()
678 pctl->pctl_desc.link_consumers = true; in stmfx_pinctrl_probe()
680 ret = devm_pinctrl_register_and_init(pctl->dev, &pctl->pctl_desc, in stmfx_pinctrl_probe()
681 pctl, &pctl->pctl_dev); in stmfx_pinctrl_probe()
683 dev_err(pctl->dev, "pinctrl registration failed\n"); in stmfx_pinctrl_probe()
687 ret = pinctrl_enable(pctl->pctl_dev); in stmfx_pinctrl_probe()
689 dev_err(pctl->dev, "pinctrl enable failed\n"); in stmfx_pinctrl_probe()
694 pctl->gpio_chip.label = "stmfx-gpio"; in stmfx_pinctrl_probe()
695 pctl->gpio_chip.parent = pctl->dev; in stmfx_pinctrl_probe()
696 pctl->gpio_chip.get_direction = stmfx_gpio_get_direction; in stmfx_pinctrl_probe()
697 pctl->gpio_chip.direction_input = stmfx_gpio_direction_input; in stmfx_pinctrl_probe()
698 pctl->gpio_chip.direction_output = stmfx_gpio_direction_output; in stmfx_pinctrl_probe()
699 pctl->gpio_chip.get = stmfx_gpio_get; in stmfx_pinctrl_probe()
700 pctl->gpio_chip.set_rv = stmfx_gpio_set; in stmfx_pinctrl_probe()
701 pctl->gpio_chip.set_config = gpiochip_generic_config; in stmfx_pinctrl_probe()
702 pctl->gpio_chip.base = -1; in stmfx_pinctrl_probe()
703 pctl->gpio_chip.ngpio = pctl->pctl_desc.npins; in stmfx_pinctrl_probe()
704 pctl->gpio_chip.can_sleep = true; in stmfx_pinctrl_probe()
706 girq = &pctl->gpio_chip.irq; in stmfx_pinctrl_probe()
709 girq->parent_handler = NULL; in stmfx_pinctrl_probe()
710 girq->num_parents = 0; in stmfx_pinctrl_probe()
711 girq->parents = NULL; in stmfx_pinctrl_probe()
712 girq->default_type = IRQ_TYPE_NONE; in stmfx_pinctrl_probe()
713 girq->handler = handle_bad_irq; in stmfx_pinctrl_probe()
714 girq->threaded = true; in stmfx_pinctrl_probe()
716 ret = devm_gpiochip_add_data(pctl->dev, &pctl->gpio_chip, pctl); in stmfx_pinctrl_probe()
718 dev_err(pctl->dev, "gpio_chip registration failed\n"); in stmfx_pinctrl_probe()
726 ret = devm_request_threaded_irq(pctl->dev, irq, NULL, in stmfx_pinctrl_probe()
729 dev_name(pctl->dev), pctl); in stmfx_pinctrl_probe()
731 dev_err(pctl->dev, "cannot request irq%d\n", irq); in stmfx_pinctrl_probe()
735 dev_info(pctl->dev, in stmfx_pinctrl_probe()
736 "%ld GPIOs available\n", hweight_long(pctl->gpio_valid_mask)); in stmfx_pinctrl_probe()
743 struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent); in stmfx_pinctrl_remove() local
746 ret = stmfx_function_disable(stmfx, in stmfx_pinctrl_remove()
751 dev_err(&pdev->dev, "Failed to disable pins (%pe)\n", in stmfx_pinctrl_remove()
760 ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_STATE, in stmfx_pinctrl_backup_regs()
761 &pctl->bkp_gpio_state, NR_GPIO_REGS); in stmfx_pinctrl_backup_regs()
764 ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_DIR, in stmfx_pinctrl_backup_regs()
765 &pctl->bkp_gpio_dir, NR_GPIO_REGS); in stmfx_pinctrl_backup_regs()
768 ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_TYPE, in stmfx_pinctrl_backup_regs()
769 &pctl->bkp_gpio_type, NR_GPIO_REGS); in stmfx_pinctrl_backup_regs()
772 ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_PUPD, in stmfx_pinctrl_backup_regs()
773 &pctl->bkp_gpio_pupd, NR_GPIO_REGS); in stmfx_pinctrl_backup_regs()
784 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_DIR, in stmfx_pinctrl_restore_regs()
785 pctl->bkp_gpio_dir, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
788 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_TYPE, in stmfx_pinctrl_restore_regs()
789 pctl->bkp_gpio_type, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
792 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_PUPD, in stmfx_pinctrl_restore_regs()
793 pctl->bkp_gpio_pupd, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
796 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPO_SET, in stmfx_pinctrl_restore_regs()
797 pctl->bkp_gpio_state, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
800 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT, in stmfx_pinctrl_restore_regs()
801 pctl->irq_gpi_evt, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
804 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE, in stmfx_pinctrl_restore_regs()
805 pctl->irq_gpi_type, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
808 ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC, in stmfx_pinctrl_restore_regs()
809 pctl->irq_gpi_src, NR_GPIO_REGS); in stmfx_pinctrl_restore_regs()
823 dev_err(pctl->dev, "registers backup failure\n"); in stmfx_pinctrl_suspend()
837 dev_err(pctl->dev, "registers restoration failure\n"); in stmfx_pinctrl_resume()
849 { .compatible = "st,stmfx-0300-pinctrl", },
856 .name = "stmfx-pinctrl",
865 MODULE_DESCRIPTION("STMFX pinctrl/GPIO driver");