30 	struct pinctrl_dev *pctrl;  member
217 	struct pic64gx_gpio2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev);  in pic64gx_gpio2_pin_dbg_show()  local
220 	regmap_read(pctrl->regmap, PIC64GX_PINMUX_REG, &val);  in pic64gx_gpio2_pin_dbg_show()
277 	struct pic64gx_gpio2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev);  in pic64gx_gpio2_pinmux_set_mux()  local
278 	struct device *dev = pctrl->dev;  in pic64gx_gpio2_pinmux_set_mux()
287 	regmap_assign_bits(pctrl->regmap, PIC64GX_PINMUX_REG, group->mask, group->setting);  in pic64gx_gpio2_pinmux_set_mux()
302 	struct pic64gx_gpio2_pinctrl *pctrl;  in pic64gx_gpio2_probe()  local
305 	pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);  in pic64gx_gpio2_probe()
306 	if (!pctrl)  in pic64gx_gpio2_probe()
315 	pctrl->regmap = devm_regmap_init_mmio(dev, base, &pic64gx_gpio2_regmap_config);  in pic64gx_gpio2_probe()
316 	if (IS_ERR(pctrl->regmap)) {  in pic64gx_gpio2_probe()
318 		return PTR_ERR(pctrl->regmap);  in pic64gx_gpio2_probe()
321 	pctrl->desc.name = dev_name(dev);  in pic64gx_gpio2_probe()
322 	pctrl->desc.pins = pic64gx_gpio2_pins;  in pic64gx_gpio2_probe()
323 	pctrl->desc.npins = ARRAY_SIZE(pic64gx_gpio2_pins);  in pic64gx_gpio2_probe()
324 	pctrl->desc.pctlops = &pic64gx_gpio2_pinctrl_ops;  in pic64gx_gpio2_probe()
325 	pctrl->desc.pmxops = &pic64gx_gpio2_pinmux_ops;  in pic64gx_gpio2_probe()
326 	pctrl->desc.owner = THIS_MODULE;  in pic64gx_gpio2_probe()
328 	pctrl->dev = dev;  in pic64gx_gpio2_probe()
330 	platform_set_drvdata(pdev, pctrl);  in pic64gx_gpio2_probe()
332 	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);  in pic64gx_gpio2_probe()
333 	if (IS_ERR(pctrl->pctrl))  in pic64gx_gpio2_probe()
334 		return PTR_ERR(pctrl->pctrl);  in pic64gx_gpio2_probe()