Lines Matching +full:5 +full:c

4  * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
36 #define LPC18XX_SCU_PIN_EHS BIT(5)
58 #define LPC18XX_SCU_PINTSEL_PORT_SHIFT 5
207 #define LPC18XX_ANALOG_ADC(a) ((a >> 5) & 0x3)
209 #define ADC0 (LPC18XX_ANALOG_PIN | (0x00 << 5))
210 #define ADC1 (LPC18XX_ANALOG_PIN | (0x01 << 5))
247 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
268 LPC_P(2,5, SGPIO, CTIN, USB1, ADCTRIG, GPIO, R, TIMER3, USB0, 0, HD);
282 LPC_P(3,5, GPIO, R, R, SPIFI, UART1, I2S0_TX_SDA,I2S1, LCD, 0, ND);
291 LPC_P(4,5, GPIO, CTOUT, LCD, R, R, R, R, SGPIO, 0, ND);
297 LPC_P(5,0, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
298 LPC_P(5,1, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
299 LPC_P(5,2, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
300 LPC_P(5,3, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
301 LPC_P(5,4, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
302 LPC_P(5,5, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
303 LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
304 LPC_P(5,7, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
310 LPC_P(6,5, GPIO, CTOUT, UART0, EMC, R, R, R, R, 0, ND);
323 LPC_P(7,5, GPIO, CTOUT, R, LCD,LCD_ALT, TRACE, R, R, ADC0|3, ND);
331 LPC_P(8,5, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND);
340 LPC_P(9,5, R, MCTRL, USB1, R, GPIO, ENET, SGPIO, UART0, 0, ND);
352 LPC_P(b,5, R, USB1, LCD, R, GPIO, CTIN, LCD_ALT, R, 0, ND);
354 LPC_P(c,0, R, USB1, R, ENET, LCD, R, R, SDMMC, ADC1|1, ND);
355 LPC_P(c,1, USB1, R, UART1, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
356 LPC_P(c,2, USB1, R, UART1, ENET, GPIO, R, R, SDMMC, 0, ND);
357 LPC_P(c,3, USB1, R, UART1, ENET, GPIO, R, R, SDMMC, ADC1|0, ND);
358 LPC_P(c,4, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
359 LPC_P(c,5, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
360 LPC_P(c,6, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
361 LPC_P(c,7, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
362 LPC_P(c,8, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
363 LPC_P(c,9, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND);
364 LPC_P(c,10, R, USB1, UART1, R, GPIO, R, TIMER3, SDMMC, 0, ND);
365 LPC_P(c,11, R, USB1, UART1, R, GPIO, R, R, SDMMC, 0, ND);
366 LPC_P(c,12, R, R, UART1, R, GPIO, SGPIO, I2S0_TX_SDA,SDMMC, 0, ND);
367 LPC_P(c,13, R, R, UART1, R, GPIO, SGPIO, I2S0_TX_WS, SDMMC, 0, ND);
368 LPC_P(c,14, R, R, UART1, R, GPIO, SGPIO, ENET, SDMMC, 0, ND);
374 LPC_P(d,5, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND);
391 LPC_P(e,5, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND);
407 LPC_P(f,5, R, UART3, SSP1, TRACE, GPIO, R, SGPIO, R, ADC1|4, ND);
412 LPC_P(f,10, R, UART0, R, R, GPIO, R, SDMMC, R, ADC0|5, ND);
413 LPC_P(f,11, R, UART0, R, R, GPIO, R, SDMMC, R, ADC1|5, ND);
457 LPC18XX_PIN_P(1,5),
478 LPC18XX_PIN_P(2,5),
492 LPC18XX_PIN_P(3,5),
501 LPC18XX_PIN_P(4,5),
507 LPC18XX_PIN_P(5,0),
508 LPC18XX_PIN_P(5,1),
509 LPC18XX_PIN_P(5,2),
510 LPC18XX_PIN_P(5,3),
511 LPC18XX_PIN_P(5,4),
512 LPC18XX_PIN_P(5,5),
513 LPC18XX_PIN_P(5,6),
514 LPC18XX_PIN_P(5,7),
520 LPC18XX_PIN_P(6,5),
533 LPC18XX_PIN_P(7,5),
541 LPC18XX_PIN_P(8,5),
550 LPC18XX_PIN_P(9,5),
562 LPC18XX_PIN_P(b,5),
564 LPC18XX_PIN_P(c,0),
565 LPC18XX_PIN_P(c,1),
566 LPC18XX_PIN_P(c,2),
567 LPC18XX_PIN_P(c,3),
568 LPC18XX_PIN_P(c,4),
569 LPC18XX_PIN_P(c,5),
570 LPC18XX_PIN_P(c,6),
571 LPC18XX_PIN_P(c,7),
572 LPC18XX_PIN_P(c,8),
573 LPC18XX_PIN_P(c,9),
574 LPC18XX_PIN_P(c,10),
575 LPC18XX_PIN_P(c,11),
576 LPC18XX_PIN_P(c,12),
577 LPC18XX_PIN_P(c,13),
578 LPC18XX_PIN_P(c,14),
584 LPC18XX_PIN_P(d,5),
601 LPC18XX_PIN_P(e,5),
617 LPC18XX_PIN_P(f,5),
842 case 3: *arg += 5; in lpc18xx_pconf_get_pin()
844 case 2: *arg += 5; in lpc18xx_pconf_get_pin()
1061 case 20: param_val -= 5; in lpc18xx_pconf_set_pin()
1063 case 14: param_val -= 5; in lpc18xx_pconf_set_pin()