Lines Matching +full:0 +full:x7
22 #define KEEMBAY_GPIO_DATA_OUT 0x000
23 #define KEEMBAY_GPIO_DATA_IN 0x020
24 #define KEEMBAY_GPIO_DATA_IN_RAW 0x040
25 #define KEEMBAY_GPIO_DATA_HIGH 0x060
26 #define KEEMBAY_GPIO_DATA_LOW 0x080
29 #define KEEMBAY_GPIO_INT_CFG 0x000
30 #define KEEMBAY_GPIO_MODE 0x070
36 #define KEEMBAY_GPIO_MODE_SELECT_MASK GENMASK(2, 0)
43 #define KEEMBAY_GPIO_MODE_DEFAULT 0x7
44 #define KEEMBAY_GPIO_MODE_INV_VAL 0x3
46 #define KEEMBAY_GPIO_DISABLE 0
84 * @source: Interrupt source number (0 - 7)
139 KEEMBAY_PIN_DESC(0, "GPIO0",
140 KEEMBAY_MUX(0x0, "I2S0_M0"),
141 KEEMBAY_MUX(0x1, "SD0_M1"),
142 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
143 KEEMBAY_MUX(0x3, "I2C0_M3"),
144 KEEMBAY_MUX(0x4, "CAM_M4"),
145 KEEMBAY_MUX(0x5, "ETH_M5"),
146 KEEMBAY_MUX(0x6, "LCD_M6"),
147 KEEMBAY_MUX(0x7, "GPIO_M7")),
149 KEEMBAY_MUX(0x0, "I2S0_M0"),
150 KEEMBAY_MUX(0x1, "SD0_M1"),
151 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
152 KEEMBAY_MUX(0x3, "I2C0_M3"),
153 KEEMBAY_MUX(0x4, "CAM_M4"),
154 KEEMBAY_MUX(0x5, "ETH_M5"),
155 KEEMBAY_MUX(0x6, "LCD_M6"),
156 KEEMBAY_MUX(0x7, "GPIO_M7")),
158 KEEMBAY_MUX(0x0, "I2S0_M0"),
159 KEEMBAY_MUX(0x1, "I2S0_M1"),
160 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
161 KEEMBAY_MUX(0x3, "I2C1_M3"),
162 KEEMBAY_MUX(0x4, "CAM_M4"),
163 KEEMBAY_MUX(0x5, "ETH_M5"),
164 KEEMBAY_MUX(0x6, "LCD_M6"),
165 KEEMBAY_MUX(0x7, "GPIO_M7")),
167 KEEMBAY_MUX(0x0, "I2S0_M0"),
168 KEEMBAY_MUX(0x1, "I2S0_M1"),
169 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
170 KEEMBAY_MUX(0x3, "I2C1_M3"),
171 KEEMBAY_MUX(0x4, "CAM_M4"),
172 KEEMBAY_MUX(0x5, "ETH_M5"),
173 KEEMBAY_MUX(0x6, "LCD_M6"),
174 KEEMBAY_MUX(0x7, "GPIO_M7")),
176 KEEMBAY_MUX(0x0, "I2S0_M0"),
177 KEEMBAY_MUX(0x1, "I2S0_M1"),
178 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
179 KEEMBAY_MUX(0x3, "I2C2_M3"),
180 KEEMBAY_MUX(0x4, "CAM_M4"),
181 KEEMBAY_MUX(0x5, "ETH_M5"),
182 KEEMBAY_MUX(0x6, "LCD_M6"),
183 KEEMBAY_MUX(0x7, "GPIO_M7")),
185 KEEMBAY_MUX(0x0, "I2S0_M0"),
186 KEEMBAY_MUX(0x1, "I2S0_M1"),
187 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
188 KEEMBAY_MUX(0x3, "I2C2_M3"),
189 KEEMBAY_MUX(0x4, "CAM_M4"),
190 KEEMBAY_MUX(0x5, "ETH_M5"),
191 KEEMBAY_MUX(0x6, "LCD_M6"),
192 KEEMBAY_MUX(0x7, "GPIO_M7")),
194 KEEMBAY_MUX(0x0, "I2S1_M0"),
195 KEEMBAY_MUX(0x1, "SD0_M1"),
196 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
197 KEEMBAY_MUX(0x3, "I2C3_M3"),
198 KEEMBAY_MUX(0x4, "CAM_M4"),
199 KEEMBAY_MUX(0x5, "ETH_M5"),
200 KEEMBAY_MUX(0x6, "LCD_M6"),
201 KEEMBAY_MUX(0x7, "GPIO_M7")),
203 KEEMBAY_MUX(0x0, "I2S1_M0"),
204 KEEMBAY_MUX(0x1, "SD0_M1"),
205 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
206 KEEMBAY_MUX(0x3, "I2C3_M3"),
207 KEEMBAY_MUX(0x4, "CAM_M4"),
208 KEEMBAY_MUX(0x5, "ETH_M5"),
209 KEEMBAY_MUX(0x6, "LCD_M6"),
210 KEEMBAY_MUX(0x7, "GPIO_M7")),
212 KEEMBAY_MUX(0x0, "I2S1_M0"),
213 KEEMBAY_MUX(0x1, "I2S1_M1"),
214 KEEMBAY_MUX(0x2, "SLVDS0_M2"),
215 KEEMBAY_MUX(0x3, "UART0_M3"),
216 KEEMBAY_MUX(0x4, "CAM_M4"),
217 KEEMBAY_MUX(0x5, "ETH_M5"),
218 KEEMBAY_MUX(0x6, "LCD_M6"),
219 KEEMBAY_MUX(0x7, "GPIO_M7")),
221 KEEMBAY_MUX(0x0, "I2S1_M0"),
222 KEEMBAY_MUX(0x1, "I2S1_M1"),
223 KEEMBAY_MUX(0x2, "PWM_M2"),
224 KEEMBAY_MUX(0x3, "UART0_M3"),
225 KEEMBAY_MUX(0x4, "CAM_M4"),
226 KEEMBAY_MUX(0x5, "ETH_M5"),
227 KEEMBAY_MUX(0x6, "LCD_M6"),
228 KEEMBAY_MUX(0x7, "GPIO_M7")),
230 KEEMBAY_MUX(0x0, "I2S2_M0"),
231 KEEMBAY_MUX(0x1, "SD0_M1"),
232 KEEMBAY_MUX(0x2, "PWM_M2"),
233 KEEMBAY_MUX(0x3, "UART0_M3"),
234 KEEMBAY_MUX(0x4, "CAM_M4"),
235 KEEMBAY_MUX(0x5, "ETH_M5"),
236 KEEMBAY_MUX(0x6, "LCD_M6"),
237 KEEMBAY_MUX(0x7, "GPIO_M7")),
239 KEEMBAY_MUX(0x0, "I2S2_M0"),
240 KEEMBAY_MUX(0x1, "SD0_M1"),
241 KEEMBAY_MUX(0x2, "PWM_M2"),
242 KEEMBAY_MUX(0x3, "UART0_M3"),
243 KEEMBAY_MUX(0x4, "CAM_M4"),
244 KEEMBAY_MUX(0x5, "ETH_M5"),
245 KEEMBAY_MUX(0x6, "LCD_M6"),
246 KEEMBAY_MUX(0x7, "GPIO_M7")),
248 KEEMBAY_MUX(0x0, "I2S2_M0"),
249 KEEMBAY_MUX(0x1, "I2S2_M1"),
250 KEEMBAY_MUX(0x2, "PWM_M2"),
251 KEEMBAY_MUX(0x3, "SPI0_M3"),
252 KEEMBAY_MUX(0x4, "CAM_M4"),
253 KEEMBAY_MUX(0x5, "ETH_M5"),
254 KEEMBAY_MUX(0x6, "LCD_M6"),
255 KEEMBAY_MUX(0x7, "GPIO_M7")),
257 KEEMBAY_MUX(0x0, "I2S2_M0"),
258 KEEMBAY_MUX(0x1, "I2S2_M1"),
259 KEEMBAY_MUX(0x2, "PWM_M2"),
260 KEEMBAY_MUX(0x3, "SPI0_M3"),
261 KEEMBAY_MUX(0x4, "CAM_M4"),
262 KEEMBAY_MUX(0x5, "ETH_M5"),
263 KEEMBAY_MUX(0x6, "LCD_M6"),
264 KEEMBAY_MUX(0x7, "GPIO_M7")),
266 KEEMBAY_MUX(0x0, "UART0_M0"),
267 KEEMBAY_MUX(0x1, "I2S3_M1"),
268 KEEMBAY_MUX(0x2, "PWM_M2"),
269 KEEMBAY_MUX(0x3, "SD1_M3"),
270 KEEMBAY_MUX(0x4, "CAM_M4"),
271 KEEMBAY_MUX(0x5, "ETH_M5"),
272 KEEMBAY_MUX(0x6, "LCD_M6"),
273 KEEMBAY_MUX(0x7, "GPIO_M7")),
275 KEEMBAY_MUX(0x0, "UART0_M0"),
276 KEEMBAY_MUX(0x1, "I2S3_M1"),
277 KEEMBAY_MUX(0x2, "UART0_M2"),
278 KEEMBAY_MUX(0x3, "SD1_M3"),
279 KEEMBAY_MUX(0x4, "CAM_M4"),
280 KEEMBAY_MUX(0x5, "SPI1_M5"),
281 KEEMBAY_MUX(0x6, "LCD_M6"),
282 KEEMBAY_MUX(0x7, "GPIO_M7")),
284 KEEMBAY_MUX(0x0, "UART0_M0"),
285 KEEMBAY_MUX(0x1, "I2S3_M1"),
286 KEEMBAY_MUX(0x2, "UART0_M2"),
287 KEEMBAY_MUX(0x3, "SD1_M3"),
288 KEEMBAY_MUX(0x4, "CAM_M4"),
289 KEEMBAY_MUX(0x5, "SPI1_M5"),
290 KEEMBAY_MUX(0x6, "LCD_M6"),
291 KEEMBAY_MUX(0x7, "GPIO_M7")),
293 KEEMBAY_MUX(0x0, "UART0_M0"),
294 KEEMBAY_MUX(0x1, "I2S3_M1"),
295 KEEMBAY_MUX(0x2, "I2S3_M2"),
296 KEEMBAY_MUX(0x3, "SD1_M3"),
297 KEEMBAY_MUX(0x4, "CAM_M4"),
298 KEEMBAY_MUX(0x5, "SPI1_M5"),
299 KEEMBAY_MUX(0x6, "LCD_M6"),
300 KEEMBAY_MUX(0x7, "GPIO_M7")),
302 KEEMBAY_MUX(0x0, "UART1_M0"),
303 KEEMBAY_MUX(0x1, "SPI0_M1"),
304 KEEMBAY_MUX(0x2, "I2S3_M2"),
305 KEEMBAY_MUX(0x3, "SD1_M3"),
306 KEEMBAY_MUX(0x4, "CAM_M4"),
307 KEEMBAY_MUX(0x5, "SPI1_M5"),
308 KEEMBAY_MUX(0x6, "LCD_M6"),
309 KEEMBAY_MUX(0x7, "GPIO_M7")),
311 KEEMBAY_MUX(0x0, "UART1_M0"),
312 KEEMBAY_MUX(0x1, "LCD_M1"),
313 KEEMBAY_MUX(0x2, "DEBUG_M2"),
314 KEEMBAY_MUX(0x3, "SD1_M3"),
315 KEEMBAY_MUX(0x4, "CAM_M4"),
316 KEEMBAY_MUX(0x5, "SPI1_M5"),
317 KEEMBAY_MUX(0x6, "LCD_M6"),
318 KEEMBAY_MUX(0x7, "GPIO_M7")),
320 KEEMBAY_MUX(0x0, "UART1_M0"),
321 KEEMBAY_MUX(0x1, "LCD_M1"),
322 KEEMBAY_MUX(0x2, "DEBUG_M2"),
323 KEEMBAY_MUX(0x3, "CPR_M3"),
324 KEEMBAY_MUX(0x4, "CAM_M4"),
325 KEEMBAY_MUX(0x5, "SPI1_M5"),
326 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
327 KEEMBAY_MUX(0x7, "GPIO_M7")),
329 KEEMBAY_MUX(0x0, "UART1_M0"),
330 KEEMBAY_MUX(0x1, "LCD_M1"),
331 KEEMBAY_MUX(0x2, "DEBUG_M2"),
332 KEEMBAY_MUX(0x3, "CPR_M3"),
333 KEEMBAY_MUX(0x4, "CAM_M4"),
334 KEEMBAY_MUX(0x5, "I3C0_M5"),
335 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
336 KEEMBAY_MUX(0x7, "GPIO_M7")),
338 KEEMBAY_MUX(0x0, "I2C0_M0"),
339 KEEMBAY_MUX(0x1, "UART2_M1"),
340 KEEMBAY_MUX(0x2, "DEBUG_M2"),
341 KEEMBAY_MUX(0x3, "CPR_M3"),
342 KEEMBAY_MUX(0x4, "CAM_M4"),
343 KEEMBAY_MUX(0x5, "I3C0_M5"),
344 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
345 KEEMBAY_MUX(0x7, "GPIO_M7")),
347 KEEMBAY_MUX(0x0, "I2C0_M0"),
348 KEEMBAY_MUX(0x1, "UART2_M1"),
349 KEEMBAY_MUX(0x2, "DEBUG_M2"),
350 KEEMBAY_MUX(0x3, "CPR_M3"),
351 KEEMBAY_MUX(0x4, "CAM_M4"),
352 KEEMBAY_MUX(0x5, "I3C1_M5"),
353 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
354 KEEMBAY_MUX(0x7, "GPIO_M7")),
356 KEEMBAY_MUX(0x0, "I2C1_M0"),
357 KEEMBAY_MUX(0x1, "UART2_M1"),
358 KEEMBAY_MUX(0x2, "DEBUG_M2"),
359 KEEMBAY_MUX(0x3, "CPR_M3"),
360 KEEMBAY_MUX(0x4, "CAM_M4"),
361 KEEMBAY_MUX(0x5, "I3C1_M5"),
362 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
363 KEEMBAY_MUX(0x7, "GPIO_M7")),
365 KEEMBAY_MUX(0x0, "I2C1_M0"),
366 KEEMBAY_MUX(0x1, "UART2_M1"),
367 KEEMBAY_MUX(0x2, "SPI0_M2"),
368 KEEMBAY_MUX(0x3, "CPR_M3"),
369 KEEMBAY_MUX(0x4, "CAM_M4"),
370 KEEMBAY_MUX(0x5, "I3C2_M5"),
371 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
372 KEEMBAY_MUX(0x7, "GPIO_M7")),
374 KEEMBAY_MUX(0x0, "SPI0_M0"),
375 KEEMBAY_MUX(0x1, "I2C2_M1"),
376 KEEMBAY_MUX(0x2, "UART0_M2"),
377 KEEMBAY_MUX(0x3, "DSU_M3"),
378 KEEMBAY_MUX(0x4, "CAM_M4"),
379 KEEMBAY_MUX(0x5, "I3C2_M5"),
380 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
381 KEEMBAY_MUX(0x7, "GPIO_M7")),
383 KEEMBAY_MUX(0x0, "SPI0_M0"),
384 KEEMBAY_MUX(0x1, "I2C2_M1"),
385 KEEMBAY_MUX(0x2, "UART0_M2"),
386 KEEMBAY_MUX(0x3, "DSU_M3"),
387 KEEMBAY_MUX(0x4, "CAM_M4"),
388 KEEMBAY_MUX(0x5, "I3C0_M5"),
389 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
390 KEEMBAY_MUX(0x7, "GPIO_M7")),
392 KEEMBAY_MUX(0x0, "SPI0_M0"),
393 KEEMBAY_MUX(0x1, "I2C3_M1"),
394 KEEMBAY_MUX(0x2, "UART0_M2"),
395 KEEMBAY_MUX(0x3, "PWM_M3"),
396 KEEMBAY_MUX(0x4, "CAM_M4"),
397 KEEMBAY_MUX(0x5, "I3C1_M5"),
398 KEEMBAY_MUX(0x6, "SLVDS0_M6"),
399 KEEMBAY_MUX(0x7, "GPIO_M7")),
401 KEEMBAY_MUX(0x0, "SPI0_M0"),
402 KEEMBAY_MUX(0x1, "I2C3_M1"),
403 KEEMBAY_MUX(0x2, "UART0_M2"),
404 KEEMBAY_MUX(0x3, "PWM_M3"),
405 KEEMBAY_MUX(0x4, "CAM_M4"),
406 KEEMBAY_MUX(0x5, "I3C2_M5"),
407 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
408 KEEMBAY_MUX(0x7, "GPIO_M7")),
410 KEEMBAY_MUX(0x0, "SPI0_M0"),
411 KEEMBAY_MUX(0x1, "I2S0_M1"),
412 KEEMBAY_MUX(0x2, "I2C4_M2"),
413 KEEMBAY_MUX(0x3, "PWM_M3"),
414 KEEMBAY_MUX(0x4, "CAM_M4"),
415 KEEMBAY_MUX(0x5, "LCD_M5"),
416 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
417 KEEMBAY_MUX(0x7, "GPIO_M7")),
419 KEEMBAY_MUX(0x0, "SPI0_M0"),
420 KEEMBAY_MUX(0x1, "I2S0_M1"),
421 KEEMBAY_MUX(0x2, "I2C4_M2"),
422 KEEMBAY_MUX(0x3, "PWM_M3"),
423 KEEMBAY_MUX(0x4, "CAM_M4"),
424 KEEMBAY_MUX(0x5, "UART1_M5"),
425 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
426 KEEMBAY_MUX(0x7, "GPIO_M7")),
428 KEEMBAY_MUX(0x0, "SD0_M0"),
429 KEEMBAY_MUX(0x1, "SPI0_M1"),
430 KEEMBAY_MUX(0x2, "UART1_M2"),
431 KEEMBAY_MUX(0x3, "PWM_M3"),
432 KEEMBAY_MUX(0x4, "CAM_M4"),
433 KEEMBAY_MUX(0x5, "PCIE_M5"),
434 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
435 KEEMBAY_MUX(0x7, "GPIO_M7")),
437 KEEMBAY_MUX(0x0, "SD0_M0"),
438 KEEMBAY_MUX(0x1, "SPI0_M1"),
439 KEEMBAY_MUX(0x2, "UART1_M2"),
440 KEEMBAY_MUX(0x3, "PWM_M3"),
441 KEEMBAY_MUX(0x4, "CAM_M4"),
442 KEEMBAY_MUX(0x5, "PCIE_M5"),
443 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
444 KEEMBAY_MUX(0x7, "GPIO_M7")),
446 KEEMBAY_MUX(0x0, "SD0_M0"),
447 KEEMBAY_MUX(0x1, "SPI0_M1"),
448 KEEMBAY_MUX(0x2, "I2C0_M2"),
449 KEEMBAY_MUX(0x3, "UART1_M3"),
450 KEEMBAY_MUX(0x4, "CAM_M4"),
451 KEEMBAY_MUX(0x5, "I2S0_M5"),
452 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
453 KEEMBAY_MUX(0x7, "GPIO_M7")),
455 KEEMBAY_MUX(0x0, "SD0_M0"),
456 KEEMBAY_MUX(0x1, "PCIE_M1"),
457 KEEMBAY_MUX(0x2, "I2C0_M2"),
458 KEEMBAY_MUX(0x3, "UART1_M3"),
459 KEEMBAY_MUX(0x4, "CAM_M4"),
460 KEEMBAY_MUX(0x5, "I2S0_M5"),
461 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
462 KEEMBAY_MUX(0x7, "GPIO_M7")),
464 KEEMBAY_MUX(0x0, "SD0_M0"),
465 KEEMBAY_MUX(0x1, "SPI3_M1"),
466 KEEMBAY_MUX(0x2, "I2C1_M2"),
467 KEEMBAY_MUX(0x3, "DEBUG_M3"),
468 KEEMBAY_MUX(0x4, "CAM_M4"),
469 KEEMBAY_MUX(0x5, "I2S0_M5"),
470 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
471 KEEMBAY_MUX(0x7, "GPIO_M7")),
473 KEEMBAY_MUX(0x0, "SD0_M0"),
474 KEEMBAY_MUX(0x1, "SPI3_M1"),
475 KEEMBAY_MUX(0x2, "I2C1_M2"),
476 KEEMBAY_MUX(0x3, "DEBUG_M3"),
477 KEEMBAY_MUX(0x4, "CAM_M4"),
478 KEEMBAY_MUX(0x5, "I2S0_M5"),
479 KEEMBAY_MUX(0x6, "SLVDS1_M6"),
480 KEEMBAY_MUX(0x7, "GPIO_M7")),
482 KEEMBAY_MUX(0x0, "I3C1_M0"),
483 KEEMBAY_MUX(0x1, "SPI3_M1"),
484 KEEMBAY_MUX(0x2, "UART3_M2"),
485 KEEMBAY_MUX(0x3, "DEBUG_M3"),
486 KEEMBAY_MUX(0x4, "CAM_M4"),
487 KEEMBAY_MUX(0x5, "LCD_M5"),
488 KEEMBAY_MUX(0x6, "I2C2_M6"),
489 KEEMBAY_MUX(0x7, "GPIO_M7")),
491 KEEMBAY_MUX(0x0, "I3C1_M0"),
492 KEEMBAY_MUX(0x1, "SPI3_M1"),
493 KEEMBAY_MUX(0x2, "UART3_M2"),
494 KEEMBAY_MUX(0x3, "DEBUG_M3"),
495 KEEMBAY_MUX(0x4, "CAM_M4"),
496 KEEMBAY_MUX(0x5, "LCD_M5"),
497 KEEMBAY_MUX(0x6, "I2C2_M6"),
498 KEEMBAY_MUX(0x7, "GPIO_M7")),
500 KEEMBAY_MUX(0x0, "I2S2_M0"),
501 KEEMBAY_MUX(0x1, "SPI3_M1"),
502 KEEMBAY_MUX(0x2, "UART3_M2"),
503 KEEMBAY_MUX(0x3, "DEBUG_M3"),
504 KEEMBAY_MUX(0x4, "CAM_M4"),
505 KEEMBAY_MUX(0x5, "LCD_M5"),
506 KEEMBAY_MUX(0x6, "I2C3_M6"),
507 KEEMBAY_MUX(0x7, "GPIO_M7")),
509 KEEMBAY_MUX(0x0, "ETH_M0"),
510 KEEMBAY_MUX(0x1, "SPI3_M1"),
511 KEEMBAY_MUX(0x2, "SPI3_M2"),
512 KEEMBAY_MUX(0x3, "DEBUG_M3"),
513 KEEMBAY_MUX(0x4, "CAM_M4"),
514 KEEMBAY_MUX(0x5, "LCD_M5"),
515 KEEMBAY_MUX(0x6, "I2C3_M6"),
516 KEEMBAY_MUX(0x7, "GPIO_M7")),
518 KEEMBAY_MUX(0x0, "ETH_M0"),
519 KEEMBAY_MUX(0x1, "SD1_M1"),
520 KEEMBAY_MUX(0x2, "SPI3_M2"),
521 KEEMBAY_MUX(0x3, "CPR_M3"),
522 KEEMBAY_MUX(0x4, "CAM_M4"),
523 KEEMBAY_MUX(0x5, "LCD_M5"),
524 KEEMBAY_MUX(0x6, "I2C4_M6"),
525 KEEMBAY_MUX(0x7, "GPIO_M7")),
527 KEEMBAY_MUX(0x0, "ETH_M0"),
528 KEEMBAY_MUX(0x1, "SD1_M1"),
529 KEEMBAY_MUX(0x2, "SPI3_M2"),
530 KEEMBAY_MUX(0x3, "CPR_M3"),
531 KEEMBAY_MUX(0x4, "I2S0_M4"),
532 KEEMBAY_MUX(0x5, "LCD_M5"),
533 KEEMBAY_MUX(0x6, "I2C4_M6"),
534 KEEMBAY_MUX(0x7, "GPIO_M7")),
536 KEEMBAY_MUX(0x0, "ETH_M0"),
537 KEEMBAY_MUX(0x1, "SD1_M1"),
538 KEEMBAY_MUX(0x2, "SPI0_M2"),
539 KEEMBAY_MUX(0x3, "CPR_M3"),
540 KEEMBAY_MUX(0x4, "I2S0_M4"),
541 KEEMBAY_MUX(0x5, "LCD_M5"),
542 KEEMBAY_MUX(0x6, "CAM_M6"),
543 KEEMBAY_MUX(0x7, "GPIO_M7")),
545 KEEMBAY_MUX(0x0, "ETH_M0"),
546 KEEMBAY_MUX(0x1, "SD1_M1"),
547 KEEMBAY_MUX(0x2, "SPI0_M2"),
548 KEEMBAY_MUX(0x3, "CPR_M3"),
549 KEEMBAY_MUX(0x4, "I2S0_M4"),
550 KEEMBAY_MUX(0x5, "LCD_M5"),
551 KEEMBAY_MUX(0x6, "CAM_M6"),
552 KEEMBAY_MUX(0x7, "GPIO_M7")),
554 KEEMBAY_MUX(0x0, "ETH_M0"),
555 KEEMBAY_MUX(0x1, "SD1_M1"),
556 KEEMBAY_MUX(0x2, "SPI0_M2"),
557 KEEMBAY_MUX(0x3, "TPIU_M3"),
558 KEEMBAY_MUX(0x4, "I2S0_M4"),
559 KEEMBAY_MUX(0x5, "LCD_M5"),
560 KEEMBAY_MUX(0x6, "CAM_M6"),
561 KEEMBAY_MUX(0x7, "GPIO_M7")),
563 KEEMBAY_MUX(0x0, "ETH_M0"),
564 KEEMBAY_MUX(0x1, "SD1_M1"),
565 KEEMBAY_MUX(0x2, "SPI0_M2"),
566 KEEMBAY_MUX(0x3, "TPIU_M3"),
567 KEEMBAY_MUX(0x4, "I2S0_M4"),
568 KEEMBAY_MUX(0x5, "LCD_M5"),
569 KEEMBAY_MUX(0x6, "CAM_M6"),
570 KEEMBAY_MUX(0x7, "GPIO_M7")),
572 KEEMBAY_MUX(0x0, "ETH_M0"),
573 KEEMBAY_MUX(0x1, "SPI2_M1"),
574 KEEMBAY_MUX(0x2, "UART2_M2"),
575 KEEMBAY_MUX(0x3, "TPIU_M3"),
576 KEEMBAY_MUX(0x4, "I2S0_M4"),
577 KEEMBAY_MUX(0x5, "LCD_M5"),
578 KEEMBAY_MUX(0x6, "CAM_M6"),
579 KEEMBAY_MUX(0x7, "GPIO_M7")),
581 KEEMBAY_MUX(0x0, "ETH_M0"),
582 KEEMBAY_MUX(0x1, "SPI2_M1"),
583 KEEMBAY_MUX(0x2, "UART2_M2"),
584 KEEMBAY_MUX(0x3, "TPIU_M3"),
585 KEEMBAY_MUX(0x4, "I2S1_M4"),
586 KEEMBAY_MUX(0x5, "LCD_M5"),
587 KEEMBAY_MUX(0x6, "CAM_M6"),
588 KEEMBAY_MUX(0x7, "GPIO_M7")),
590 KEEMBAY_MUX(0x0, "ETH_M0"),
591 KEEMBAY_MUX(0x1, "SPI2_M1"),
592 KEEMBAY_MUX(0x2, "UART2_M2"),
593 KEEMBAY_MUX(0x3, "TPIU_M3"),
594 KEEMBAY_MUX(0x4, "I2S1_M4"),
595 KEEMBAY_MUX(0x5, "LCD_M5"),
596 KEEMBAY_MUX(0x6, "CAM_M6"),
597 KEEMBAY_MUX(0x7, "GPIO_M7")),
599 KEEMBAY_MUX(0x0, "ETH_M0"),
600 KEEMBAY_MUX(0x1, "SPI2_M1"),
601 KEEMBAY_MUX(0x2, "UART2_M2"),
602 KEEMBAY_MUX(0x3, "TPIU_M3"),
603 KEEMBAY_MUX(0x4, "I2S1_M4"),
604 KEEMBAY_MUX(0x5, "LCD_M5"),
605 KEEMBAY_MUX(0x6, "CAM_M6"),
606 KEEMBAY_MUX(0x7, "GPIO_M7")),
608 KEEMBAY_MUX(0x0, "ETH_M0"),
609 KEEMBAY_MUX(0x1, "SPI2_M1"),
610 KEEMBAY_MUX(0x2, "SD0_M2"),
611 KEEMBAY_MUX(0x3, "TPIU_M3"),
612 KEEMBAY_MUX(0x4, "I2S1_M4"),
613 KEEMBAY_MUX(0x5, "LCD_M5"),
614 KEEMBAY_MUX(0x6, "CAM_M6"),
615 KEEMBAY_MUX(0x7, "GPIO_M7")),
617 KEEMBAY_MUX(0x0, "ETH_M0"),
618 KEEMBAY_MUX(0x1, "SPI2_M1"),
619 KEEMBAY_MUX(0x2, "SD0_M2"),
620 KEEMBAY_MUX(0x3, "TPIU_M3"),
621 KEEMBAY_MUX(0x4, "I2S2_M4"),
622 KEEMBAY_MUX(0x5, "LCD_M5"),
623 KEEMBAY_MUX(0x6, "CAM_M6"),
624 KEEMBAY_MUX(0x7, "GPIO_M7")),
626 KEEMBAY_MUX(0x0, "ETH_M0"),
627 KEEMBAY_MUX(0x1, "SPI2_M1"),
628 KEEMBAY_MUX(0x2, "SD0_M2"),
629 KEEMBAY_MUX(0x3, "TPIU_M3"),
630 KEEMBAY_MUX(0x4, "I2S2_M4"),
631 KEEMBAY_MUX(0x5, "LCD_M5"),
632 KEEMBAY_MUX(0x6, "CAM_M6"),
633 KEEMBAY_MUX(0x7, "GPIO_M7")),
635 KEEMBAY_MUX(0x0, "ETH_M0"),
636 KEEMBAY_MUX(0x1, "SPI2_M1"),
637 KEEMBAY_MUX(0x2, "SD1_M2"),
638 KEEMBAY_MUX(0x3, "TPIU_M3"),
639 KEEMBAY_MUX(0x4, "I2S2_M4"),
640 KEEMBAY_MUX(0x5, "LCD_M5"),
641 KEEMBAY_MUX(0x6, "CAM_M6"),
642 KEEMBAY_MUX(0x7, "GPIO_M7")),
644 KEEMBAY_MUX(0x0, "ETH_M0"),
645 KEEMBAY_MUX(0x1, "SPI2_M1"),
646 KEEMBAY_MUX(0x2, "SD1_M2"),
647 KEEMBAY_MUX(0x3, "TPIU_M3"),
648 KEEMBAY_MUX(0x4, "I2S2_M4"),
649 KEEMBAY_MUX(0x5, "LCD_M5"),
650 KEEMBAY_MUX(0x6, "CAM_M6"),
651 KEEMBAY_MUX(0x7, "GPIO_M7")),
653 KEEMBAY_MUX(0x0, "SPI1_M0"),
654 KEEMBAY_MUX(0x1, "I2S1_M1"),
655 KEEMBAY_MUX(0x2, "SD1_M2"),
656 KEEMBAY_MUX(0x3, "TPIU_M3"),
657 KEEMBAY_MUX(0x4, "UART0_M4"),
658 KEEMBAY_MUX(0x5, "LCD_M5"),
659 KEEMBAY_MUX(0x6, "CAM_M6"),
660 KEEMBAY_MUX(0x7, "GPIO_M7")),
662 KEEMBAY_MUX(0x0, "SPI1_M0"),
663 KEEMBAY_MUX(0x1, "ETH_M1"),
664 KEEMBAY_MUX(0x2, "SD0_M2"),
665 KEEMBAY_MUX(0x3, "TPIU_M3"),
666 KEEMBAY_MUX(0x4, "UART0_M4"),
667 KEEMBAY_MUX(0x5, "LCD_M5"),
668 KEEMBAY_MUX(0x6, "CAM_M6"),
669 KEEMBAY_MUX(0x7, "GPIO_M7")),
671 KEEMBAY_MUX(0x0, "SPI1_M0"),
672 KEEMBAY_MUX(0x1, "ETH_M1"),
673 KEEMBAY_MUX(0x2, "SD0_M2"),
674 KEEMBAY_MUX(0x3, "TPIU_M3"),
675 KEEMBAY_MUX(0x4, "UART0_M4"),
676 KEEMBAY_MUX(0x5, "LCD_M5"),
677 KEEMBAY_MUX(0x6, "CAM_M6"),
678 KEEMBAY_MUX(0x7, "GPIO_M7")),
680 KEEMBAY_MUX(0x0, "SPI1_M0"),
681 KEEMBAY_MUX(0x1, "ETH_M1"),
682 KEEMBAY_MUX(0x2, "I3C1_M2"),
683 KEEMBAY_MUX(0x3, "TPIU_M3"),
684 KEEMBAY_MUX(0x4, "UART0_M4"),
685 KEEMBAY_MUX(0x5, "LCD_M5"),
686 KEEMBAY_MUX(0x6, "CAM_M6"),
687 KEEMBAY_MUX(0x7, "GPIO_M7")),
689 KEEMBAY_MUX(0x0, "SPI1_M0"),
690 KEEMBAY_MUX(0x1, "ETH_M1"),
691 KEEMBAY_MUX(0x2, "SD0_M2"),
692 KEEMBAY_MUX(0x3, "TPIU_M3"),
693 KEEMBAY_MUX(0x4, "UART1_M4"),
694 KEEMBAY_MUX(0x5, "LCD_M5"),
695 KEEMBAY_MUX(0x6, "CAM_M6"),
696 KEEMBAY_MUX(0x7, "GPIO_M7")),
698 KEEMBAY_MUX(0x0, "SPI1_M0"),
699 KEEMBAY_MUX(0x1, "ETH_M1"),
700 KEEMBAY_MUX(0x2, "SD1_M2"),
701 KEEMBAY_MUX(0x3, "TPIU_M3"),
702 KEEMBAY_MUX(0x4, "UART1_M4"),
703 KEEMBAY_MUX(0x5, "LCD_M5"),
704 KEEMBAY_MUX(0x6, "CAM_M6"),
705 KEEMBAY_MUX(0x7, "GPIO_M7")),
707 KEEMBAY_MUX(0x0, "I2S1_M0"),
708 KEEMBAY_MUX(0x1, "SPI1_M1"),
709 KEEMBAY_MUX(0x2, "SD1_M2"),
710 KEEMBAY_MUX(0x3, "TPIU_M3"),
711 KEEMBAY_MUX(0x4, "UART1_M4"),
712 KEEMBAY_MUX(0x5, "LCD_M5"),
713 KEEMBAY_MUX(0x6, "CAM_M6"),
714 KEEMBAY_MUX(0x7, "GPIO_M7")),
716 KEEMBAY_MUX(0x0, "I2S2_M0"),
717 KEEMBAY_MUX(0x1, "SPI1_M1"),
718 KEEMBAY_MUX(0x2, "ETH_M2"),
719 KEEMBAY_MUX(0x3, "TPIU_M3"),
720 KEEMBAY_MUX(0x4, "UART1_M4"),
721 KEEMBAY_MUX(0x5, "LCD_M5"),
722 KEEMBAY_MUX(0x6, "CAM_M6"),
723 KEEMBAY_MUX(0x7, "GPIO_M7")),
725 KEEMBAY_MUX(0x0, "I3C0_M0"),
726 KEEMBAY_MUX(0x1, "SPI1_M1"),
727 KEEMBAY_MUX(0x2, "SD1_M2"),
728 KEEMBAY_MUX(0x3, "TPIU_M3"),
729 KEEMBAY_MUX(0x4, "SPI0_M4"),
730 KEEMBAY_MUX(0x5, "LCD_M5"),
731 KEEMBAY_MUX(0x6, "CAM_M6"),
732 KEEMBAY_MUX(0x7, "GPIO_M7")),
734 KEEMBAY_MUX(0x0, "I3C0_M0"),
735 KEEMBAY_MUX(0x1, "ETH_M1"),
736 KEEMBAY_MUX(0x2, "I2C0_M2"),
737 KEEMBAY_MUX(0x3, "TPIU_M3"),
738 KEEMBAY_MUX(0x4, "SPI0_M4"),
739 KEEMBAY_MUX(0x5, "LCD_M5"),
740 KEEMBAY_MUX(0x6, "CAM_M6"),
741 KEEMBAY_MUX(0x7, "GPIO_M7")),
743 KEEMBAY_MUX(0x0, "I3C1_M0"),
744 KEEMBAY_MUX(0x1, "ETH_M1"),
745 KEEMBAY_MUX(0x2, "I2C0_M2"),
746 KEEMBAY_MUX(0x3, "TPIU_M3"),
747 KEEMBAY_MUX(0x4, "SPI0_M4"),
748 KEEMBAY_MUX(0x5, "LCD_M5"),
749 KEEMBAY_MUX(0x6, "I2S3_M6"),
750 KEEMBAY_MUX(0x7, "GPIO_M7")),
752 KEEMBAY_MUX(0x0, "I3C1_M0"),
753 KEEMBAY_MUX(0x1, "ETH_M1"),
754 KEEMBAY_MUX(0x2, "I2C1_M2"),
755 KEEMBAY_MUX(0x3, "TPIU_M3"),
756 KEEMBAY_MUX(0x4, "SPI0_M4"),
757 KEEMBAY_MUX(0x5, "LCD_M5"),
758 KEEMBAY_MUX(0x6, "I2S3_M6"),
759 KEEMBAY_MUX(0x7, "GPIO_M7")),
761 KEEMBAY_MUX(0x0, "I3C2_M0"),
762 KEEMBAY_MUX(0x1, "ETH_M1"),
763 KEEMBAY_MUX(0x2, "I2C1_M2"),
764 KEEMBAY_MUX(0x3, "TPIU_M3"),
765 KEEMBAY_MUX(0x4, "SPI0_M4"),
766 KEEMBAY_MUX(0x5, "LCD_M5"),
767 KEEMBAY_MUX(0x6, "I2S3_M6"),
768 KEEMBAY_MUX(0x7, "GPIO_M7")),
770 KEEMBAY_MUX(0x0, "I3C2_M0"),
771 KEEMBAY_MUX(0x1, "ETH_M1"),
772 KEEMBAY_MUX(0x2, "SPI0_M2"),
773 KEEMBAY_MUX(0x3, "TPIU_M3"),
774 KEEMBAY_MUX(0x4, "SD0_M4"),
775 KEEMBAY_MUX(0x5, "LCD_M5"),
776 KEEMBAY_MUX(0x6, "I2S3_M6"),
777 KEEMBAY_MUX(0x7, "GPIO_M7")),
779 KEEMBAY_MUX(0x0, "I3C0_M0"),
780 KEEMBAY_MUX(0x1, "ETH_M1"),
781 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
782 KEEMBAY_MUX(0x3, "TPIU_M3"),
783 KEEMBAY_MUX(0x4, "SD0_M4"),
784 KEEMBAY_MUX(0x5, "LCD_M5"),
785 KEEMBAY_MUX(0x6, "I2S3_M6"),
786 KEEMBAY_MUX(0x7, "GPIO_M7")),
788 KEEMBAY_MUX(0x0, "I3C1_M0"),
789 KEEMBAY_MUX(0x1, "ETH_M1"),
790 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
791 KEEMBAY_MUX(0x3, "TPIU_M3"),
792 KEEMBAY_MUX(0x4, "SD0_M4"),
793 KEEMBAY_MUX(0x5, "LCD_M5"),
794 KEEMBAY_MUX(0x6, "UART2_M6"),
795 KEEMBAY_MUX(0x7, "GPIO_M7")),
797 KEEMBAY_MUX(0x0, "I3C2_M0"),
798 KEEMBAY_MUX(0x1, "ETH_M1"),
799 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
800 KEEMBAY_MUX(0x3, "TPIU_M3"),
801 KEEMBAY_MUX(0x4, "SD0_M4"),
802 KEEMBAY_MUX(0x5, "LCD_M5"),
803 KEEMBAY_MUX(0x6, "UART2_M6"),
804 KEEMBAY_MUX(0x7, "GPIO_M7")),
806 KEEMBAY_MUX(0x0, "I3C0_M0"),
807 KEEMBAY_MUX(0x1, "ETH_M1"),
808 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
809 KEEMBAY_MUX(0x3, "TPIU_M3"),
810 KEEMBAY_MUX(0x4, "SD0_M4"),
811 KEEMBAY_MUX(0x5, "LCD_M5"),
812 KEEMBAY_MUX(0x6, "UART2_M6"),
813 KEEMBAY_MUX(0x7, "GPIO_M7")),
815 KEEMBAY_MUX(0x0, "I3C0_M0"),
816 KEEMBAY_MUX(0x1, "ETH_M1"),
817 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
818 KEEMBAY_MUX(0x3, "TPIU_M3"),
819 KEEMBAY_MUX(0x4, "SD0_M4"),
820 KEEMBAY_MUX(0x5, "LCD_M5"),
821 KEEMBAY_MUX(0x6, "UART2_M6"),
822 KEEMBAY_MUX(0x7, "GPIO_M7")),
824 KEEMBAY_MUX(0x0, "I2C2_M0"),
825 KEEMBAY_MUX(0x1, "I3C0_M1"),
826 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
827 KEEMBAY_MUX(0x3, "TPIU_M3"),
828 KEEMBAY_MUX(0x4, "ETH_M4"),
829 KEEMBAY_MUX(0x5, "LCD_M5"),
830 KEEMBAY_MUX(0x6, "UART3_M6"),
831 KEEMBAY_MUX(0x7, "GPIO_M7")),
833 KEEMBAY_MUX(0x0, "PCIE_M0"),
834 KEEMBAY_MUX(0x1, "I3C1_M1"),
835 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
836 KEEMBAY_MUX(0x3, "TPIU_M3"),
837 KEEMBAY_MUX(0x4, "I3C2_M4"),
838 KEEMBAY_MUX(0x5, "LCD_M5"),
839 KEEMBAY_MUX(0x6, "UART3_M6"),
840 KEEMBAY_MUX(0x7, "GPIO_M7")),
842 KEEMBAY_MUX(0x0, "PCIE_M0"),
843 KEEMBAY_MUX(0x1, "I3C2_M1"),
844 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
845 KEEMBAY_MUX(0x3, "TPIU_M3"),
846 KEEMBAY_MUX(0x4, "I3C2_M4"),
847 KEEMBAY_MUX(0x5, "LCD_M5"),
848 KEEMBAY_MUX(0x6, "UART3_M6"),
849 KEEMBAY_MUX(0x7, "GPIO_M7")),
851 KEEMBAY_MUX(0x0, "PCIE_M0"),
852 KEEMBAY_MUX(0x1, "I2C2_M1"),
853 KEEMBAY_MUX(0x2, "SLVDS1_M2"),
854 KEEMBAY_MUX(0x3, "TPIU_M3"),
855 KEEMBAY_MUX(0x4, "I3C2_M4"),
856 KEEMBAY_MUX(0x5, "LCD_M5"),
857 KEEMBAY_MUX(0x6, "UART3_M6"),
858 KEEMBAY_MUX(0x7, "GPIO_M7")),
906 val &= FIELD_PREP(KEEMBAY_GPIO_MODE_INV_MASK, 0); in keembay_gpio_restore_default()
922 /* As per Pin Mux Map, Modes 0 to 6 are for peripherals */ in keembay_request_gpio()
926 return 0; in keembay_request_gpio()
955 return 0; in keembay_set_mux()
973 return 0; in keembay_pinconf_set_pull()
997 return 0; in keembay_pinconf_set_drive()
1019 return 0; in keembay_pinconf_set_slew_rate()
1041 return 0; in keembay_pinconf_set_schmitt()
1094 return 0; in keembay_pinconf_get()
1103 int ret = 0; in keembay_pinconf_set()
1108 for (i = 0; i < num_configs; i++) { in keembay_pinconf_set()
1222 return 0; in keembay_gpio_set_direction_in()
1236 return 0; in keembay_gpio_set_direction_out()
1243 unsigned long reg, clump = 0, bit = 0; in keembay_gpio_irq_handler()
1249 for (src = 0; src < KEEMBAY_GPIO_NUM_IRQ; src++) { in keembay_gpio_irq_handler()
1296 bitmap_set_value8(&val, 0, pos); in keembay_gpio_clear_irq()
1300 irq->pins[pos / KEEMBAY_GPIO_NUM_IRQ] = 0; in keembay_gpio_clear_irq()
1320 int src, type = 0; in keembay_find_free_src()
1327 for (src = 0; src < KEEMBAY_GPIO_NUM_IRQ; src++) { in keembay_find_free_src()
1374 if (src < 0 || slot < 0) in keembay_gpio_irq_enable()
1401 unsigned long reg, clump = 0, pos = 0; in keembay_gpio_irq_disable()
1404 for (src = 0; src < KEEMBAY_GPIO_NUM_IRQ; src++) { in keembay_gpio_irq_disable()
1434 return 0; in keembay_gpio_irq_set_type()
1442 ret = gpiochip_add_pin_range(chip, dev_name(kpc->dev), 0, 0, chip->ngpio); in keembay_gpio_add_pin_ranges()
1459 unsigned int i, level_line = 0, edge_line = 0; in keembay_gpiochip_probe()
1489 for (i = 0; i < KEEMBAY_GPIO_NUM_IRQ; i++) { in keembay_gpiochip_probe()
1494 if (irq <= 0) in keembay_gpiochip_probe()
1501 kmb_irq->num_share = 0; in keembay_gpiochip_probe()
1529 for (i = 0; i < kpc->ngroups; i++) { in keembay_build_groups()
1539 return 0; in keembay_build_groups()
1548 if (ret < 0) in keembay_pinctrl_reg()
1563 for (i = 0; i < kpc->nfuncs; i++) { in keembay_add_functions()
1566 unsigned int grp_idx = 0; in keembay_add_functions()
1574 for (j = 0; j < kpc->npins; j++) { in keembay_add_functions()
1588 for (i = 0; i < kpc->nfuncs; i++) { in keembay_add_functions()
1596 return 0; in keembay_add_functions()
1608 kpc->nfuncs = 0; in keembay_build_functions()
1614 for (i = 0; i < kpc->npins; i++) { in keembay_build_functions()
1672 kpc->base0 = devm_platform_ioremap_resource(pdev, 0); in keembay_pinctrl_probe()
1700 return 0; in keembay_pinctrl_probe()