Lines Matching full:static

153 static const unsigned long enabled_socs =
170 static bool
178 static const u32 jz4730_pull_ups[4] = {
182 static const u32 jz4730_pull_downs[4] = {
186 static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };
187 static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };
188 static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };
189 static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };
190 static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };
191 static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };
192 static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, };
193 static int jz4730_lcd_8bit_pins[] = {
197 static int jz4730_lcd_16bit_pins[] = {
200 static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, };
201 static int jz4730_lcd_generic_pins[] = { 0x3b, };
202 static int jz4730_nand_cs1_pins[] = { 0x53, };
203 static int jz4730_nand_cs2_pins[] = { 0x54, };
204 static int jz4730_nand_cs3_pins[] = { 0x55, };
205 static int jz4730_nand_cs4_pins[] = { 0x56, };
206 static int jz4730_nand_cs5_pins[] = { 0x57, };
207 static int jz4730_pwm_pwm0_pins[] = { 0x5e, };
208 static int jz4730_pwm_pwm1_pins[] = { 0x5f, };
210 static int jz4730_mii_pins[] = { 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76,
213 static int jz4730_i2s_mclk_pins[] = { 0x44, };
214 static int jz4730_i2s_acreset_pins[] = { 0x45, };
215 static int jz4730_i2s_data_pins[] = { 0x46, 0x47, };
216 static int jz4730_i2s_clock_pins[] = { 0x4d, 0x4e, };
218 static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };
220 static const struct group_desc jz4730_groups[] = {
247 static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
248 static const char *jz4730_uart0_groups[] = { "uart0-data", };
249 static const char *jz4730_uart1_groups[] = { "uart1-data", };
250 static const char *jz4730_uart2_groups[] = { "uart2-data", };
251 static const char *jz4730_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
252 static const char *jz4730_lcd_groups[] = {
255 static const char *jz4730_nand_groups[] = {
258 static const char *jz4730_pwm0_groups[] = { "pwm0", };
259 static const char *jz4730_pwm1_groups[] = { "pwm1", };
260 static const char *jz4730_mii_groups[] = { "mii", };
261 static const char *jz4730_i2s_groups[] = { "i2s-data", "i2s-master", "i2s-slave", };
263 static const struct pinfunction jz4730_functions[] = {
277 static const struct ingenic_chip_info jz4730_chip_info = {
289 static const u32 jz4740_pull_ups[4] = {
293 static const u32 jz4740_pull_downs[4] = {
297 static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };
298 static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
299 static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };
300 static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
301 static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };
302 static int jz4740_lcd_8bit_pins[] = {
306 static int jz4740_lcd_16bit_pins[] = {
309 static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };
310 static int jz4740_lcd_special_pins[] = { 0x31, 0x32, 0x56, 0x57, };
311 static int jz4740_lcd_generic_pins[] = { 0x55, };
312 static int jz4740_nand_cs1_pins[] = { 0x39, };
313 static int jz4740_nand_cs2_pins[] = { 0x3a, };
314 static int jz4740_nand_cs3_pins[] = { 0x3b, };
315 static int jz4740_nand_cs4_pins[] = { 0x3c, };
316 static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
317 static int jz4740_pwm_pwm0_pins[] = { 0x77, };
318 static int jz4740_pwm_pwm1_pins[] = { 0x78, };
319 static int jz4740_pwm_pwm2_pins[] = { 0x79, };
320 static int jz4740_pwm_pwm3_pins[] = { 0x7a, };
321 static int jz4740_pwm_pwm4_pins[] = { 0x7b, };
322 static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
323 static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
324 static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
326 static const struct group_desc jz4740_groups[] = {
352 static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
353 static const char *jz4740_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
354 static const char *jz4740_uart1_groups[] = { "uart1-data", };
355 static const char *jz4740_lcd_groups[] = {
358 static const char *jz4740_nand_groups[] = {
361 static const char *jz4740_pwm0_groups[] = { "pwm0", };
362 static const char *jz4740_pwm1_groups[] = { "pwm1", };
363 static const char *jz4740_pwm2_groups[] = { "pwm2", };
364 static const char *jz4740_pwm3_groups[] = { "pwm3", };
365 static const char *jz4740_pwm4_groups[] = { "pwm4", };
366 static const char *jz4740_pwm5_groups[] = { "pwm5", };
367 static const char *jz4740_pwm6_groups[] = { "pwm6", };
368 static const char *jz4740_pwm7_groups[] = { "pwm7", };
370 static const struct pinfunction jz4740_functions[] = {
386 static const struct ingenic_chip_info jz4740_chip_info = {
398 static int jz4725b_mmc0_1bit_pins[] = { 0x48, 0x49, 0x5c, };
399 static int jz4725b_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x56, };
400 static int jz4725b_mmc1_1bit_pins[] = { 0x7a, 0x7b, 0x7c, };
401 static int jz4725b_mmc1_4bit_pins[] = { 0x7d, 0x7e, 0x7f, };
402 static int jz4725b_uart_data_pins[] = { 0x4c, 0x4d, };
403 static int jz4725b_lcd_8bit_pins[] = {
407 static int jz4725b_lcd_16bit_pins[] = {
410 static int jz4725b_lcd_18bit_pins[] = { 0x70, 0x71, };
411 static int jz4725b_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, };
412 static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
413 static int jz4725b_lcd_generic_pins[] = { 0x75, };
414 static int jz4725b_nand_cs1_pins[] = { 0x55, };
415 static int jz4725b_nand_cs2_pins[] = { 0x56, };
416 static int jz4725b_nand_cs3_pins[] = { 0x57, };
417 static int jz4725b_nand_cs4_pins[] = { 0x58, };
418 static int jz4725b_nand_cle_ale_pins[] = { 0x48, 0x49 };
419 static int jz4725b_nand_fre_fwe_pins[] = { 0x5c, 0x5d };
420 static int jz4725b_pwm_pwm0_pins[] = { 0x4a, };
421 static int jz4725b_pwm_pwm1_pins[] = { 0x4b, };
422 static int jz4725b_pwm_pwm2_pins[] = { 0x4c, };
423 static int jz4725b_pwm_pwm3_pins[] = { 0x4d, };
424 static int jz4725b_pwm_pwm4_pins[] = { 0x4e, };
425 static int jz4725b_pwm_pwm5_pins[] = { 0x4f, };
427 static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
429 static const struct group_desc jz4725b_groups[] = {
456 static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
457 static const char *jz4725b_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
458 static const char *jz4725b_uart_groups[] = { "uart-data", };
459 static const char *jz4725b_lcd_groups[] = {
463 static const char *jz4725b_nand_groups[] = {
467 static const char *jz4725b_pwm0_groups[] = { "pwm0", };
468 static const char *jz4725b_pwm1_groups[] = { "pwm1", };
469 static const char *jz4725b_pwm2_groups[] = { "pwm2", };
470 static const char *jz4725b_pwm3_groups[] = { "pwm3", };
471 static const char *jz4725b_pwm4_groups[] = { "pwm4", };
472 static const char *jz4725b_pwm5_groups[] = { "pwm5", };
474 static const struct pinfunction jz4725b_functions[] = {
488 static const struct ingenic_chip_info jz4725b_chip_info = {
500 static const u32 jz4750_pull_ups[6] = {
504 static const u32 jz4750_pull_downs[6] = {
508 static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, };
509 static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, };
510 static int jz4750_uart1_data_pins[] = { 0x90, 0x91, };
511 static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, };
512 static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, };
513 static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, };
514 static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, };
515 static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, };
516 static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, };
517 static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, };
518 static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, };
519 static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, };
520 static int jz4750_i2c_pins[] = { 0x8c, 0x8d, };
521 static int jz4750_cim_pins[] = {
525 static int jz4750_lcd_8bit_pins[] = {
529 static int jz4750_lcd_16bit_pins[] = {
532 static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, };
533 static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, };
534 static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
535 static int jz4750_lcd_generic_pins[] = { 0x75, };
536 static int jz4750_nand_cs1_pins[] = { 0x55, };
537 static int jz4750_nand_cs2_pins[] = { 0x56, };
538 static int jz4750_nand_cs3_pins[] = { 0x57, };
539 static int jz4750_nand_cs4_pins[] = { 0x58, };
540 static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
541 static int jz4750_pwm_pwm0_pins[] = { 0x94, };
542 static int jz4750_pwm_pwm1_pins[] = { 0x95, };
543 static int jz4750_pwm_pwm2_pins[] = { 0x96, };
544 static int jz4750_pwm_pwm3_pins[] = { 0x97, };
545 static int jz4750_pwm_pwm4_pins[] = { 0x98, };
546 static int jz4750_pwm_pwm5_pins[] = { 0x99, };
548 static const struct group_desc jz4750_groups[] = {
582 static const char *jz4750_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
583 static const char *jz4750_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
584 static const char *jz4750_uart2_groups[] = { "uart2-data", };
585 static const char *jz4750_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
586 static const char *jz4750_mmc0_groups[] = {
589 static const char *jz4750_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
590 static const char *jz4750_i2c_groups[] = { "i2c-data", };
591 static const char *jz4750_cim_groups[] = { "cim-data", };
592 static const char *jz4750_lcd_groups[] = {
596 static const char *jz4750_nand_groups[] = {
599 static const char *jz4750_pwm0_groups[] = { "pwm0", };
600 static const char *jz4750_pwm1_groups[] = { "pwm1", };
601 static const char *jz4750_pwm2_groups[] = { "pwm2", };
602 static const char *jz4750_pwm3_groups[] = { "pwm3", };
603 static const char *jz4750_pwm4_groups[] = { "pwm4", };
604 static const char *jz4750_pwm5_groups[] = { "pwm5", };
606 static const struct pinfunction jz4750_functions[] = {
625 static const struct ingenic_chip_info jz4750_chip_info = {
637 static const u32 jz4755_pull_ups[6] = {
641 static const u32 jz4755_pull_downs[6] = {
645 static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };
646 static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
647 static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
648 static int jz4755_uart2_data_pins[] = { 0x9f, };
649 static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
650 static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
651 static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
652 static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
653 static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
654 static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
655 static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
656 static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
657 static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
658 static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
659 static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
660 static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
661 static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
662 static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
663 static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
664 static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, };
665 static int jz4755_i2c_pins[] = { 0x8c, 0x8d, };
666 static int jz4755_cim_pins[] = {
670 static int jz4755_lcd_8bit_pins[] = {
674 static int jz4755_lcd_16bit_pins[] = {
677 static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, };
678 static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, };
679 static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
680 static int jz4755_lcd_generic_pins[] = { 0x75, };
681 static int jz4755_nand_cs1_pins[] = { 0x55, };
682 static int jz4755_nand_cs2_pins[] = { 0x56, };
683 static int jz4755_nand_cs3_pins[] = { 0x57, };
684 static int jz4755_nand_cs4_pins[] = { 0x58, };
685 static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
686 static int jz4755_pwm_pwm0_pins[] = { 0x94, };
687 static int jz4755_pwm_pwm1_pins[] = { 0xab, };
688 static int jz4755_pwm_pwm2_pins[] = { 0x96, };
689 static int jz4755_pwm_pwm3_pins[] = { 0x97, };
690 static int jz4755_pwm_pwm4_pins[] = { 0x98, };
691 static int jz4755_pwm_pwm5_pins[] = { 0x99, };
693 static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, };
694 static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, };
695 static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, };
697 static const struct group_desc jz4755_groups[] = {
742 static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
743 static const char *jz4755_uart1_groups[] = { "uart1-data", };
744 static const char *jz4755_uart2_groups[] = { "uart2-data", };
745 static const char *jz4755_ssi_groups[] = {
753 static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
754 static const char *jz4755_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
755 static const char *jz4755_i2c_groups[] = { "i2c-data", };
756 static const char *jz4755_cim_groups[] = { "cim-data", };
757 static const char *jz4755_lcd_groups[] = {
761 static const char *jz4755_nand_groups[] = {
764 static const char *jz4755_pwm0_groups[] = { "pwm0", };
765 static const char *jz4755_pwm1_groups[] = { "pwm1", };
766 static const char *jz4755_pwm2_groups[] = { "pwm2", };
767 static const char *jz4755_pwm3_groups[] = { "pwm3", };
768 static const char *jz4755_pwm4_groups[] = { "pwm4", };
769 static const char *jz4755_pwm5_groups[] = { "pwm5", };
771 static const struct pinfunction jz4755_functions[] = {
790 static const struct ingenic_chip_info jz4755_chip_info = {
802 static const u32 jz4760_pull_ups[6] = {
806 static const u32 jz4760_pull_downs[6] = {
810 static int jz4760_uart0_data_pins[] = { 0xa0, 0xa3, };
811 static int jz4760_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
812 static int jz4760_uart1_data_pins[] = { 0x7a, 0x7c, };
813 static int jz4760_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
814 static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };
815 static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
816 static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
817 static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
818 static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
819 static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
820 static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
821 static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
822 static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
823 static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
824 static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
825 static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
826 static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
827 static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
828 static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
829 static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
830 static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
831 static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
832 static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
833 static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
834 static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
835 static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
836 static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
837 static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
838 static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
839 static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
840 static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
841 static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
842 static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
843 static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
844 static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
845 static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
846 static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
847 static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
848 static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
849 static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
850 static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
851 static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
852 static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
853 static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
854 static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
855 static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
856 static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
857 static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
858 static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
859 static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
860 static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
861 static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
862 static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
863 static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
864 static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
865 static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
866 static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
867 static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
868 static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
869 static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
870 static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
871 static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
872 static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
873 static int jz4760_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
874 static int jz4760_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
875 static int jz4760_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
876 static int jz4760_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
877 static int jz4760_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
878 static int jz4760_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
879 static int jz4760_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
880 static int jz4760_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
881 static int jz4760_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
882 static int jz4760_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
883 static int jz4760_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
884 static int jz4760_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
885 static int jz4760_nemc_8bit_data_pins[] = {
888 static int jz4760_nemc_16bit_data_pins[] = {
891 static int jz4760_nemc_cle_ale_pins[] = { 0x20, 0x21, };
892 static int jz4760_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
893 static int jz4760_nemc_rd_we_pins[] = { 0x10, 0x11, };
894 static int jz4760_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
895 static int jz4760_nemc_wait_pins[] = { 0x1b, };
896 static int jz4760_nemc_cs1_pins[] = { 0x15, };
897 static int jz4760_nemc_cs2_pins[] = { 0x16, };
898 static int jz4760_nemc_cs3_pins[] = { 0x17, };
899 static int jz4760_nemc_cs4_pins[] = { 0x18, };
900 static int jz4760_nemc_cs5_pins[] = { 0x19, };
901 static int jz4760_nemc_cs6_pins[] = { 0x1a, };
902 static int jz4760_i2c0_pins[] = { 0x7e, 0x7f, };
903 static int jz4760_i2c1_pins[] = { 0x9e, 0x9f, };
904 static int jz4760_cim_pins[] = {
908 static int jz4760_lcd_8bit_pins[] = {
912 static int jz4760_lcd_16bit_pins[] = {
915 static int jz4760_lcd_18bit_pins[] = {
918 static int jz4760_lcd_24bit_pins[] = {
921 static int jz4760_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
922 static int jz4760_lcd_generic_pins[] = { 0x49, };
923 static int jz4760_pwm_pwm0_pins[] = { 0x80, };
924 static int jz4760_pwm_pwm1_pins[] = { 0x81, };
925 static int jz4760_pwm_pwm2_pins[] = { 0x82, };
926 static int jz4760_pwm_pwm3_pins[] = { 0x83, };
927 static int jz4760_pwm_pwm4_pins[] = { 0x84, };
928 static int jz4760_pwm_pwm5_pins[] = { 0x85, };
929 static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
930 static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
931 static int jz4760_otg_pins[] = { 0x8a, };
933 static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
934 static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
936 static const struct group_desc jz4760_groups[] = {
1047 static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1048 static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1049 static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1050 static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1051 static const char *jz4760_ssi0_groups[] = {
1059 static const char *jz4760_ssi1_groups[] = {
1067 static const char *jz4760_mmc0_groups[] = {
1071 static const char *jz4760_mmc1_groups[] = {
1075 static const char *jz4760_mmc2_groups[] = {
1079 static const char *jz4760_nemc_groups[] = {
1083 static const char *jz4760_cs1_groups[] = { "nemc-cs1", };
1084 static const char *jz4760_cs2_groups[] = { "nemc-cs2", };
1085 static const char *jz4760_cs3_groups[] = { "nemc-cs3", };
1086 static const char *jz4760_cs4_groups[] = { "nemc-cs4", };
1087 static const char *jz4760_cs5_groups[] = { "nemc-cs5", };
1088 static const char *jz4760_cs6_groups[] = { "nemc-cs6", };
1089 static const char *jz4760_i2c0_groups[] = { "i2c0-data", };
1090 static const char *jz4760_i2c1_groups[] = { "i2c1-data", };
1091 static const char *jz4760_cim_groups[] = { "cim-data", };
1092 static const char *jz4760_lcd_groups[] = {
1096 static const char *jz4760_pwm0_groups[] = { "pwm0", };
1097 static const char *jz4760_pwm1_groups[] = { "pwm1", };
1098 static const char *jz4760_pwm2_groups[] = { "pwm2", };
1099 static const char *jz4760_pwm3_groups[] = { "pwm3", };
1100 static const char *jz4760_pwm4_groups[] = { "pwm4", };
1101 static const char *jz4760_pwm5_groups[] = { "pwm5", };
1102 static const char *jz4760_pwm6_groups[] = { "pwm6", };
1103 static const char *jz4760_pwm7_groups[] = { "pwm7", };
1104 static const char *jz4760_otg_groups[] = { "otg-vbus", };
1106 static const struct pinfunction jz4760_functions[] = {
1138 static const struct ingenic_chip_info jz4760_chip_info = {
1150 static const u32 jz4770_pull_ups[6] = {
1154 static const u32 jz4770_pull_downs[6] = {
1158 static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };
1159 static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1160 static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };
1161 static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1162 static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };
1163 static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
1164 static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };
1165 static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
1166 static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
1167 static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
1168 static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
1169 static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
1170 static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
1171 static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
1172 static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
1173 static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
1174 static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
1175 static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
1176 static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
1177 static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
1178 static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
1179 static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
1180 static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
1181 static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
1182 static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
1183 static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
1184 static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
1185 static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
1186 static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
1187 static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
1188 static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
1189 static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
1190 static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
1191 static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
1192 static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
1193 static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
1194 static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
1195 static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
1196 static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
1197 static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
1198 static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
1199 static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
1200 static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
1201 static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
1202 static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
1203 static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
1204 static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
1205 static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
1206 static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1207 static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1208 static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1209 static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1210 static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1211 static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1212 static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1213 static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1214 static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1215 static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1216 static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1217 static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1218 static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1219 static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1220 static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1221 static int jz4770_nemc_8bit_data_pins[] = {
1224 static int jz4770_nemc_16bit_data_pins[] = {
1227 static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1228 static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1229 static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
1230 static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1231 static int jz4770_nemc_wait_pins[] = { 0x1b, };
1232 static int jz4770_nemc_cs1_pins[] = { 0x15, };
1233 static int jz4770_nemc_cs2_pins[] = { 0x16, };
1234 static int jz4770_nemc_cs3_pins[] = { 0x17, };
1235 static int jz4770_nemc_cs4_pins[] = { 0x18, };
1236 static int jz4770_nemc_cs5_pins[] = { 0x19, };
1237 static int jz4770_nemc_cs6_pins[] = { 0x1a, };
1238 static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };
1239 static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };
1240 static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };
1241 static int jz4770_cim_8bit_pins[] = {
1245 static int jz4770_cim_12bit_pins[] = {
1248 static int jz4770_lcd_8bit_pins[] = {
1252 static int jz4770_lcd_16bit_pins[] = {
1255 static int jz4770_lcd_18bit_pins[] = {
1258 static int jz4770_lcd_24bit_pins[] = {
1264 static int jz4770_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1265 static int jz4770_lcd_generic_pins[] = { 0x49, };
1266 static int jz4770_pwm_pwm0_pins[] = { 0x80, };
1267 static int jz4770_pwm_pwm1_pins[] = { 0x81, };
1268 static int jz4770_pwm_pwm2_pins[] = { 0x82, };
1269 static int jz4770_pwm_pwm3_pins[] = { 0x83, };
1270 static int jz4770_pwm_pwm4_pins[] = { 0x84, };
1271 static int jz4770_pwm_pwm5_pins[] = { 0x85, };
1272 static int jz4770_pwm_pwm6_pins[] = { 0x6a, };
1273 static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
1274 static int jz4770_mac_rmii_pins[] = {
1277 static int jz4770_mac_mii_pins[] = {
1281 static const struct group_desc jz4770_groups[] = {
1384 static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1385 static const char *jz4770_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1386 static const char *jz4770_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1387 static const char *jz4770_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1388 static const char *jz4770_ssi0_groups[] = {
1396 static const char *jz4770_ssi1_groups[] = {
1404 static const char *jz4770_mmc0_groups[] = {
1408 static const char *jz4770_mmc1_groups[] = {
1412 static const char *jz4770_mmc2_groups[] = {
1416 static const char *jz4770_nemc_groups[] = {
1420 static const char *jz4770_cs1_groups[] = { "nemc-cs1", };
1421 static const char *jz4770_cs2_groups[] = { "nemc-cs2", };
1422 static const char *jz4770_cs3_groups[] = { "nemc-cs3", };
1423 static const char *jz4770_cs4_groups[] = { "nemc-cs4", };
1424 static const char *jz4770_cs5_groups[] = { "nemc-cs5", };
1425 static const char *jz4770_cs6_groups[] = { "nemc-cs6", };
1426 static const char *jz4770_i2c0_groups[] = { "i2c0-data", };
1427 static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
1428 static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
1429 static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
1430 static const char *jz4770_lcd_groups[] = {
1434 static const char *jz4770_pwm0_groups[] = { "pwm0", };
1435 static const char *jz4770_pwm1_groups[] = { "pwm1", };
1436 static const char *jz4770_pwm2_groups[] = { "pwm2", };
1437 static const char *jz4770_pwm3_groups[] = { "pwm3", };
1438 static const char *jz4770_pwm4_groups[] = { "pwm4", };
1439 static const char *jz4770_pwm5_groups[] = { "pwm5", };
1440 static const char *jz4770_pwm6_groups[] = { "pwm6", };
1441 static const char *jz4770_pwm7_groups[] = { "pwm7", };
1442 static const char *jz4770_mac_groups[] = { "mac-rmii", "mac-mii", };
1444 static const struct pinfunction jz4770_functions[] = {
1478 static const struct ingenic_chip_info jz4770_chip_info = {
1490 static const u32 jz4775_pull_ups[7] = {
1494 static const u32 jz4775_pull_downs[7] = {
1498 static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, };
1499 static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1500 static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, };
1501 static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1502 static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, };
1503 static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, };
1504 static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, };
1505 static int jz4775_ssi_dt_a_pins[] = { 0x13, };
1506 static int jz4775_ssi_dt_d_pins[] = { 0x75, };
1507 static int jz4775_ssi_dr_a_pins[] = { 0x14, };
1508 static int jz4775_ssi_dr_d_pins[] = { 0x74, };
1509 static int jz4775_ssi_clk_a_pins[] = { 0x12, };
1510 static int jz4775_ssi_clk_d_pins[] = { 0x78, };
1511 static int jz4775_ssi_gpc_pins[] = { 0x76, };
1512 static int jz4775_ssi_ce0_a_pins[] = { 0x17, };
1513 static int jz4775_ssi_ce0_d_pins[] = { 0x79, };
1514 static int jz4775_ssi_ce1_pins[] = { 0x77, };
1515 static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1516 static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1517 static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, };
1518 static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1519 static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1520 static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1521 static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1522 static int jz4775_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1523 static int jz4775_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1524 static int jz4775_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1525 static int jz4775_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1526 static int jz4775_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1527 static int jz4775_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1528 static int jz4775_nemc_8bit_data_pins[] = {
1531 static int jz4775_nemc_16bit_data_pins[] = {
1534 static int jz4775_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1535 static int jz4775_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1536 static int jz4775_nemc_rd_we_pins[] = { 0x10, 0x11, };
1537 static int jz4775_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1538 static int jz4775_nemc_wait_pins[] = { 0x1b, };
1539 static int jz4775_nemc_cs1_pins[] = { 0x15, };
1540 static int jz4775_nemc_cs2_pins[] = { 0x16, };
1541 static int jz4775_nemc_cs3_pins[] = { 0x17, };
1542 static int jz4775_i2c0_pins[] = { 0x7e, 0x7f, };
1543 static int jz4775_i2c1_pins[] = { 0x9e, 0x9f, };
1544 static int jz4775_i2c2_pins[] = { 0x80, 0x83, };
1545 static int jz4775_i2s_data_tx_pins[] = { 0xa3, };
1546 static int jz4775_i2s_data_rx_pins[] = { 0xa2, };
1547 static int jz4775_i2s_clk_txrx_pins[] = { 0xa0, 0xa1, };
1548 static int jz4775_i2s_sysclk_pins[] = { 0x83, };
1549 static int jz4775_dmic_pins[] = { 0xaa, 0xab, };
1550 static int jz4775_cim_pins[] = {
1554 static int jz4775_lcd_8bit_pins[] = {
1558 static int jz4775_lcd_16bit_pins[] = {
1561 static int jz4775_lcd_18bit_pins[] = {
1564 static int jz4775_lcd_24bit_pins[] = {
1567 static int jz4775_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1568 static int jz4775_lcd_generic_pins[] = { 0x49, };
1569 static int jz4775_pwm_pwm0_pins[] = { 0x80, };
1570 static int jz4775_pwm_pwm1_pins[] = { 0x81, };
1571 static int jz4775_pwm_pwm2_pins[] = { 0x82, };
1572 static int jz4775_pwm_pwm3_pins[] = { 0x83, };
1573 static int jz4775_mac_rmii_pins[] = {
1576 static int jz4775_mac_mii_pins[] = {
1579 static int jz4775_mac_rgmii_pins[] = {
1583 static int jz4775_mac_gmii_pins[] = {
1587 static int jz4775_otg_pins[] = { 0x8a, };
1589 static u8 jz4775_uart3_data_funcs[] = { 0, 1, };
1590 static u8 jz4775_mac_mii_funcs[] = { 1, 1, 1, 1, 0, 1, 0, };
1591 static u8 jz4775_mac_rgmii_funcs[] = {
1595 static u8 jz4775_mac_gmii_funcs[] = {
1600 static const struct group_desc jz4775_groups[] = {
1671 static const char *jz4775_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1672 static const char *jz4775_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1673 static const char *jz4775_uart2_groups[] = { "uart2-data-c", "uart2-data-f", };
1674 static const char *jz4775_uart3_groups[] = { "uart3-data", };
1675 static const char *jz4775_ssi_groups[] = {
1683 static const char *jz4775_mmc0_groups[] = {
1687 static const char *jz4775_mmc1_groups[] = {
1691 static const char *jz4775_mmc2_groups[] = {
1695 static const char *jz4775_nemc_groups[] = {
1699 static const char *jz4775_cs1_groups[] = { "nemc-cs1", };
1700 static const char *jz4775_cs2_groups[] = { "nemc-cs2", };
1701 static const char *jz4775_cs3_groups[] = { "nemc-cs3", };
1702 static const char *jz4775_i2c0_groups[] = { "i2c0-data", };
1703 static const char *jz4775_i2c1_groups[] = { "i2c1-data", };
1704 static const char *jz4775_i2c2_groups[] = { "i2c2-data", };
1705 static const char *jz4775_i2s_groups[] = {
1708 static const char *jz4775_dmic_groups[] = { "dmic", };
1709 static const char *jz4775_cim_groups[] = { "cim-data", };
1710 static const char *jz4775_lcd_groups[] = {
1714 static const char *jz4775_pwm0_groups[] = { "pwm0", };
1715 static const char *jz4775_pwm1_groups[] = { "pwm1", };
1716 static const char *jz4775_pwm2_groups[] = { "pwm2", };
1717 static const char *jz4775_pwm3_groups[] = { "pwm3", };
1718 static const char *jz4775_mac_groups[] = {
1721 static const char *jz4775_otg_groups[] = { "otg-vbus", };
1723 static const struct pinfunction jz4775_functions[] = {
1751 static const struct ingenic_chip_info jz4775_chip_info = {
1763 static const u32 jz4780_pull_ups[6] = {
1767 static const u32 jz4780_pull_downs[6] = {
1771 static int jz4780_uart2_data_pins[] = { 0x66, 0x67, };
1772 static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, };
1773 static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, };
1774 static int jz4780_ssi0_dt_a_19_pins[] = { 0x13, };
1775 static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
1776 static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
1777 static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
1778 static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
1779 static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
1780 static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
1781 static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
1782 static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
1783 static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
1784 static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
1785 static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
1786 static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
1787 static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
1788 static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
1789 static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
1790 static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
1791 static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
1792 static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
1793 static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
1794 static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
1795 static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
1796 static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
1797 static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
1798 static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
1799 static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
1800 static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
1801 static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
1802 static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
1803 static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
1804 static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
1805 static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
1806 static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
1807 static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
1808 static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
1809 static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
1810 static int jz4780_i2c4_f_pins[] = { 0xb9, 0xb8, };
1811 static int jz4780_i2s_data_tx_pins[] = { 0x87, };
1812 static int jz4780_i2s_data_rx_pins[] = { 0x86, };
1813 static int jz4780_i2s_clk_txrx_pins[] = { 0x6c, 0x6d, };
1814 static int jz4780_i2s_clk_rx_pins[] = { 0x88, 0x89, };
1815 static int jz4780_i2s_sysclk_pins[] = { 0x85, };
1816 static int jz4780_dmic_pins[] = { 0x32, 0x33, };
1817 static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
1819 static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
1821 static const struct group_desc jz4780_groups[] = {
1935 static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1936 static const char *jz4780_uart4_groups[] = { "uart4-data", };
1937 static const char *jz4780_ssi0_groups[] = {
1945 static const char *jz4780_ssi1_groups[] = {
1953 static const char *jz4780_mmc0_groups[] = {
1957 static const char *jz4780_mmc1_groups[] = {
1960 static const char *jz4780_mmc2_groups[] = {
1963 static const char *jz4780_nemc_groups[] = {
1967 static const char *jz4780_i2c3_groups[] = { "i2c3-data", };
1968 static const char *jz4780_i2c4_groups[] = { "i2c4-data-e", "i2c4-data-f", };
1969 static const char *jz4780_i2s_groups[] = {
1972 static const char *jz4780_dmic_groups[] = { "dmic", };
1973 static const char *jz4780_cim_groups[] = { "cim-data", };
1974 static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", };
1976 static const struct pinfunction jz4780_functions[] = {
2014 static const struct ingenic_chip_info jz4780_chip_info = {
2026 static const u32 x1000_pull_ups[4] = {
2030 static const u32 x1000_pull_downs[4] = {
2034 static int x1000_uart0_data_pins[] = { 0x4a, 0x4b, };
2035 static int x1000_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2036 static int x1000_uart1_data_a_pins[] = { 0x04, 0x05, };
2037 static int x1000_uart1_data_d_pins[] = { 0x62, 0x63, };
2038 static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
2039 static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
2040 static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
2041 static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
2042 static int x1000_sfc_clk_pins[] = { 0x1a, };
2043 static int x1000_sfc_ce_pins[] = { 0x1b, };
2044 static int x1000_ssi_dt_a_22_pins[] = { 0x16, };
2045 static int x1000_ssi_dt_a_29_pins[] = { 0x1d, };
2046 static int x1000_ssi_dt_d_pins[] = { 0x62, };
2047 static int x1000_ssi_dr_a_23_pins[] = { 0x17, };
2048 static int x1000_ssi_dr_a_28_pins[] = { 0x1c, };
2049 static int x1000_ssi_dr_d_pins[] = { 0x63, };
2050 static int x1000_ssi_clk_a_24_pins[] = { 0x18, };
2051 static int x1000_ssi_clk_a_26_pins[] = { 0x1a, };
2052 static int x1000_ssi_clk_d_pins[] = { 0x60, };
2053 static int x1000_ssi_gpc_a_20_pins[] = { 0x14, };
2054 static int x1000_ssi_gpc_a_31_pins[] = { 0x1f, };
2055 static int x1000_ssi_ce0_a_25_pins[] = { 0x19, };
2056 static int x1000_ssi_ce0_a_27_pins[] = { 0x1b, };
2057 static int x1000_ssi_ce0_d_pins[] = { 0x61, };
2058 static int x1000_ssi_ce1_a_21_pins[] = { 0x15, };
2059 static int x1000_ssi_ce1_a_30_pins[] = { 0x1e, };
2060 static int x1000_mmc0_1bit_pins[] = { 0x18, 0x19, 0x17, };
2061 static int x1000_mmc0_4bit_pins[] = { 0x16, 0x15, 0x14, };
2062 static int x1000_mmc0_8bit_pins[] = { 0x13, 0x12, 0x11, 0x10, };
2063 static int x1000_mmc1_1bit_pins[] = { 0x40, 0x41, 0x42, };
2064 static int x1000_mmc1_4bit_pins[] = { 0x43, 0x44, 0x45, };
2065 static int x1000_emc_8bit_data_pins[] = {
2068 static int x1000_emc_16bit_data_pins[] = {
2071 static int x1000_emc_addr_pins[] = {
2075 static int x1000_emc_rd_we_pins[] = { 0x30, 0x31, };
2076 static int x1000_emc_wait_pins[] = { 0x34, };
2077 static int x1000_emc_cs1_pins[] = { 0x32, };
2078 static int x1000_emc_cs2_pins[] = { 0x33, };
2079 static int x1000_i2c0_pins[] = { 0x38, 0x37, };
2080 static int x1000_i2c1_a_pins[] = { 0x01, 0x00, };
2081 static int x1000_i2c1_c_pins[] = { 0x5b, 0x5a, };
2082 static int x1000_i2c2_pins[] = { 0x61, 0x60, };
2083 static int x1000_i2s_data_tx_pins[] = { 0x24, };
2084 static int x1000_i2s_data_rx_pins[] = { 0x23, };
2085 static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2086 static int x1000_i2s_sysclk_pins[] = { 0x20, };
2087 static int x1000_dmic_if0_pins[] = { 0x35, 0x36, };
2088 static int x1000_dmic_if1_pins[] = { 0x25, };
2089 static int x1000_cim_pins[] = {
2093 static int x1000_lcd_8bit_pins[] = {
2097 static int x1000_lcd_16bit_pins[] = {
2100 static int x1000_pwm_pwm0_pins[] = { 0x59, };
2101 static int x1000_pwm_pwm1_pins[] = { 0x5a, };
2102 static int x1000_pwm_pwm2_pins[] = { 0x5b, };
2103 static int x1000_pwm_pwm3_pins[] = { 0x26, };
2104 static int x1000_pwm_pwm4_pins[] = { 0x58, };
2105 static int x1000_mac_pins[] = {
2109 static const struct group_desc x1000_groups[] = {
2169 static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2170 static const char *x1000_uart1_groups[] = {
2173 static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2174 static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2175 static const char *x1000_ssi_groups[] = {
2183 static const char *x1000_mmc0_groups[] = {
2186 static const char *x1000_mmc1_groups[] = {
2189 static const char *x1000_emc_groups[] = {
2193 static const char *x1000_cs1_groups[] = { "emc-cs1", };
2194 static const char *x1000_cs2_groups[] = { "emc-cs2", };
2195 static const char *x1000_i2c0_groups[] = { "i2c0-data", };
2196 static const char *x1000_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2197 static const char *x1000_i2c2_groups[] = { "i2c2-data", };
2198 static const char *x1000_i2s_groups[] = {
2201 static const char *x1000_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2202 static const char *x1000_cim_groups[] = { "cim-data", };
2203 static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", };
2204 static const char *x1000_pwm0_groups[] = { "pwm0", };
2205 static const char *x1000_pwm1_groups[] = { "pwm1", };
2206 static const char *x1000_pwm2_groups[] = { "pwm2", };
2207 static const char *x1000_pwm3_groups[] = { "pwm3", };
2208 static const char *x1000_pwm4_groups[] = { "pwm4", };
2209 static const char *x1000_mac_groups[] = { "mac", };
2211 static const struct pinfunction x1000_functions[] = {
2237 static const struct regmap_range x1000_access_ranges[] = {
2243 static const struct regmap_access_table x1000_access_table = {
2248 static const struct ingenic_chip_info x1000_chip_info = {
2261 static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, };
2262 static int x1500_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2263 static int x1500_uart1_data_a_pins[] = { 0x04, 0x05, };
2264 static int x1500_uart1_data_d_pins[] = { 0x62, 0x63, };
2265 static int x1500_uart1_hwflow_pins[] = { 0x64, 0x65, };
2266 static int x1500_uart2_data_a_pins[] = { 0x02, 0x03, };
2267 static int x1500_uart2_data_d_pins[] = { 0x65, 0x64, };
2268 static int x1500_mmc_1bit_pins[] = { 0x18, 0x19, 0x17, };
2269 static int x1500_mmc_4bit_pins[] = { 0x16, 0x15, 0x14, };
2270 static int x1500_i2c0_pins[] = { 0x38, 0x37, };
2271 static int x1500_i2c1_a_pins[] = { 0x01, 0x00, };
2272 static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, };
2273 static int x1500_i2c2_pins[] = { 0x61, 0x60, };
2274 static int x1500_i2s_data_tx_pins[] = { 0x24, };
2275 static int x1500_i2s_data_rx_pins[] = { 0x23, };
2276 static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2277 static int x1500_i2s_sysclk_pins[] = { 0x20, };
2278 static int x1500_dmic_if0_pins[] = { 0x35, 0x36, };
2279 static int x1500_dmic_if1_pins[] = { 0x25, };
2280 static int x1500_cim_pins[] = {
2284 static int x1500_pwm_pwm0_pins[] = { 0x59, };
2285 static int x1500_pwm_pwm1_pins[] = { 0x5a, };
2286 static int x1500_pwm_pwm2_pins[] = { 0x5b, };
2287 static int x1500_pwm_pwm3_pins[] = { 0x26, };
2288 static int x1500_pwm_pwm4_pins[] = { 0x58, };
2290 static const struct group_desc x1500_groups[] = {
2321 static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2322 static const char *x1500_uart1_groups[] = {
2325 static const char *x1500_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2326 static const char *x1500_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
2327 static const char *x1500_i2c0_groups[] = { "i2c0-data", };
2328 static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2329 static const char *x1500_i2c2_groups[] = { "i2c2-data", };
2330 static const char *x1500_i2s_groups[] = {
2333 static const char *x1500_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2334 static const char *x1500_cim_groups[] = { "cim-data", };
2335 static const char *x1500_pwm0_groups[] = { "pwm0", };
2336 static const char *x1500_pwm1_groups[] = { "pwm1", };
2337 static const char *x1500_pwm2_groups[] = { "pwm2", };
2338 static const char *x1500_pwm3_groups[] = { "pwm3", };
2339 static const char *x1500_pwm4_groups[] = { "pwm4", };
2341 static const struct pinfunction x1500_functions[] = {
2360 static const struct ingenic_chip_info x1500_chip_info = {
2373 static const u32 x1600_pull_ups[4] = {
2377 static const u32 x1600_pull_downs[4] = {
2381 static int x1600_uart0_data_pins[] = { 0x27, 0x28, };
2382 static int x1600_uart0_hwflow_pins[] = { 0x29, 0x2a, };
2383 static int x1600_uart1_data_pins[] = { 0x23, 0x22, };
2384 static int x1600_uart1_hwflow_pins[] = { 0x25, 0x24, };
2385 static int x1600_uart2_data_a_pins[] = { 0x1f, 0x1e, };
2386 static int x1600_uart2_data_b_pins[] = { 0x21, 0x20, };
2387 static int x1600_uart3_data_b_pins[] = { 0x25, 0x24, };
2388 static int x1600_uart3_data_d_pins[] = { 0x65, 0x64, };
2389 static int x1600_sfc_pins[] = { 0x53, 0x54, 0x55, 0x56, 0x51, 0x52, 0x24, };
2390 static int x1600_ssi_dt_a_pins[] = { 0x1e, };
2391 static int x1600_ssi_dt_b_pins[] = { 0x2d, };
2392 static int x1600_ssi_dr_a_pins[] = { 0x1d, };
2393 static int x1600_ssi_dr_b_pins[] = { 0x2e, };
2394 static int x1600_ssi_clk_a_pins[] = { 0x1f, };
2395 static int x1600_ssi_clk_b_pins[] = { 0x2c, };
2396 static int x1600_ssi_ce0_a_pins[] = { 0x1c, };
2397 static int x1600_ssi_ce0_b_pins[] = { 0x31, };
2398 static int x1600_ssi_ce1_a_pins[] = { 0x22, };
2399 static int x1600_ssi_ce1_b_pins[] = { 0x30, };
2400 static int x1600_mmc0_1bit_b_pins[] = { 0x2c, 0x2d, 0x2e, };
2401 static int x1600_mmc0_4bit_b_pins[] = { 0x2f, 0x30, 0x31, };
2402 static int x1600_mmc0_1bit_c_pins[] = { 0x51, 0x53, 0x54, };
2403 static int x1600_mmc0_4bit_c_pins[] = { 0x56, 0x55, 0x52, };
2404 static int x1600_mmc1_1bit_pins[] = { 0x60, 0x61, 0x62, };
2405 static int x1600_mmc1_4bit_pins[] = { 0x63, 0x64, 0x65, };
2406 static int x1600_i2c0_a_pins[] = { 0x1d, 0x1c, };
2407 static int x1600_i2c0_b_pins[] = { 0x3f, 0x3e, };
2408 static int x1600_i2c1_b_15_pins[] = { 0x30, 0x2f, };
2409 static int x1600_i2c1_b_19_pins[] = { 0x34, 0x33, };
2410 static int x1600_i2s_data_tx_pins[] = { 0x39, };
2411 static int x1600_i2s_data_rx_pins[] = { 0x35, };
2412 static int x1600_i2s_clk_rx_pins[] = { 0x37, 0x38, };
2413 static int x1600_i2s_clk_tx_pins[] = { 0x3b, 0x3c, };
2414 static int x1600_i2s_sysclk_pins[] = { 0x36, 0x3a, };
2416 static int x1600_cim_pins[] = {
2421 static int x1600_slcd_8bit_pins[] = {
2426 static int x1600_slcd_16bit_pins[] = {
2430 static int x1600_lcd_16bit_pins[] = {
2436 static int x1600_lcd_18bit_pins[] = {
2440 static int x1600_lcd_24bit_pins[] = {
2444 static int x1600_pwm_pwm0_pins[] = { 0x40, };
2445 static int x1600_pwm_pwm1_pins[] = { 0x41, };
2446 static int x1600_pwm_pwm2_pins[] = { 0x42, };
2447 static int x1600_pwm_pwm3_pins[] = { 0x58, };
2448 static int x1600_pwm_pwm4_pins[] = { 0x59, };
2449 static int x1600_pwm_pwm5_b_pins[] = { 0x33, };
2450 static int x1600_pwm_pwm5_c_pins[] = { 0x5a, };
2451 static int x1600_pwm_pwm6_b9_pins[] = { 0x29, };
2452 static int x1600_pwm_pwm6_b20_pins[] = { 0x34, };
2453 static int x1600_pwm_pwm7_b10_pins[] = { 0x2a, };
2454 static int x1600_pwm_pwm7_b21_pins[] = { 0x35, };
2456 static int x1600_mac_pins[] = {
2460 static int x1600_sfc_funcs[] = { 0, 0, 0, 0, 0, 0, 2, };
2462 static const struct group_desc x1600_groups[] = {
2517 static const char * const x1600_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2518 static const char * const x1600_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
2519 static const char * const x1600_uart2_groups[] = { "uart2-data-a", "uart2-data-b", };
2520 static const char * const x1600_uart3_groups[] = { "uart3-data-b", "uart3-data-d", };
2522 static const char * const x1600_sfc_groups[] = { "sfc", };
2524 static const char * const x1600_ssi_groups[] = {
2532 static const char * const x1600_mmc0_groups[] = { "mmc0-1bit-b", "mmc0-4bit-b",
2536 static const char * const x1600_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2538 static const char * const x1600_i2c0_groups[] = { "i2c0-data-a", "i2c0-data-b", };
2539 static const char * const x1600_i2c1_groups[] = { "i2c1-data-b-15", "i2c1-data-b-19", };
2541 static const char * const x1600_i2s_groups[] = {
2545 static const char * const x1600_cim_groups[] = { "cim-data", };
2547 static const char * const x1600_lcd_groups[] = { "slcd-8bit", "slcd-16bit",
2551 static const char * const x1600_pwm0_groups[] = { "pwm0", };
2552 static const char * const x1600_pwm1_groups[] = { "pwm1", };
2553 static const char * const x1600_pwm2_groups[] = { "pwm2", };
2554 static const char * const x1600_pwm3_groups[] = { "pwm3", };
2555 static const char * const x1600_pwm4_groups[] = { "pwm4", };
2556 static const char * const x1600_pwm5_groups[] = { "pwm5-b", "pwm5-c", };
2557 static const char * const x1600_pwm6_groups[] = { "pwm6-b9", "pwm6-b20", };
2558 static const char * const x1600_pwm7_groups[] = { "pwm7-b10", "pwm7-b21", };
2560 static const char * const x1600_mac_groups[] = { "mac", };
2562 static const struct pinfunction x1600_functions[] = {
2587 static const struct ingenic_chip_info x1600_chip_info = {
2600 static const u32 x1830_pull_ups[4] = {
2604 static const u32 x1830_pull_downs[4] = {
2608 static int x1830_uart0_data_pins[] = { 0x33, 0x36, };
2609 static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, };
2610 static int x1830_uart1_data_pins[] = { 0x38, 0x37, };
2611 static int x1830_sfc_data_pins[] = { 0x17, 0x18, 0x1a, 0x19, };
2612 static int x1830_sfc_clk_pins[] = { 0x1b, };
2613 static int x1830_sfc_ce_pins[] = { 0x1c, };
2614 static int x1830_ssi0_dt_pins[] = { 0x4c, };
2615 static int x1830_ssi0_dr_pins[] = { 0x4b, };
2616 static int x1830_ssi0_clk_pins[] = { 0x4f, };
2617 static int x1830_ssi0_gpc_pins[] = { 0x4d, };
2618 static int x1830_ssi0_ce0_pins[] = { 0x50, };
2619 static int x1830_ssi0_ce1_pins[] = { 0x4e, };
2620 static int x1830_ssi1_dt_c_pins[] = { 0x53, };
2621 static int x1830_ssi1_dt_d_pins[] = { 0x62, };
2622 static int x1830_ssi1_dr_c_pins[] = { 0x54, };
2623 static int x1830_ssi1_dr_d_pins[] = { 0x63, };
2624 static int x1830_ssi1_clk_c_pins[] = { 0x57, };
2625 static int x1830_ssi1_clk_d_pins[] = { 0x66, };
2626 static int x1830_ssi1_gpc_c_pins[] = { 0x55, };
2627 static int x1830_ssi1_gpc_d_pins[] = { 0x64, };
2628 static int x1830_ssi1_ce0_c_pins[] = { 0x58, };
2629 static int x1830_ssi1_ce0_d_pins[] = { 0x67, };
2630 static int x1830_ssi1_ce1_c_pins[] = { 0x56, };
2631 static int x1830_ssi1_ce1_d_pins[] = { 0x65, };
2632 static int x1830_mmc0_1bit_pins[] = { 0x24, 0x25, 0x20, };
2633 static int x1830_mmc0_4bit_pins[] = { 0x21, 0x22, 0x23, };
2634 static int x1830_mmc1_1bit_pins[] = { 0x42, 0x43, 0x44, };
2635 static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, };
2636 static int x1830_i2c0_pins[] = { 0x0c, 0x0d, };
2637 static int x1830_i2c1_pins[] = { 0x39, 0x3a, };
2638 static int x1830_i2c2_pins[] = { 0x5b, 0x5c, };
2639 static int x1830_i2s_data_tx_pins[] = { 0x53, };
2640 static int x1830_i2s_data_rx_pins[] = { 0x54, };
2641 static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, };
2642 static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, };
2643 static int x1830_i2s_sysclk_pins[] = { 0x57, };
2644 static int x1830_dmic_if0_pins[] = { 0x48, 0x59, };
2645 static int x1830_dmic_if1_pins[] = { 0x5a, };
2646 static int x1830_lcd_tft_8bit_pins[] = {
2650 static int x1830_lcd_tft_24bit_pins[] = {
2654 static int x1830_lcd_slcd_8bit_pins[] = {
2658 static int x1830_lcd_slcd_16bit_pins[] = {
2661 static int x1830_pwm_pwm0_b_pins[] = { 0x31, };
2662 static int x1830_pwm_pwm0_c_pins[] = { 0x4b, };
2663 static int x1830_pwm_pwm1_b_pins[] = { 0x32, };
2664 static int x1830_pwm_pwm1_c_pins[] = { 0x4c, };
2665 static int x1830_pwm_pwm2_c_8_pins[] = { 0x48, };
2666 static int x1830_pwm_pwm2_c_13_pins[] = { 0x4d, };
2667 static int x1830_pwm_pwm3_c_9_pins[] = { 0x49, };
2668 static int x1830_pwm_pwm3_c_14_pins[] = { 0x4e, };
2669 static int x1830_pwm_pwm4_c_15_pins[] = { 0x4f, };
2670 static int x1830_pwm_pwm4_c_25_pins[] = { 0x59, };
2671 static int x1830_pwm_pwm5_c_16_pins[] = { 0x50, };
2672 static int x1830_pwm_pwm5_c_26_pins[] = { 0x5a, };
2673 static int x1830_pwm_pwm6_c_17_pins[] = { 0x51, };
2674 static int x1830_pwm_pwm6_c_27_pins[] = { 0x5b, };
2675 static int x1830_pwm_pwm7_c_18_pins[] = { 0x52, };
2676 static int x1830_pwm_pwm7_c_28_pins[] = { 0x5c, };
2677 static int x1830_mac_pins[] = {
2681 static const struct group_desc x1830_groups[] = {
2743 static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2744 static const char *x1830_uart1_groups[] = { "uart1-data", };
2745 static const char *x1830_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2746 static const char *x1830_ssi0_groups[] = {
2749 static const char *x1830_ssi1_groups[] = {
2757 static const char *x1830_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
2758 static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2759 static const char *x1830_i2c0_groups[] = { "i2c0-data", };
2760 static const char *x1830_i2c1_groups[] = { "i2c1-data", };
2761 static const char *x1830_i2c2_groups[] = { "i2c2-data", };
2762 static const char *x1830_i2s_groups[] = {
2765 static const char *x1830_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2766 static const char *x1830_lcd_groups[] = {
2769 static const char *x1830_pwm0_groups[] = { "pwm0-b", "pwm0-c", };
2770 static const char *x1830_pwm1_groups[] = { "pwm1-b", "pwm1-c", };
2771 static const char *x1830_pwm2_groups[] = { "pwm2-c-8", "pwm2-c-13", };
2772 static const char *x1830_pwm3_groups[] = { "pwm3-c-9", "pwm3-c-14", };
2773 static const char *x1830_pwm4_groups[] = { "pwm4-c-15", "pwm4-c-25", };
2774 static const char *x1830_pwm5_groups[] = { "pwm5-c-16", "pwm5-c-26", };
2775 static const char *x1830_pwm6_groups[] = { "pwm6-c-17", "pwm6-c-27", };
2776 static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", };
2777 static const char *x1830_mac_groups[] = { "mac", };
2779 static const struct pinfunction x1830_functions[] = {
2804 static const struct regmap_range x1830_access_ranges[] = {
2809 static const struct regmap_access_table x1830_access_table = {
2814 static const struct ingenic_chip_info x1830_chip_info = {
2827 static const u32 x2000_pull_ups[5] = {
2831 static const u32 x2000_pull_downs[5] = {
2835 static int x2000_uart0_data_pins[] = { 0x77, 0x78, };
2836 static int x2000_uart0_hwflow_pins[] = { 0x79, 0x7a, };
2837 static int x2000_uart1_data_pins[] = { 0x57, 0x58, };
2838 static int x2000_uart1_hwflow_pins[] = { 0x55, 0x56, };
2839 static int x2000_uart2_data_pins[] = { 0x7e, 0x7f, };
2840 static int x2000_uart3_data_c_pins[] = { 0x59, 0x5a, };
2841 static int x2000_uart3_data_d_pins[] = { 0x62, 0x63, };
2842 static int x2000_uart3_hwflow_c_pins[] = { 0x5b, 0x5c, };
2843 static int x2000_uart3_hwflow_d_pins[] = { 0x60, 0x61, };
2844 static int x2000_uart4_data_a_pins[] = { 0x02, 0x03, };
2845 static int x2000_uart4_data_c_pins[] = { 0x4b, 0x4c, };
2846 static int x2000_uart4_hwflow_a_pins[] = { 0x00, 0x01, };
2847 static int x2000_uart4_hwflow_c_pins[] = { 0x49, 0x4a, };
2848 static int x2000_uart5_data_a_pins[] = { 0x04, 0x05, };
2849 static int x2000_uart5_data_c_pins[] = { 0x45, 0x46, };
2850 static int x2000_uart6_data_a_pins[] = { 0x06, 0x07, };
2851 static int x2000_uart6_data_c_pins[] = { 0x47, 0x48, };
2852 static int x2000_uart7_data_a_pins[] = { 0x08, 0x09, };
2853 static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, };
2854 static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, };
2855 static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, };
2856 static int x2000_sfc_data_if0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, };
2857 static int x2000_sfc_data_if0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, };
2858 static int x2000_sfc_data_if1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2859 static int x2000_sfc_clk_d_pins[] = { 0x71, };
2860 static int x2000_sfc_clk_e_pins[] = { 0x90, };
2861 static int x2000_sfc_ce_d_pins[] = { 0x72, };
2862 static int x2000_sfc_ce_e_pins[] = { 0x91, };
2863 static int x2000_ssi0_dt_b_pins[] = { 0x3e, };
2864 static int x2000_ssi0_dt_d_pins[] = { 0x69, };
2865 static int x2000_ssi0_dr_b_pins[] = { 0x3d, };
2866 static int x2000_ssi0_dr_d_pins[] = { 0x6a, };
2867 static int x2000_ssi0_clk_b_pins[] = { 0x3f, };
2868 static int x2000_ssi0_clk_d_pins[] = { 0x68, };
2869 static int x2000_ssi0_ce_b_pins[] = { 0x3c, };
2870 static int x2000_ssi0_ce_d_pins[] = { 0x6d, };
2871 static int x2000_ssi1_dt_c_pins[] = { 0x4b, };
2872 static int x2000_ssi1_dt_d_pins[] = { 0x72, };
2873 static int x2000_ssi1_dt_e_pins[] = { 0x91, };
2874 static int x2000_ssi1_dr_c_pins[] = { 0x4a, };
2875 static int x2000_ssi1_dr_d_pins[] = { 0x73, };
2876 static int x2000_ssi1_dr_e_pins[] = { 0x92, };
2877 static int x2000_ssi1_clk_c_pins[] = { 0x4c, };
2878 static int x2000_ssi1_clk_d_pins[] = { 0x71, };
2879 static int x2000_ssi1_clk_e_pins[] = { 0x90, };
2880 static int x2000_ssi1_ce_c_pins[] = { 0x49, };
2881 static int x2000_ssi1_ce_d_pins[] = { 0x76, };
2882 static int x2000_ssi1_ce_e_pins[] = { 0x95, };
2883 static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, };
2884 static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, };
2885 static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2886 static int x2000_mmc1_1bit_pins[] = { 0x68, 0x69, 0x6a, };
2887 static int x2000_mmc1_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
2888 static int x2000_mmc2_1bit_pins[] = { 0x80, 0x81, 0x82, };
2889 static int x2000_mmc2_4bit_pins[] = { 0x83, 0x84, 0x85, };
2890 static int x2000_emc_8bit_data_pins[] = {
2893 static int x2000_emc_16bit_data_pins[] = {
2896 static int x2000_emc_addr_pins[] = {
2900 static int x2000_emc_rd_we_pins[] = { 0x2d, 0x2e, };
2901 static int x2000_emc_wait_pins[] = { 0x2f, };
2902 static int x2000_emc_cs1_pins[] = { 0x57, };
2903 static int x2000_emc_cs2_pins[] = { 0x58, };
2904 static int x2000_i2c0_pins[] = { 0x4e, 0x4d, };
2905 static int x2000_i2c1_c_pins[] = { 0x58, 0x57, };
2906 static int x2000_i2c1_d_pins[] = { 0x6c, 0x6b, };
2907 static int x2000_i2c2_b_pins[] = { 0x37, 0x36, };
2908 static int x2000_i2c2_d_pins[] = { 0x75, 0x74, };
2909 static int x2000_i2c2_e_pins[] = { 0x94, 0x93, };
2910 static int x2000_i2c3_a_pins[] = { 0x11, 0x10, };
2911 static int x2000_i2c3_d_pins[] = { 0x7f, 0x7e, };
2912 static int x2000_i2c4_c_pins[] = { 0x5a, 0x59, };
2913 static int x2000_i2c4_d_pins[] = { 0x61, 0x60, };
2914 static int x2000_i2c5_c_pins[] = { 0x5c, 0x5b, };
2915 static int x2000_i2c5_d_pins[] = { 0x65, 0x64, };
2916 static int x2000_i2s1_data_tx_pins[] = { 0x47, };
2917 static int x2000_i2s1_data_rx_pins[] = { 0x44, };
2918 static int x2000_i2s1_clk_tx_pins[] = { 0x45, 0x46, };
2919 static int x2000_i2s1_clk_rx_pins[] = { 0x42, 0x43, };
2920 static int x2000_i2s1_sysclk_tx_pins[] = { 0x48, };
2921 static int x2000_i2s1_sysclk_rx_pins[] = { 0x41, };
2922 static int x2000_i2s2_data_rx0_pins[] = { 0x0a, };
2923 static int x2000_i2s2_data_rx1_pins[] = { 0x0b, };
2924 static int x2000_i2s2_data_rx2_pins[] = { 0x0c, };
2925 static int x2000_i2s2_data_rx3_pins[] = { 0x0d, };
2926 static int x2000_i2s2_clk_rx_pins[] = { 0x11, 0x09, };
2927 static int x2000_i2s2_sysclk_rx_pins[] = { 0x07, };
2928 static int x2000_i2s3_data_tx0_pins[] = { 0x03, };
2929 static int x2000_i2s3_data_tx1_pins[] = { 0x04, };
2930 static int x2000_i2s3_data_tx2_pins[] = { 0x05, };
2931 static int x2000_i2s3_data_tx3_pins[] = { 0x06, };
2932 static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, };
2933 static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, };
2934 static int x2000_dmic_if0_pins[] = { 0x54, 0x55, };
2935 static int x2000_dmic_if1_pins[] = { 0x56, };
2936 static int x2000_dmic_if2_pins[] = { 0x57, };
2937 static int x2000_dmic_if3_pins[] = { 0x58, };
2938 static int x2000_cim_8bit_pins[] = {
2942 static int x2000_cim_12bit_pins[] = { 0x08, 0x09, 0x0a, 0x0b, };
2943 static int x2000_lcd_tft_8bit_pins[] = {
2947 static int x2000_lcd_tft_16bit_pins[] = {
2950 static int x2000_lcd_tft_18bit_pins[] = {
2953 static int x2000_lcd_tft_24bit_pins[] = {
2956 static int x2000_lcd_slcd_8bit_pins[] = {
2960 static int x2000_pwm_pwm0_c_pins[] = { 0x40, };
2961 static int x2000_pwm_pwm0_d_pins[] = { 0x7e, };
2962 static int x2000_pwm_pwm1_c_pins[] = { 0x41, };
2963 static int x2000_pwm_pwm1_d_pins[] = { 0x7f, };
2964 static int x2000_pwm_pwm2_c_pins[] = { 0x42, };
2965 static int x2000_pwm_pwm2_e_pins[] = { 0x80, };
2966 static int x2000_pwm_pwm3_c_pins[] = { 0x43, };
2967 static int x2000_pwm_pwm3_e_pins[] = { 0x81, };
2968 static int x2000_pwm_pwm4_c_pins[] = { 0x44, };
2969 static int x2000_pwm_pwm4_e_pins[] = { 0x82, };
2970 static int x2000_pwm_pwm5_c_pins[] = { 0x45, };
2971 static int x2000_pwm_pwm5_e_pins[] = { 0x83, };
2972 static int x2000_pwm_pwm6_c_pins[] = { 0x46, };
2973 static int x2000_pwm_pwm6_e_pins[] = { 0x84, };
2974 static int x2000_pwm_pwm7_c_pins[] = { 0x47, };
2975 static int x2000_pwm_pwm7_e_pins[] = { 0x85, };
2976 static int x2000_pwm_pwm8_pins[] = { 0x48, };
2977 static int x2000_pwm_pwm9_pins[] = { 0x49, };
2978 static int x2000_pwm_pwm10_pins[] = { 0x4a, };
2979 static int x2000_pwm_pwm11_pins[] = { 0x4b, };
2980 static int x2000_pwm_pwm12_pins[] = { 0x4c, };
2981 static int x2000_pwm_pwm13_pins[] = { 0x4d, };
2982 static int x2000_pwm_pwm14_pins[] = { 0x4e, };
2983 static int x2000_pwm_pwm15_pins[] = { 0x4f, };
2984 static int x2000_mac0_rmii_pins[] = {
2987 static int x2000_mac0_rgmii_pins[] = {
2991 static int x2000_mac1_rmii_pins[] = {
2994 static int x2000_mac1_rgmii_pins[] = {
2998 static int x2000_otg_pins[] = { 0x96, };
3000 static u8 x2000_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, };
3002 static const struct group_desc x2000_groups[] = {
3139 static const char *x2000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
3140 static const char *x2000_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
3141 static const char *x2000_uart2_groups[] = { "uart2-data", };
3142 static const char *x2000_uart3_groups[] = {
3145 static const char *x2000_uart4_groups[] = {
3148 static const char *x2000_uart5_groups[] = { "uart5-data-a", "uart5-data-c", };
3149 static const char *x2000_uart6_groups[] = { "uart6-data-a", "uart6-data-c", };
3150 static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", };
3151 static const char *x2000_uart8_groups[] = { "uart8-data", };
3152 static const char *x2000_uart9_groups[] = { "uart9-data", };
3153 static const char *x2000_sfc_groups[] = {
3157 static const char *x2000_ssi0_groups[] = {
3163 static const char *x2000_ssi1_groups[] = {
3169 static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", };
3170 static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
3171 static const char *x2000_mmc2_groups[] = { "mmc2-1bit", "mmc2-4bit", };
3172 static const char *x2000_emc_groups[] = {
3176 static const char *x2000_cs1_groups[] = { "emc-cs1", };
3177 static const char *x2000_cs2_groups[] = { "emc-cs2", };
3178 static const char *x2000_i2c0_groups[] = { "i2c0-data", };
3179 static const char *x2000_i2c1_groups[] = { "i2c1-data-c", "i2c1-data-d", };
3180 static const char *x2000_i2c2_groups[] = { "i2c2-data-b", "i2c2-data-d", };
3181 static const char *x2000_i2c3_groups[] = { "i2c3-data-a", "i2c3-data-d", };
3182 static const char *x2000_i2c4_groups[] = { "i2c4-data-c", "i2c4-data-d", };
3183 static const char *x2000_i2c5_groups[] = { "i2c5-data-c", "i2c5-data-d", };
3184 static const char *x2000_i2s1_groups[] = {
3189 static const char *x2000_i2s2_groups[] = {
3193 static const char *x2000_i2s3_groups[] = {
3197 static const char *x2000_dmic_groups[] = {
3200 static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
3201 static const char *x2000_lcd_groups[] = {
3205 static const char *x2000_pwm0_groups[] = { "pwm0-c", "pwm0-d", };
3206 static const char *x2000_pwm1_groups[] = { "pwm1-c", "pwm1-d", };
3207 static const char *x2000_pwm2_groups[] = { "pwm2-c", "pwm2-e", };
3208 static const char *x2000_pwm3_groups[] = { "pwm3-c", "pwm3-r", };
3209 static const char *x2000_pwm4_groups[] = { "pwm4-c", "pwm4-e", };
3210 static const char *x2000_pwm5_groups[] = { "pwm5-c", "pwm5-e", };
3211 static const char *x2000_pwm6_groups[] = { "pwm6-c", "pwm6-e", };
3212 static const char *x2000_pwm7_groups[] = { "pwm7-c", "pwm7-e", };
3213 static const char *x2000_pwm8_groups[] = { "pwm8", };
3214 static const char *x2000_pwm9_groups[] = { "pwm9", };
3215 static const char *x2000_pwm10_groups[] = { "pwm10", };
3216 static const char *x2000_pwm11_groups[] = { "pwm11", };
3217 static const char *x2000_pwm12_groups[] = { "pwm12", };
3218 static const char *x2000_pwm13_groups[] = { "pwm13", };
3219 static const char *x2000_pwm14_groups[] = { "pwm14", };
3220 static const char *x2000_pwm15_groups[] = { "pwm15", };
3221 static const char *x2000_mac0_groups[] = { "mac0-rmii", "mac0-rgmii", };
3222 static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", };
3223 static const char *x2000_otg_groups[] = { "otg-vbus", };
3225 static const struct pinfunction x2000_functions[] = {
3278 static const struct regmap_range x2000_access_ranges[] = {
3284 static const struct regmap_access_table x2000_access_table = {
3289 static const struct ingenic_chip_info x2000_chip_info = {
3302 static const u32 x2100_pull_ups[5] = {
3306 static const u32 x2100_pull_downs[5] = {
3310 static int x2100_mac_pins[] = {
3314 static const struct group_desc x2100_groups[] = {
3447 static const char *x2100_mac_groups[] = { "mac", };
3449 static const struct pinfunction x2100_functions[] = {
3500 static const struct ingenic_chip_info x2100_chip_info = {
3513 static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)
3522 static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,
3539 static void ingenic_gpio_shadow_set_bit(struct ingenic_gpio_chip *jzgc,
3551 static void ingenic_gpio_shadow_set_bit_load(struct ingenic_gpio_chip *jzgc)
3558 static void jz4730_gpio_set_bits(struct ingenic_gpio_chip *jzgc,
3572 static inline bool ingenic_gpio_get_value(struct ingenic_gpio_chip *jzgc,
3580 static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,
3591 static void irq_set_type(struct ingenic_gpio_chip *jzgc,
3648 static void ingenic_gpio_irq_mask(struct irq_data *irqd)
3660 static void ingenic_gpio_irq_unmask(struct irq_data *irqd)
3672 static void ingenic_gpio_irq_enable(struct irq_data *irqd)
3690 static void ingenic_gpio_irq_disable(struct irq_data *irqd)
3708 static void ingenic_gpio_irq_ack(struct irq_data *irqd)
3736 static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
3771 static int ingenic_gpio_irq_set_wake(struct irq_data *irqd, unsigned int on)
3779 static void ingenic_gpio_irq_handler(struct irq_desc *desc)
3800 static int ingenic_gpio_set(struct gpio_chip *gc, unsigned int offset,
3810 static int ingenic_gpio_get(struct gpio_chip *gc, unsigned int offset)
3817 static int ingenic_gpio_direction_output(struct gpio_chip *gc,
3824 static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,
3847 static inline void ingenic_shadow_config_pin(struct ingenic_pinctrl *jzpc,
3856 static inline void ingenic_shadow_config_pin_load(struct ingenic_pinctrl *jzpc,
3863 static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc,
3879 static inline bool ingenic_get_pin_config(struct ingenic_pinctrl *jzpc,
3891 static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
3917 static const struct pinctrl_ops ingenic_pctlops = {
3925 static int ingenic_gpio_irq_request(struct irq_data *data)
3938 static void ingenic_gpio_irq_release(struct irq_data *data)
3946 static void ingenic_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)
3953 static const struct irq_chip ingenic_gpio_irqchip = {
3967 static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
3999 static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev,
4034 static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
4067 static const struct pinmux_ops ingenic_pmxops = {
4075 static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,
4173 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,
4223 static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc,
4232 static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,
4243 static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc,
4252 static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
4333 static int ingenic_pinconf_group_get(struct pinctrl_dev *pctldev,
4358 static int ingenic_pinconf_group_set(struct pinctrl_dev *pctldev,
4380 static const struct pinconf_ops ingenic_confops = {
4388 static const struct regmap_config ingenic_pinctrl_regmap_config = {
4394 static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
4412 static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,
4486 static int __init ingenic_pinctrl_probe(struct platform_device *pdev)
4597 static const struct of_device_id ingenic_pinctrl_of_matches[] = {
4673 static struct platform_driver ingenic_pinctrl_driver = {
4680 static int __init ingenic_pinctrl_drv_register(void)