Lines Matching defs:pctrl

326 static void eq5p_update_bits(const struct eq5p_pinctrl *pctrl,
330 	void __iomem *ptr = pctrl->base + bank->regs[reg];
335 static bool eq5p_test_bit(const struct eq5p_pinctrl *pctrl,
339 	u32 val = readl(pctrl->base + bank->regs[reg]);
347 static int eq5p_pin_to_bank_offset(const struct eq5p_pinctrl *pctrl, unsigned int pin,
350 	for (unsigned int i = 0; i < pctrl->data->nbanks; i++) {
351 		const struct eq5p_bank *_bank = &pctrl->data->banks[i];
367 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
369 	return pctrl->data->npins;
392 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
399 	ret = eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset);
403 	pd = eq5p_test_bit(pctrl, bank, EQ5P_PD, offset);
404 	pu = eq5p_test_bit(pctrl, bank, EQ5P_PU, offset);
419 			val_ds = readl(pctrl->base + bank->regs[EQ5P_DS_HIGH]);
422 			val_ds = readl(pctrl->base + bank->regs[EQ5P_DS_LOW]);
438 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
439 	const char *pin_name = pctrl->desc.pins[pin].name;
448 	if (eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset)) {
457 	if (eq5p_test_bit(pctrl, bank, EQ5P_IOCR, offset)) {
459 		for (i = 0; i < pctrl->data->nfunctions; i++) {
463 			for (j = 0; j < pctrl->data->functions[i].ngroups; j++) {
465 				const char *x = pctrl->data->functions[i].groups[j];
468 					func_name = pctrl->data->functions[i].name;
484 		func_name = pctrl->data->functions[EQ5P_GPIO_FUNC_SELECTOR].name;
488 	pd = eq5p_test_bit(pctrl, bank, EQ5P_PD, offset);
489 	pu = eq5p_test_bit(pctrl, bank, EQ5P_PU, offset);
519 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
521 	return pctrl->data->nfunctions;
527 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
529 	return pctrl->data->functions[selector].name;
537 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
539 	*groups = pctrl->data->functions[selector].groups;
540 	*num_groups = pctrl->data->functions[selector].ngroups;
547 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
548 	const char *func_name = pctrl->data->functions[func_selector].name;
556 	ret = eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset);
564 	eq5p_update_bits(pctrl, bank, EQ5P_IOCR, mask, val);
588 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
595 	ret = eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset);
615 	eq5p_update_bits(pctrl, bank, reg, mask, val);
622 	struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
631 	ret = eq5p_pin_to_bank_offset(pctrl, pin, &bank, &offset);
644 			eq5p_update_bits(pctrl, bank, EQ5P_PD, val, 0);
645 			eq5p_update_bits(pctrl, bank, EQ5P_PU, val, 0);
655 			eq5p_update_bits(pctrl, bank, EQ5P_PD, val, val);
656 			eq5p_update_bits(pctrl, bank, EQ5P_PU, val, 0);
666 			eq5p_update_bits(pctrl, bank, EQ5P_PD, val, 0);
667 			eq5p_update_bits(pctrl, bank, EQ5P_PU, val, val);
701 	struct eq5p_pinctrl *pctrl;
709 	pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);
710 	if (!pctrl)
713 	pctrl->base = (void __iomem *)dev_get_platdata(dev);
714 	pctrl->data = match->data;
715 	pctrl->desc.name = dev_name(dev);
716 	pctrl->desc.pins = pctrl->data->pins;
717 	pctrl->desc.npins = pctrl->data->npins;
718 	pctrl->desc.pctlops = &eq5p_pinctrl_ops;
719 	pctrl->desc.pmxops = &eq5p_pinmux_ops;
720 	pctrl->desc.confops = &eq5p_pinconf_ops;
721 	pctrl->desc.owner = THIS_MODULE;
723 	ret = devm_pinctrl_register_and_init(dev, &pctrl->desc, pctrl, &pctldev);