Lines Matching +full:gpio +full:- +full:trigger

1 /* SPDX-License-Identifier: GPL-2.0 */
21 /* GPIO register offset */
59  * struct gpio_irq_type: gpio irq configuration
60  * @trig_type: level trigger or edge trigger
62  * @logic_type: positive trigger or negative trigger
89  * struct eqbr_gpio_ctrl: represent a gpio controller.
90  * @chip: gpio chip.
91  * @fwnode: firmware node of gpio controller.
93  * @membase: base address of the gpio controller.
94  * @name: gpio chip name.
95  * @virq: irq number of the gpio chip to parent's irq domain.
96  * @lock: spin lock to protect gpio register write.
105 	raw_spinlock_t		lock; /* protect gpio register */
116  * @gpio_ctrls: list of gpio controllers.
117  * @nr_gpio_ctrls: number of gpio controllers.