Lines Matching +full:driving +full:- +full:level +full:- +full:compensate
1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <linux/pinctrl/pinconf-generic.h>
69 (CY8C95X0_VIRTUAL + (x) - CY8C95X0_PORTSEL + (p) * MUXED_STRIDE)
92 { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
117 * Since first controller (gpio-sch.c) and second
118 * (gpio-dwapb.c) are at the fixed bases, we may safely
130 * struct cy8c95x0_pinctrl - driver data
135 * @irq_trig_raise: I/O bits affected by raising voltage level
136 * @irq_trig_fall: I/O bits affected by falling voltage level
137 * @irq_trig_low: I/O bits affected by a low voltage level
138 * @irq_trig_high: I/O bits affected by a high voltage level
140 * @shiftmask: Mask used to compensate for Gport2 width
486 return -EINVAL; in cy8c95x0_regmap_update_bits_base()
498 guard(mutex)(&chip->i2c_lock); in cy8c95x0_regmap_update_bits_base()
500 ret = regmap_update_bits_base(chip->regmap, off, mask, val, change, async, force); in cy8c95x0_regmap_update_bits_base()
505 * Allows to mark the registers as non-volatile and reduces I/O cycles. in cy8c95x0_regmap_update_bits_base()
509 regcache_cache_only(chip->regmap, true); in cy8c95x0_regmap_update_bits_base()
515 regmap_clear_bits(chip->regmap, off, mask & val); in cy8c95x0_regmap_update_bits_base()
517 regcache_cache_only(chip->regmap, false); in cy8c95x0_regmap_update_bits_base()
524 * cy8c95x0_regmap_write_bits() - writes a register using the regmap cache
548 * cy8c95x0_regmap_update_bits() - updates a register using the regmap cache
572 * cy8c95x0_regmap_read() - reads a register using the regmap cache
602 guard(mutex)(&chip->i2c_lock); in cy8c95x0_regmap_read()
604 ret = regmap_read(chip->regmap, off, read_val); in cy8c95x0_regmap_read()
620 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
622 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
624 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
626 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
628 for (i = 0; i < chip->nport; i++) { in cy8c95x0_write_regs_mask()
643 dev_err(chip->dev, "failed writing register %d, port %d: err %d\n", reg, i, ret); in cy8c95x0_write_regs_mask()
660 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
662 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
664 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
666 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
668 for (i = 0; i < chip->nport; i++) { in cy8c95x0_read_regs_mask()
685 bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
689 dev_err(chip->dev, "failed reading register %d, port %d: err %d\n", reg, i, ret); in cy8c95x0_read_regs_mask()
707 /* Set output level */ in cy8c95x0_gpio_direction_output()
826 ret = -ENOTSUPP; in cy8c95x0_gpio_get_pincfg()
860 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
864 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
868 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
872 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
876 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
880 __set_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
893 ret = -ENOTSUPP; in cy8c95x0_gpio_set_pincfg()
924 struct device *dev = chip->dev; in cy8c95x0_add_pin_ranges()
927 ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin); in cy8c95x0_add_pin_ranges()
936 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_setup_gpiochip()
938 gc->request = gpiochip_generic_request; in cy8c95x0_setup_gpiochip()
939 gc->free = gpiochip_generic_free; in cy8c95x0_setup_gpiochip()
940 gc->direction_input = cy8c95x0_gpio_direction_input; in cy8c95x0_setup_gpiochip()
941 gc->direction_output = cy8c95x0_gpio_direction_output; in cy8c95x0_setup_gpiochip()
942 gc->get = cy8c95x0_gpio_get_value; in cy8c95x0_setup_gpiochip()
943 gc->set = cy8c95x0_gpio_set_value; in cy8c95x0_setup_gpiochip()
944 gc->get_direction = cy8c95x0_gpio_get_direction; in cy8c95x0_setup_gpiochip()
945 gc->get_multiple = cy8c95x0_gpio_get_multiple; in cy8c95x0_setup_gpiochip()
946 gc->set_multiple = cy8c95x0_gpio_set_multiple; in cy8c95x0_setup_gpiochip()
947 gc->set_config = gpiochip_generic_config; in cy8c95x0_setup_gpiochip()
948 gc->can_sleep = true; in cy8c95x0_setup_gpiochip()
949 gc->add_pin_ranges = cy8c95x0_add_pin_ranges; in cy8c95x0_setup_gpiochip()
951 gc->base = -1; in cy8c95x0_setup_gpiochip()
952 gc->ngpio = chip->tpin; in cy8c95x0_setup_gpiochip()
954 gc->parent = chip->dev; in cy8c95x0_setup_gpiochip()
955 gc->owner = THIS_MODULE; in cy8c95x0_setup_gpiochip()
956 gc->names = NULL; in cy8c95x0_setup_gpiochip()
958 gc->label = dev_name(chip->dev); in cy8c95x0_setup_gpiochip()
960 return devm_gpiochip_add_data(chip->dev, gc, chip); in cy8c95x0_setup_gpiochip()
969 set_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_mask()
980 clear_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_unmask()
988 mutex_lock(&chip->irq_lock); in cy8c95x0_irq_bus_lock()
1001 cy8c95x0_write_regs_mask(chip, CY8C95X0_INTMASK, chip->irq_mask, ones); in cy8c95x0_irq_bus_sync_unlock()
1004 cy8c95x0_read_regs_mask(chip, CY8C95X0_DIRECTION, reg_direction, chip->irq_mask); in cy8c95x0_irq_bus_sync_unlock()
1005 bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE); in cy8c95x0_irq_bus_sync_unlock()
1011 mutex_unlock(&chip->irq_lock); in cy8c95x0_irq_bus_sync_unlock()
1034 dev_err(chip->dev, "irq %d: unsupported type %d\n", d->irq, type); in cy8c95x0_irq_set_type()
1035 return -EINVAL; in cy8c95x0_irq_set_type()
1038 assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING); in cy8c95x0_irq_set_type()
1039 assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING); in cy8c95x0_irq_set_type()
1040 assign_bit(hwirq, chip->irq_trig_low, type == IRQ_TYPE_LEVEL_LOW); in cy8c95x0_irq_set_type()
1041 assign_bit(hwirq, chip->irq_trig_high, type == IRQ_TYPE_LEVEL_HIGH); in cy8c95x0_irq_set_type()
1052 clear_bit(hwirq, chip->irq_trig_raise); in cy8c95x0_irq_shutdown()
1053 clear_bit(hwirq, chip->irq_trig_fall); in cy8c95x0_irq_shutdown()
1054 clear_bit(hwirq, chip->irq_trig_low); in cy8c95x0_irq_shutdown()
1055 clear_bit(hwirq, chip->irq_trig_high); in cy8c95x0_irq_shutdown()
1059 .name = "cy8c95x0-irq",
1088 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, in cy8c95x0_irq_pending()
1099 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_irq_handler()
1101 int nested_irq, level; in cy8c95x0_irq_handler() local
1109 for_each_set_bit(level, pending, MAX_LINE) { in cy8c95x0_irq_handler()
1111 nested_irq = irq_find_mapping(gc->irq.domain, level); in cy8c95x0_irq_handler()
1114 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); in cy8c95x0_irq_handler()
1118 if (test_bit(level, chip->irq_trig_low)) in cy8c95x0_irq_handler()
1119 while (!cy8c95x0_gpio_get_value(gc, level)) in cy8c95x0_irq_handler()
1121 else if (test_bit(level, chip->irq_trig_high)) in cy8c95x0_irq_handler()
1122 while (cy8c95x0_gpio_get_value(gc, level)) in cy8c95x0_irq_handler()
1137 return chip->tpin; in cy8c95x0_pinctrl_get_groups_count()
1210 *num_groups = chip->tpin; in cy8c95x0_get_function_groups()
1273 * Disable driving the pin by forcing it to HighZ. Only setting in cy8c95x0_pinmux_direction()
1274 * the direction register isn't sufficient in Push-Pull mode. in cy8c95x0_pinmux_direction()
1276 if (input && test_bit(pin, chip->push_pull)) { in cy8c95x0_pinmux_direction()
1281 __clear_bit(pin, chip->push_pull); in cy8c95x0_pinmux_direction()
1338 struct gpio_irq_chip *girq = &chip->gpio_chip.irq; in cy8c95x0_irq_setup()
1342 mutex_init(&chip->irq_lock); in cy8c95x0_irq_setup()
1349 dev_err(chip->dev, "failed to clear irq status register\n"); in cy8c95x0_irq_setup()
1354 bitmap_fill(chip->irq_mask, MAX_LINE); in cy8c95x0_irq_setup()
1359 girq->parent_handler = NULL; in cy8c95x0_irq_setup()
1360 girq->num_parents = 0; in cy8c95x0_irq_setup()
1361 girq->parents = NULL; in cy8c95x0_irq_setup()
1362 girq->default_type = IRQ_TYPE_NONE; in cy8c95x0_irq_setup()
1363 girq->handler = handle_simple_irq; in cy8c95x0_irq_setup()
1364 girq->threaded = true; in cy8c95x0_irq_setup()
1366 ret = devm_request_threaded_irq(chip->dev, irq, in cy8c95x0_irq_setup()
1369 dev_name(chip->dev), chip); in cy8c95x0_irq_setup()
1371 dev_err(chip->dev, "failed to request irq %d\n", irq); in cy8c95x0_irq_setup()
1374 dev_info(chip->dev, "Registered threaded IRQ\n"); in cy8c95x0_irq_setup()
1381 struct pinctrl_desc *pd = &chip->pinctrl_desc; in cy8c95x0_setup_pinctrl()
1383 pd->pctlops = &cy8c95x0_pinctrl_ops; in cy8c95x0_setup_pinctrl()
1384 pd->confops = &cy8c95x0_pinconf_ops; in cy8c95x0_setup_pinctrl()
1385 pd->pmxops = &cy8c95x0_pmxops; in cy8c95x0_setup_pinctrl()
1386 pd->name = dev_name(chip->dev); in cy8c95x0_setup_pinctrl()
1387 pd->pins = cy8c9560_pins; in cy8c95x0_setup_pinctrl()
1388 pd->npins = chip->tpin; in cy8c95x0_setup_pinctrl()
1389 pd->owner = THIS_MODULE; in cy8c95x0_setup_pinctrl()
1391 chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip); in cy8c95x0_setup_pinctrl()
1392 if (IS_ERR(chip->pctldev)) in cy8c95x0_setup_pinctrl()
1393 return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev), in cy8c95x0_setup_pinctrl()
1402 struct i2c_adapter *adapter = client->adapter; in cy8c95x0_detect()
1407 return -ENODEV; in cy8c95x0_detect()
1423 return -ENODEV; in cy8c95x0_detect()
1426 dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr); in cy8c95x0_detect()
1427 strscpy(info->type, name, I2C_NAME_SIZE); in cy8c95x0_detect()
1440 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); in cy8c95x0_probe()
1442 return -ENOMEM; in cy8c95x0_probe()
1444 chip->dev = &client->dev; in cy8c95x0_probe()
1447 chip->driver_data = (uintptr_t)i2c_get_match_data(client); in cy8c95x0_probe()
1448 if (!chip->driver_data) in cy8c95x0_probe()
1449 return -ENODEV; in cy8c95x0_probe()
1453 chip->tpin = chip->driver_data & CY8C95X0_GPIO_MASK; in cy8c95x0_probe()
1454 chip->nport = DIV_ROUND_UP(CY8C95X0_PIN_TO_OFFSET(chip->tpin), BANK_SZ); in cy8c95x0_probe()
1458 switch (chip->tpin) { in cy8c95x0_probe()
1460 strscpy(chip->name, cy8c95x0_id[0].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1464 strscpy(chip->name, cy8c95x0_id[1].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1468 strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1472 return -ENODEV; in cy8c95x0_probe()
1475 reg = devm_regulator_get(&client->dev, "vdd"); in cy8c95x0_probe()
1477 if (PTR_ERR(reg) == -EPROBE_DEFER) in cy8c95x0_probe()
1478 return -EPROBE_DEFER; in cy8c95x0_probe()
1482 dev_err(&client->dev, "failed to enable regulator vdd: %d\n", ret); in cy8c95x0_probe()
1485 chip->regulator = reg; in cy8c95x0_probe()
1489 chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH); in cy8c95x0_probe()
1490 if (IS_ERR(chip->gpio_reset)) { in cy8c95x0_probe()
1491 ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset), in cy8c95x0_probe()
1494 } else if (chip->gpio_reset) { in cy8c95x0_probe()
1496 gpiod_set_value_cansleep(chip->gpio_reset, 0); in cy8c95x0_probe()
1499 gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET"); in cy8c95x0_probe()
1508 chip->regmap = devm_regmap_init_i2c(client, ®map_conf); in cy8c95x0_probe()
1509 if (IS_ERR(chip->regmap)) { in cy8c95x0_probe()
1510 ret = PTR_ERR(chip->regmap); in cy8c95x0_probe()
1514 bitmap_zero(chip->push_pull, MAX_LINE); in cy8c95x0_probe()
1515 bitmap_zero(chip->shiftmask, MAX_LINE); in cy8c95x0_probe()
1516 bitmap_set(chip->shiftmask, 0, 20); in cy8c95x0_probe()
1517 mutex_init(&chip->i2c_lock); in cy8c95x0_probe()
1520 ret = cy8c95x0_acpi_get_irq(&client->dev); in cy8c95x0_probe()
1522 client->irq = ret; in cy8c95x0_probe()
1525 if (client->irq) { in cy8c95x0_probe()
1526 ret = cy8c95x0_irq_setup(chip, client->irq); in cy8c95x0_probe()
1542 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_probe()
1543 regulator_disable(chip->regulator); in cy8c95x0_probe()
1551 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_remove()
1552 regulator_disable(chip->regulator); in cy8c95x0_remove()
1563 .name = "cy8c95x0-pinctrl",