Lines Matching +full:divider +full:- +full:offset
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Parallel I/O Controller (PIO) - System peripherals registers.
29 #define PIO_MDER 0x50 /* Multi-driver Enable Register */
30 #define PIO_MDDR 0x54 /* Multi-driver Disable Register */
31 #define PIO_MDSR 0x58 /* Multi-driver Status Register */
32 #define PIO_PUDR 0x60 /* Pull-up Disable Register */
33 #define PIO_PUER 0x64 /* Pull-up Enable Register */
34 #define PIO_PUSR 0x68 /* Pull-up Status Register */
43 #define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */
44 #define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */
45 #define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */
46 #define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */
47 #define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */
59 #define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */
62 #define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/
63 #define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/
65 #define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/
66 #define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/
69 #define SAM9X60_PIO_DRIVER1 0x118 /* PIO Driver 1 register offset */