Lines Matching +full:at91rm9200 +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <linux/gpio/driver.h>
29 #include "pinctrl-at91.h"
38 * struct at91_gpio_chip: at91 gpio chip
39 * @chip: gpio chip
40 * @range: gpio range
49 * @id: gpio chip identifier
114 * struct at91_pmx_func - describes AT91 pinmux functions
134 * struct at91_pmx_pin - describes an At91 pin mux
137 * @mux: the mux mode : gpio or periph_x of the pin i.e. alternate function.
148 * struct at91_pin_group - describes an At91 pin group
153 * from the driver-local pin enumeration space
165 * struct at91_pinctrl_mux_ops - describes an AT91 mux ops group
240 for (i = 0; i < info->ngroups; i++) { in at91_pinctrl_find_group_by_name()
241 if (strcmp(info->groups[i].name, name)) in at91_pinctrl_find_group_by_name()
244 grp = &info->groups[i]; in at91_pinctrl_find_group_by_name()
245 dev_dbg(info->dev, "%s: %d 0:%d\n", name, grp->npins, grp->pins[0]); in at91_pinctrl_find_group_by_name()
256 return info->ngroups; in at91_get_groups_count()
264 return info->groups[selector].name; in at91_get_group_name()
273 if (selector >= info->ngroups) in at91_get_group_pins()
274 return -EINVAL; in at91_get_group_pins()
276 *pins = info->groups[selector].pins; in at91_get_group_pins()
277 *npins = info->groups[selector].npins; in at91_get_group_pins()
285 seq_printf(s, "%s", dev_name(pctldev->dev)); in at91_pin_dbg_show()
303 grp = at91_pinctrl_find_group_by_name(info, np->name); in at91_dt_node_to_map()
305 dev_err(info->dev, "unable to find group for node %pOFn\n", in at91_dt_node_to_map()
307 return -EINVAL; in at91_dt_node_to_map()
310 map_num += grp->npins; in at91_dt_node_to_map()
311 new_map = devm_kcalloc(pctldev->dev, map_num, sizeof(*new_map), in at91_dt_node_to_map()
314 return -ENOMEM; in at91_dt_node_to_map()
322 devm_kfree(pctldev->dev, new_map); in at91_dt_node_to_map()
323 return -EINVAL; in at91_dt_node_to_map()
326 new_map[0].data.mux.function = parent->name; in at91_dt_node_to_map()
327 new_map[0].data.mux.group = np->name; in at91_dt_node_to_map()
332 for (i = 0; i < grp->npins; i++) { in at91_dt_node_to_map()
335 pin_get_name(pctldev, grp->pins[i]); in at91_dt_node_to_map()
336 new_map[i].data.configs.configs = &grp->pins_conf[i].conf; in at91_dt_node_to_map()
340 dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", in at91_dt_node_to_map()
341 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in at91_dt_node_to_map()
366 return gpio_chips[bank]->regbase; in pin_to_controller()
384 ? pin - MAX_NB_GPIO_PER_BANK/2 : pin); in two_bit_pin_value_shift_amount()
606 tmp = DRIVE_STRENGTH_BIT_MSK(HI) - tmp; in at91_mux_sam9x5_get_drivestrength()
663 setting = DRIVE_STRENGTH_BIT_MSK(HI) - setting; in at91_mux_sam9x5_set_drivestrength()
778 if (pin->mux) { in at91_pin_dbg()
780 pin->bank + 'A', pin->pin, pin->mux - 1 + 'A', pin->conf); in at91_pin_dbg()
782 dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lx\n", in at91_pin_dbg()
783 pin->bank + 'A', pin->pin, pin->conf); in at91_pin_dbg()
793 if (pin->bank >= gpio_banks) { in pin_check_config()
794 dev_err(info->dev, "%s: pin conf %d bank_id %d >= nbanks %d\n", in pin_check_config()
795 name, index, pin->bank, gpio_banks); in pin_check_config()
796 return -EINVAL; in pin_check_config()
799 if (!gpio_chips[pin->bank]) { in pin_check_config()
800 dev_err(info->dev, "%s: pin conf %d bank_id %d not enabled\n", in pin_check_config()
801 name, index, pin->bank); in pin_check_config()
802 return -ENXIO; in pin_check_config()
805 if (pin->pin >= MAX_NB_GPIO_PER_BANK) { in pin_check_config()
806 dev_err(info->dev, "%s: pin conf %d pin_bank_id %d >= %d\n", in pin_check_config()
807 name, index, pin->pin, MAX_NB_GPIO_PER_BANK); in pin_check_config()
808 return -EINVAL; in pin_check_config()
811 if (!pin->mux) in pin_check_config()
814 mux = pin->mux - 1; in pin_check_config()
816 if (mux >= info->nmux) { in pin_check_config()
817 dev_err(info->dev, "%s: pin conf %d mux_id %d >= nmux %d\n", in pin_check_config()
818 name, index, mux, info->nmux); in pin_check_config()
819 return -EINVAL; in pin_check_config()
822 if (!(info->mux_mask[pin->bank * info->nmux + mux] & 1 << pin->pin)) { in pin_check_config()
823 dev_err(info->dev, "%s: pin conf %d mux_id %d not supported for pio%c%d\n", in pin_check_config()
824 name, index, mux, pin->bank + 'A', pin->pin); in pin_check_config()
825 return -EINVAL; in pin_check_config()
846 const struct at91_pmx_pin *pins_conf = info->groups[group].pins_conf; in at91_pmx_set()
848 uint32_t npins = info->groups[group].npins; in at91_pmx_set()
853 dev_dbg(info->dev, "enable function %s group %s\n", in at91_pmx_set()
854 info->functions[selector].name, info->groups[group].name); in at91_pmx_set()
860 ret = pin_check_config(info, info->groups[group].name, i, pin); in at91_pmx_set()
867 at91_pin_dbg(info->dev, pin); in at91_pmx_set()
868 pio = pin_to_controller(info, pin->bank); in at91_pmx_set()
873 mask = pin_to_mask(pin->pin); in at91_pmx_set()
875 switch (pin->mux) { in at91_pmx_set()
880 info->ops->mux_A_periph(pio, mask); in at91_pmx_set()
883 info->ops->mux_B_periph(pio, mask); in at91_pmx_set()
886 if (!info->ops->mux_C_periph) in at91_pmx_set()
887 return -EINVAL; in at91_pmx_set()
888 info->ops->mux_C_periph(pio, mask); in at91_pmx_set()
891 if (!info->ops->mux_D_periph) in at91_pmx_set()
892 return -EINVAL; in at91_pmx_set()
893 info->ops->mux_D_periph(pio, mask); in at91_pmx_set()
896 if (pin->mux) in at91_pmx_set()
907 return info->nfunctions; in at91_pmx_get_funcs_count()
915 return info->functions[selector].name; in at91_pmx_get_func_name()
924 *groups = info->functions[selector].groups; in at91_pmx_get_groups()
925 *num_groups = info->functions[selector].ngroups; in at91_pmx_get_groups()
940 dev_err(npct->dev, "invalid range\n"); in at91_gpio_request_enable()
941 return -EINVAL; in at91_gpio_request_enable()
943 if (!range->gc) { in at91_gpio_request_enable()
944 dev_err(npct->dev, "missing GPIO chip in range\n"); in at91_gpio_request_enable()
945 return -EINVAL; in at91_gpio_request_enable()
947 chip = range->gc; in at91_gpio_request_enable()
950 dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); in at91_gpio_request_enable()
952 mask = 1 << (offset - chip->base); in at91_gpio_request_enable()
954 dev_dbg(npct->dev, "enable pin %u as PIO%c%d 0x%x\n", in at91_gpio_request_enable()
955 offset, 'A' + range->id, offset - chip->base, mask); in at91_gpio_request_enable()
957 writel_relaxed(mask, at91_chip->regbase + PIO_PER); in at91_gpio_request_enable()
968 dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset); in at91_gpio_disable_free()
969 /* Set the pin to some default state, GPIO is usually default */ in at91_gpio_disable_free()
991 dev_dbg(info->dev, "%s:%d, pin_id=%d", __func__, __LINE__, pin_id); in at91_pinconf_get()
995 return -EINVAL; in at91_pinconf_get()
1005 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin)) in at91_pinconf_get()
1007 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) in at91_pinconf_get()
1009 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin)) in at91_pinconf_get()
1011 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin)) in at91_pinconf_get()
1013 if (info->ops->get_drivestrength) in at91_pinconf_get()
1014 *config |= (info->ops->get_drivestrength(pio, pin) in at91_pinconf_get()
1016 if (info->ops->get_slewrate) in at91_pinconf_get()
1017 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT); in at91_pinconf_get()
1038 dev_dbg(info->dev, in at91_pinconf_set()
1044 return -EINVAL; in at91_pinconf_set()
1050 return -EINVAL; in at91_pinconf_set()
1056 if (info->ops->set_deglitch) in at91_pinconf_set()
1057 info->ops->set_deglitch(pio, mask, config & DEGLITCH); in at91_pinconf_set()
1058 if (info->ops->set_debounce) in at91_pinconf_set()
1059 info->ops->set_debounce(pio, mask, config & DEBOUNCE, in at91_pinconf_set()
1061 if (info->ops->set_pulldown) in at91_pinconf_set()
1062 info->ops->set_pulldown(pio, mask, config & PULL_DOWN); in at91_pinconf_set()
1063 if (info->ops->disable_schmitt_trig && config & DIS_SCHMIT) in at91_pinconf_set()
1064 info->ops->disable_schmitt_trig(pio, mask); in at91_pinconf_set()
1065 if (info->ops->set_drivestrength) in at91_pinconf_set()
1066 info->ops->set_drivestrength(pio, pin, in at91_pinconf_set()
1069 if (info->ops->set_slewrate) in at91_pinconf_set()
1070 info->ops->set_slewrate(pio, pin, in at91_pinconf_set()
1144 static const char *gpio_compat = "atmel,at91rm9200-gpio";
1154 info->nactive_banks++; in at91_pinctrl_child_count()
1156 info->nfunctions++; in at91_pinctrl_child_count()
1157 info->ngroups += of_get_child_count(child); in at91_pinctrl_child_count()
1169 list = of_get_property(np, "atmel,mux-mask", &size); in at91_pinctrl_mux_mask()
1171 dev_err(info->dev, "can not read the mux-mask of %d\n", size); in at91_pinctrl_mux_mask()
1172 return -EINVAL; in at91_pinctrl_mux_mask()
1177 dev_err(info->dev, "wrong mux mask array should be by %d\n", gpio_banks); in at91_pinctrl_mux_mask()
1178 return -EINVAL; in at91_pinctrl_mux_mask()
1180 info->nmux = size / gpio_banks; in at91_pinctrl_mux_mask()
1182 info->mux_mask = devm_kcalloc(info->dev, size, sizeof(u32), in at91_pinctrl_mux_mask()
1184 if (!info->mux_mask) in at91_pinctrl_mux_mask()
1185 return -ENOMEM; in at91_pinctrl_mux_mask()
1187 ret = of_property_read_u32_array(np, "atmel,mux-mask", in at91_pinctrl_mux_mask()
1188 info->mux_mask, size); in at91_pinctrl_mux_mask()
1190 dev_err(info->dev, "can not read the mux-mask of %d\n", size); in at91_pinctrl_mux_mask()
1203 dev_dbg(info->dev, "group(%d): %pOFn\n", index, np); in at91_pinctrl_parse_groups()
1206 grp->name = np->name; in at91_pinctrl_parse_groups()
1216 dev_err(info->dev, "wrong pins number or pins and configs should be by 4\n"); in at91_pinctrl_parse_groups()
1217 return -EINVAL; in at91_pinctrl_parse_groups()
1220 grp->npins = size / 4; in at91_pinctrl_parse_groups()
1221 pin = grp->pins_conf = devm_kcalloc(info->dev, in at91_pinctrl_parse_groups()
1222 grp->npins, in at91_pinctrl_parse_groups()
1225 grp->pins = devm_kcalloc(info->dev, grp->npins, sizeof(unsigned int), in at91_pinctrl_parse_groups()
1227 if (!grp->pins_conf || !grp->pins) in at91_pinctrl_parse_groups()
1228 return -ENOMEM; in at91_pinctrl_parse_groups()
1231 pin->bank = be32_to_cpu(*list++); in at91_pinctrl_parse_groups()
1232 pin->pin = be32_to_cpu(*list++); in at91_pinctrl_parse_groups()
1233 grp->pins[j] = pin->bank * MAX_NB_GPIO_PER_BANK + pin->pin; in at91_pinctrl_parse_groups()
1234 pin->mux = be32_to_cpu(*list++); in at91_pinctrl_parse_groups()
1235 pin->conf = be32_to_cpu(*list++); in at91_pinctrl_parse_groups()
1237 at91_pin_dbg(info->dev, pin); in at91_pinctrl_parse_groups()
1253 dev_dbg(info->dev, "parse function(%d): %pOFn\n", index, np); in at91_pinctrl_parse_functions()
1255 func = &info->functions[index]; in at91_pinctrl_parse_functions()
1258 func->name = np->name; in at91_pinctrl_parse_functions()
1259 func->ngroups = of_get_child_count(np); in at91_pinctrl_parse_functions()
1260 if (func->ngroups == 0) { in at91_pinctrl_parse_functions()
1261 dev_err(info->dev, "no groups defined\n"); in at91_pinctrl_parse_functions()
1262 return -EINVAL; in at91_pinctrl_parse_functions()
1264 func->groups = devm_kcalloc(info->dev, in at91_pinctrl_parse_functions()
1265 func->ngroups, sizeof(char *), GFP_KERNEL); in at91_pinctrl_parse_functions()
1266 if (!func->groups) in at91_pinctrl_parse_functions()
1267 return -ENOMEM; in at91_pinctrl_parse_functions()
1270 func->groups[i] = child->name; in at91_pinctrl_parse_functions()
1271 grp = &info->groups[grp_index++]; in at91_pinctrl_parse_functions()
1281 { .compatible = "atmel,sama5d3-pinctrl", .data = &sama5d3_ops },
1282 { .compatible = "atmel,at91sam9x5-pinctrl", .data = &at91sam9x5_ops },
1283 { .compatible = "atmel,at91rm9200-pinctrl", .data = &at91rm9200_ops },
1284 { .compatible = "microchip,sam9x60-pinctrl", .data = &sam9x60_ops },
1291 struct device *dev = &pdev->dev; in at91_pinctrl_probe_dt()
1295 struct device_node *np = dev->of_node; in at91_pinctrl_probe_dt()
1298 return -ENODEV; in at91_pinctrl_probe_dt()
1300 info->dev = &pdev->dev; in at91_pinctrl_probe_dt()
1301 info->ops = device_get_match_data(&pdev->dev); in at91_pinctrl_probe_dt()
1305 * We need all the GPIO drivers to probe FIRST, or we will not be able in at91_pinctrl_probe_dt()
1313 if (ngpio_chips_enabled < info->nactive_banks) in at91_pinctrl_probe_dt()
1314 return -EPROBE_DEFER; in at91_pinctrl_probe_dt()
1320 dev_dbg(dev, "nmux = %d\n", info->nmux); in at91_pinctrl_probe_dt()
1322 dev_dbg(dev, "mux-mask\n"); in at91_pinctrl_probe_dt()
1323 tmp = info->mux_mask; in at91_pinctrl_probe_dt()
1325 for (j = 0; j < info->nmux; j++, tmp++) { in at91_pinctrl_probe_dt()
1330 dev_dbg(dev, "nfunctions = %d\n", info->nfunctions); in at91_pinctrl_probe_dt()
1331 dev_dbg(dev, "ngroups = %d\n", info->ngroups); in at91_pinctrl_probe_dt()
1332 info->functions = devm_kcalloc(dev, info->nfunctions, sizeof(*info->functions), in at91_pinctrl_probe_dt()
1334 if (!info->functions) in at91_pinctrl_probe_dt()
1335 return -ENOMEM; in at91_pinctrl_probe_dt()
1337 info->groups = devm_kcalloc(dev, info->ngroups, sizeof(*info->groups), in at91_pinctrl_probe_dt()
1339 if (!info->groups) in at91_pinctrl_probe_dt()
1340 return -ENOMEM; in at91_pinctrl_probe_dt()
1343 dev_dbg(dev, "nfunctions = %d\n", info->nfunctions); in at91_pinctrl_probe_dt()
1344 dev_dbg(dev, "ngroups = %d\n", info->ngroups); in at91_pinctrl_probe_dt()
1361 struct device *dev = &pdev->dev; in at91_pinctrl_probe()
1368 return -ENOMEM; in at91_pinctrl_probe()
1379 return -ENOMEM; in at91_pinctrl_probe()
1391 strreplace(name, '-', i + 'A'); in at91_pinctrl_probe()
1393 pdesc->number = k; in at91_pinctrl_probe()
1394 pdesc->name = name; in at91_pinctrl_probe()
1400 info->pctl = devm_pinctrl_register(dev, &at91_pinctrl_desc, info); in at91_pinctrl_probe()
1401 if (IS_ERR(info->pctl)) in at91_pinctrl_probe()
1402 return dev_err_probe(dev, PTR_ERR(info->pctl), "could not register AT91 pinctrl driver\n"); in at91_pinctrl_probe()
1404 /* We will handle a range of GPIO pins */ in at91_pinctrl_probe()
1407 pinctrl_add_gpio_range(info->pctl, &gpio_chips[i]->range); in at91_pinctrl_probe()
1408 gpiochip_add_pin_range(&gpio_chips[i]->chip, dev_name(info->pctl->dev), 0, in at91_pinctrl_probe()
1409 gpio_chips[i]->range.pin_base, gpio_chips[i]->range.npins); in at91_pinctrl_probe()
1420 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction()
1434 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input()
1444 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get()
1456 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set()
1466 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple()
1468 #define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) in at91_gpio_set_multiple()
1469 /* Mask additionally to ngpio as not all GPIO controllers have 32 pins */ in at91_gpio_set_multiple()
1470 uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio); in at91_gpio_set_multiple()
1471 uint32_t clear_mask = (*mask & ~(*bits)) & BITS_MASK(chip->ngpio); in at91_gpio_set_multiple()
1481 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output()
1496 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show()
1502 mode = at91_gpio->ops->get_periph(pio, mask); in at91_gpio_dbg_show()
1503 seq_printf(s, "[%s] GPIO%s%d: ", in at91_gpio_dbg_show()
1504 gpio_label, chip->label, i); in at91_gpio_dbg_show()
1506 seq_printf(s, "[gpio] "); in at91_gpio_dbg_show()
1515 mode + 'A' - 1); in at91_gpio_dbg_show()
1527 return gpiochip_lock_as_irq(&at91_gpio->chip, irqd_to_hwirq(d)); in gpio_irq_request_resources()
1534 gpiochip_unlock_as_irq(&at91_gpio->chip, irqd_to_hwirq(d)); in gpio_irq_release_resources()
1537 /* Several AIC controller irqs are dispatched through this GPIO handler.
1554 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask()
1555 unsigned mask = 1 << d->hwirq; in gpio_irq_mask()
1556 unsigned gpio = irqd_to_hwirq(d); in gpio_irq_mask() local
1558 gpiochip_disable_irq(&at91_gpio->chip, gpio); in gpio_irq_mask()
1567 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask()
1568 unsigned mask = 1 << d->hwirq; in gpio_irq_unmask()
1569 unsigned gpio = irqd_to_hwirq(d); in gpio_irq_unmask() local
1571 gpiochip_enable_irq(&at91_gpio->chip, gpio); in gpio_irq_unmask()
1584 return -EINVAL; in gpio_irq_type()
1592 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type()
1593 unsigned mask = 1 << d->hwirq; in alt_gpio_irq_type()
1626 pr_warn("AT91: No type for GPIO irq offset %d\n", d->irq); in alt_gpio_irq_type()
1627 return -EINVAL; in alt_gpio_irq_type()
1644 unsigned mask = 1 << d->hwirq; in gpio_irq_set_wake()
1647 at91_gpio->wakeups |= mask; in gpio_irq_set_wake()
1649 at91_gpio->wakeups &= ~mask; in gpio_irq_set_wake()
1651 irq_set_irq_wake(at91_gpio->pioc_virq, state); in gpio_irq_set_wake()
1659 void __iomem *pio = at91_chip->regbase; in at91_gpio_suspend()
1661 at91_chip->backups = readl_relaxed(pio + PIO_IMR); in at91_gpio_suspend()
1662 writel_relaxed(at91_chip->backups, pio + PIO_IDR); in at91_gpio_suspend()
1663 writel_relaxed(at91_chip->wakeups, pio + PIO_IER); in at91_gpio_suspend()
1665 if (!at91_chip->wakeups) in at91_gpio_suspend()
1666 clk_disable_unprepare(at91_chip->clock); in at91_gpio_suspend()
1668 dev_dbg(dev, "GPIO-%c may wake for %08x\n", in at91_gpio_suspend()
1669 'A' + at91_chip->id, at91_chip->wakeups); in at91_gpio_suspend()
1677 void __iomem *pio = at91_chip->regbase; in at91_gpio_resume()
1679 if (!at91_chip->wakeups) in at91_gpio_resume()
1680 clk_prepare_enable(at91_chip->clock); in at91_gpio_resume()
1682 writel_relaxed(at91_chip->wakeups, pio + PIO_IDR); in at91_gpio_resume()
1683 writel_relaxed(at91_chip->backups, pio + PIO_IER); in at91_gpio_resume()
1693 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler()
1699 /* Reading ISR acks pending (edge triggered) GPIO interrupts. in gpio_irq_handler()
1705 if (!at91_gpio->next) in gpio_irq_handler()
1707 at91_gpio = at91_gpio->next; in gpio_irq_handler()
1708 pio = at91_gpio->regbase; in gpio_irq_handler()
1709 gpio_chip = &at91_gpio->chip; in gpio_irq_handler()
1714 generic_handle_domain_irq(gpio_chip->irq.domain, n); in gpio_irq_handler()
1717 /* now it may re-trigger */ in gpio_irq_handler()
1723 struct device *dev = &pdev->dev; in at91_gpio_of_irq_setup()
1726 struct irq_data *d = irq_get_irq_data(at91_gpio->pioc_virq); in at91_gpio_of_irq_setup()
1733 return -ENOMEM; in at91_gpio_of_irq_setup()
1735 at91_gpio->pioc_hwirq = irqd_to_hwirq(d); in at91_gpio_of_irq_setup()
1737 gpio_irqchip->name = "GPIO"; in at91_gpio_of_irq_setup()
1738 gpio_irqchip->irq_request_resources = gpio_irq_request_resources; in at91_gpio_of_irq_setup()
1739 gpio_irqchip->irq_release_resources = gpio_irq_release_resources; in at91_gpio_of_irq_setup()
1740 gpio_irqchip->irq_ack = gpio_irq_ack; in at91_gpio_of_irq_setup()
1741 gpio_irqchip->irq_disable = gpio_irq_mask; in at91_gpio_of_irq_setup()
1742 gpio_irqchip->irq_mask = gpio_irq_mask; in at91_gpio_of_irq_setup()
1743 gpio_irqchip->irq_unmask = gpio_irq_unmask; in at91_gpio_of_irq_setup()
1744 gpio_irqchip->irq_set_wake = pm_ptr(gpio_irq_set_wake); in at91_gpio_of_irq_setup()
1745 gpio_irqchip->irq_set_type = at91_gpio->ops->irq_type; in at91_gpio_of_irq_setup()
1746 gpio_irqchip->flags = IRQCHIP_IMMUTABLE; in at91_gpio_of_irq_setup()
1749 writel_relaxed(~0, at91_gpio->regbase + PIO_IDR); in at91_gpio_of_irq_setup()
1756 girq = &at91_gpio->chip.irq; in at91_gpio_of_irq_setup()
1758 girq->default_type = IRQ_TYPE_NONE; in at91_gpio_of_irq_setup()
1759 girq->handler = handle_edge_irq; in at91_gpio_of_irq_setup()
1766 gpiochip_prev = irq_get_handler_data(at91_gpio->pioc_virq); in at91_gpio_of_irq_setup()
1768 girq->parent_handler = gpio_irq_handler; in at91_gpio_of_irq_setup()
1769 girq->num_parents = 1; in at91_gpio_of_irq_setup()
1770 girq->parents = devm_kcalloc(dev, girq->num_parents, in at91_gpio_of_irq_setup()
1771 sizeof(*girq->parents), in at91_gpio_of_irq_setup()
1773 if (!girq->parents) in at91_gpio_of_irq_setup()
1774 return -ENOMEM; in at91_gpio_of_irq_setup()
1775 girq->parents[0] = at91_gpio->pioc_virq; in at91_gpio_of_irq_setup()
1782 if (prev->next) { in at91_gpio_of_irq_setup()
1783 prev = prev->next; in at91_gpio_of_irq_setup()
1785 prev->next = at91_gpio; in at91_gpio_of_irq_setup()
1790 return -EINVAL; in at91_gpio_of_irq_setup()
1793 /* This structure is replicated for each GPIO block allocated at probe time */
1809 { .compatible = "atmel,at91sam9x5-gpio", .data = &at91sam9x5_ops, },
1810 { .compatible = "atmel,at91rm9200-gpio", .data = &at91rm9200_ops },
1811 { .compatible = "microchip,sam9x60-gpio", .data = &sam9x60_ops },
1817 struct device *dev = &pdev->dev; in at91_gpio_probe()
1818 struct device_node *np = dev->of_node; in at91_gpio_probe()
1824 int alias_idx = of_alias_get_id(np, "gpio"); in at91_gpio_probe()
1830 return dev_err_probe(dev, -EBUSY, "%d slot is occupied.\n", alias_idx); in at91_gpio_probe()
1838 return -ENOMEM; in at91_gpio_probe()
1840 at91_chip->regbase = devm_platform_ioremap_resource(pdev, 0); in at91_gpio_probe()
1841 if (IS_ERR(at91_chip->regbase)) in at91_gpio_probe()
1842 return PTR_ERR(at91_chip->regbase); in at91_gpio_probe()
1844 at91_chip->ops = device_get_match_data(dev); in at91_gpio_probe()
1845 at91_chip->pioc_virq = irq; in at91_gpio_probe()
1847 at91_chip->clock = devm_clk_get_enabled(dev, NULL); in at91_gpio_probe()
1848 if (IS_ERR(at91_chip->clock)) in at91_gpio_probe()
1849 return dev_err_probe(dev, PTR_ERR(at91_chip->clock), "failed to get clock, ignoring.\n"); in at91_gpio_probe()
1851 at91_chip->chip = at91_gpio_template; in at91_gpio_probe()
1852 at91_chip->id = alias_idx; in at91_gpio_probe()
1854 chip = &at91_chip->chip; in at91_gpio_probe()
1855 chip->label = dev_name(dev); in at91_gpio_probe()
1856 chip->parent = dev; in at91_gpio_probe()
1857 chip->owner = THIS_MODULE; in at91_gpio_probe()
1858 chip->base = alias_idx * MAX_NB_GPIO_PER_BANK; in at91_gpio_probe()
1860 if (!of_property_read_u32(np, "#gpio-lines", &ngpio)) { in at91_gpio_probe()
1862 dev_err(dev, "at91_gpio.%d, gpio-nb >= %d failback to %d\n", in at91_gpio_probe()
1865 chip->ngpio = ngpio; in at91_gpio_probe()
1868 names = devm_kasprintf_strarray(dev, "pio", chip->ngpio); in at91_gpio_probe()
1872 for (i = 0; i < chip->ngpio; i++) in at91_gpio_probe()
1873 strreplace(names[i], '-', alias_idx + 'A'); in at91_gpio_probe()
1875 chip->names = (const char *const *)names; in at91_gpio_probe()
1877 range = &at91_chip->range; in at91_gpio_probe()
1878 range->name = chip->label; in at91_gpio_probe()
1879 range->id = alias_idx; in at91_gpio_probe()
1880 range->pin_base = range->base = range->id * MAX_NB_GPIO_PER_BANK; in at91_gpio_probe()
1882 range->npins = chip->ngpio; in at91_gpio_probe()
1883 range->gc = chip; in at91_gpio_probe()
1897 dev_info(dev, "at address %p\n", at91_chip->regbase); in at91_gpio_probe()
1906 .name = "gpio-at91",
1915 .name = "pinctrl-at91",