1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright 2017-2022,2024 NXP
7  * Copyright 2015-2016 Freescale Semiconductor, Inc.
22 #include <linux/regmap.h>
28 #include "../pinctrl-utils.h"
29 #include "pinctrl-s32.h"
64 	struct regmap *map;
90  * @pctl: a pointer to the pinctrl device structure
99 	struct pinctrl_dev *pctl;  member
114 	unsigned int mem_regions = ipctl->info->soc_data->mem_regions;  in s32_get_region()
118 		pin_range = ipctl->regions[i].pin_range;  in s32_get_region()
119 		if (pin >= pin_range->start && pin <= pin_range->end)  in s32_get_region()
120 			return &ipctl->regions[i];  in s32_get_region()
129 	return s32_get_region(pctldev, pin) ? 0 : -EINVAL;  in s32_check_pin()
140 		return -EINVAL;  in s32_regmap_read()
142 	offset = (pin - region->pin_range->start) *  in s32_regmap_read()
143 			regmap_get_reg_stride(region->map);  in s32_regmap_read()
145 	return regmap_read(region->map, offset, val);  in s32_regmap_read()
157 		return -EINVAL;  in s32_regmap_write()
159 	offset = (pin - region->pin_range->start) *  in s32_regmap_write()
160 			regmap_get_reg_stride(region->map);  in s32_regmap_write()
162 	return regmap_write(region->map, offset, val);  in s32_regmap_write()
174 		return -EINVAL;  in s32_regmap_update()
176 	offset = (pin - region->pin_range->start) *  in s32_regmap_update()
177 			regmap_get_reg_stride(region->map);  in s32_regmap_update()
179 	return regmap_update_bits(region->map, offset, mask, val);  in s32_regmap_update()
185 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_get_groups_count()
187 	return info->ngroups;  in s32_get_groups_count()
194 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_get_group_name()
196 	return info->groups[selector].data.name;  in s32_get_group_name()
204 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_get_group_pins()
206 	*pins = info->groups[selector].data.pins;  in s32_get_group_pins()
207 	*npins = info->groups[selector].data.npins;  in s32_get_group_pins()
215 	seq_printf(s, "%s", dev_name(pctldev->dev));  in s32_pin_dbg_show()
226 	struct device *dev = ipctl->dev;  in s32_dt_group_node_to_map()
235 		return -EINVAL;  in s32_dt_group_node_to_map()
253 					np->name, func_name);  in s32_dt_group_node_to_map()
259 						    num_maps, np->name, cfgs, n_cfgs,  in s32_dt_group_node_to_map()
285 					       np_config->name);  in s32_dt_node_to_map()
308 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pmx_set()
316 	grp = &info->groups[group];  in s32_pmx_set()
318 	dev_dbg(ipctl->dev, "set mux for function %s group %s\n",  in s32_pmx_set()
319 		info->functions[selector].name, grp->data.name);  in s32_pmx_set()
322 	for (i = 0; i < grp->data.npins; i++) {  in s32_pmx_set()
323 		if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {  in s32_pmx_set()
324 			dev_err(info->dev, "invalid pin: %u in group: %u\n",  in s32_pmx_set()
325 				grp->data.pins[i], group);  in s32_pmx_set()
326 			return -EINVAL;  in s32_pmx_set()
330 	for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {  in s32_pmx_set()
331 		ret = s32_regmap_update(pctldev, grp->data.pins[i],  in s32_pmx_set()
332 					S32_MSCR_SSS_MASK, grp->pin_sss[i]);  in s32_pmx_set()
334 			dev_err(info->dev, "Failed to set pin %u\n",  in s32_pmx_set()
335 				grp->data.pins[i]);  in s32_pmx_set()
346 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pmx_get_funcs_count()
348 	return info->nfunctions;  in s32_pmx_get_funcs_count()
355 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pmx_get_func_name()
357 	return info->functions[selector].name;  in s32_pmx_get_func_name()
366 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pmx_get_groups()
368 	*groups = info->functions[selector].groups;  in s32_pmx_get_groups()
369 	*num_groups = info->functions[selector].ngroups;  in s32_pmx_get_groups()
391 		return -ENOMEM;  in s32_pmx_gpio_request_enable()
393 	gpio_pin->pin_id = offset;  in s32_pmx_gpio_request_enable()
394 	gpio_pin->config = config;  in s32_pmx_gpio_request_enable()
396 	spin_lock_irqsave(&ipctl->gpio_configs_lock, flags);  in s32_pmx_gpio_request_enable()
397 	list_add(&gpio_pin->list, &ipctl->gpio_configs);  in s32_pmx_gpio_request_enable()
398 	spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags);  in s32_pmx_gpio_request_enable()
415 	spin_lock_irqsave(&ipctl->gpio_configs_lock, flags);  in s32_pmx_gpio_disable_free()
417 	list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) {  in s32_pmx_gpio_disable_free()
418 		if (gpio_pin->pin_id == offset) {  in s32_pmx_gpio_disable_free()
419 			ret = s32_regmap_write(pctldev, gpio_pin->pin_id,  in s32_pmx_gpio_disable_free()
420 						 gpio_pin->config);  in s32_pmx_gpio_disable_free()
424 			list_del(&gpio_pin->list);  in s32_pmx_gpio_disable_free()
431 	spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags);  in s32_pmx_gpio_disable_free()
462 /* Set the reserved elements as -1 */
463 static const int support_slew[] = {208, -1, -1, -1, 166, 150, 133, 83};
475 	return -EINVAL;  in s32_get_slew_regval()
554 		return -EOPNOTSUPP;  in s32_parse_pincfg()
574 	dev_dbg(ipctl->dev, "pinconf set pin %s with %u configs\n",  in s32_pinconf_mscr_write()
593 		dev_dbg(ipctl->dev, "set: pin %u cfg 0x%x\n", pin_id, config);  in s32_pinconf_mscr_write()
595 		dev_dbg(ipctl->dev, "update: pin %u cfg 0x%x\n", pin_id,  in s32_pinconf_mscr_write()
620 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pconf_group_set()
624 	grp = &info->groups[selector];  in s32_pconf_group_set()
625 	for (i = 0; i < grp->data.npins; i++) {  in s32_pconf_group_set()
626 		ret = s32_pinconf_mscr_write(pctldev, grp->data.pins[i],  in s32_pconf_group_set()
652 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pinconf_group_dbg_show()
659 	grp = &info->groups[selector];  in s32_pinconf_group_dbg_show()
660 	for (i = 0; i < grp->data.npins; i++) {  in s32_pinconf_group_dbg_show()
661 		name = pin_get_name(pctldev, grp->data.pins[i]);  in s32_pinconf_group_dbg_show()
662 		ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);  in s32_pinconf_group_dbg_show()
681 	const struct pin_desc *pd = pin_desc_get(ipctl->pctl, pin);  in s32_pinctrl_should_save()
690 	if (pd->mux_owner || pd->gpio_owner)  in s32_pinctrl_should_save()
701 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pinctrl_suspend()
702 	struct s32_pinctrl_context *saved_context = &ipctl->saved_context;  in s32_pinctrl_suspend()
707 	for (i = 0; i < info->soc_data->npins; i++) {  in s32_pinctrl_suspend()
708 		pin = &info->soc_data->pins[i];  in s32_pinctrl_suspend()
710 		if (!s32_pinctrl_should_save(ipctl, pin->number))  in s32_pinctrl_suspend()
713 		ret = s32_regmap_read(ipctl->pctl, pin->number, &config);  in s32_pinctrl_suspend()
715 			return -EINVAL;  in s32_pinctrl_suspend()
717 		saved_context->pads[i] = config;  in s32_pinctrl_suspend()
727 	const struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pinctrl_resume()
729 	struct s32_pinctrl_context *saved_context = &ipctl->saved_context;  in s32_pinctrl_resume()
732 	for (i = 0; i < info->soc_data->npins; i++) {  in s32_pinctrl_resume()
733 		pin = &info->soc_data->pins[i];  in s32_pinctrl_resume()
735 		if (!s32_pinctrl_should_save(ipctl, pin->number))  in s32_pinctrl_resume()
738 		ret = s32_regmap_write(ipctl->pctl, pin->number,  in s32_pinctrl_resume()
739 					 saved_context->pads[i]);  in s32_pinctrl_resume()
757 	dev = info->dev;  in s32_pinctrl_parse_groups()
762 	grp->data.name = np->name;  in s32_pinctrl_parse_groups()
767 			grp->data.name);  in s32_pinctrl_parse_groups()
768 		return -EINVAL;  in s32_pinctrl_parse_groups()
771 		dev_err(dev, "The group %s has no pins.\n", grp->data.name);  in s32_pinctrl_parse_groups()
772 		return -EINVAL;  in s32_pinctrl_parse_groups()
775 	grp->data.npins = npins;  in s32_pinctrl_parse_groups()
777 	pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);  in s32_pinctrl_parse_groups()
778 	sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);  in s32_pinctrl_parse_groups()
780 		return -ENOMEM;  in s32_pinctrl_parse_groups()
787 		dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);  in s32_pinctrl_parse_groups()
791 	grp->data.pins = pins;  in s32_pinctrl_parse_groups()
792 	grp->pin_sss = sss;  in s32_pinctrl_parse_groups()
807 	dev_dbg(info->dev, "parse function(%u): %pOFn\n", index, np);  in s32_pinctrl_parse_functions()
809 	func = &info->functions[index];  in s32_pinctrl_parse_functions()
812 	func->name = np->name;  in s32_pinctrl_parse_functions()
813 	func->ngroups = of_get_child_count(np);  in s32_pinctrl_parse_functions()
814 	if (func->ngroups == 0) {  in s32_pinctrl_parse_functions()
815 		dev_err(info->dev, "no groups defined in %pOF\n", np);  in s32_pinctrl_parse_functions()
816 		return -EINVAL;  in s32_pinctrl_parse_functions()
819 	groups = devm_kcalloc(info->dev, func->ngroups,  in s32_pinctrl_parse_functions()
820 				    sizeof(*func->groups), GFP_KERNEL);  in s32_pinctrl_parse_functions()
822 		return -ENOMEM;  in s32_pinctrl_parse_functions()
825 		groups[i] = child->name;  in s32_pinctrl_parse_functions()
826 		grp = &info->groups[info->grp_index++];  in s32_pinctrl_parse_functions()
833 	func->groups = groups;  in s32_pinctrl_parse_functions()
841 	struct s32_pinctrl_soc_info *info = ipctl->info;  in s32_pinctrl_probe_dt()
842 	struct device_node *np = pdev->dev.of_node;  in s32_pinctrl_probe_dt()
844 	struct regmap *map;  in s32_pinctrl_probe_dt()
846 	unsigned int mem_regions = info->soc_data->mem_regions;  in s32_pinctrl_probe_dt()
852 		return -ENODEV;  in s32_pinctrl_probe_dt()
855 		dev_err(&pdev->dev, "mem_regions is invalid: %u\n", mem_regions);  in s32_pinctrl_probe_dt()
856 		return -EINVAL;  in s32_pinctrl_probe_dt()
859 	ipctl->regions = devm_kcalloc(&pdev->dev, mem_regions,  in s32_pinctrl_probe_dt()
860 				      sizeof(*ipctl->regions), GFP_KERNEL);  in s32_pinctrl_probe_dt()
861 	if (!ipctl->regions)  in s32_pinctrl_probe_dt()
862 		return -ENOMEM;  in s32_pinctrl_probe_dt()
869 		snprintf(ipctl->regions[i].name,  in s32_pinctrl_probe_dt()
870 			 sizeof(ipctl->regions[i].name), "map%u", i);  in s32_pinctrl_probe_dt()
872 		s32_regmap_config.name = ipctl->regions[i].name;  in s32_pinctrl_probe_dt()
873 		s32_regmap_config.max_register = resource_size(res) -  in s32_pinctrl_probe_dt()
876 		map = devm_regmap_init_mmio(&pdev->dev, base,  in s32_pinctrl_probe_dt()
879 			dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i);  in s32_pinctrl_probe_dt()
883 		ipctl->regions[i].map = map;  in s32_pinctrl_probe_dt()
884 		ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i];  in s32_pinctrl_probe_dt()
889 		dev_err(&pdev->dev, "no functions defined\n");  in s32_pinctrl_probe_dt()
890 		return -EINVAL;  in s32_pinctrl_probe_dt()
893 	info->nfunctions = nfuncs;  in s32_pinctrl_probe_dt()
894 	info->functions = devm_kcalloc(&pdev->dev, nfuncs,  in s32_pinctrl_probe_dt()
895 				       sizeof(*info->functions), GFP_KERNEL);  in s32_pinctrl_probe_dt()
896 	if (!info->functions)  in s32_pinctrl_probe_dt()
897 		return -ENOMEM;  in s32_pinctrl_probe_dt()
899 	info->ngroups = 0;  in s32_pinctrl_probe_dt()
901 		info->ngroups += of_get_child_count(child);  in s32_pinctrl_probe_dt()
903 	info->groups = devm_kcalloc(&pdev->dev, info->ngroups,  in s32_pinctrl_probe_dt()
904 				    sizeof(*info->groups), GFP_KERNEL);  in s32_pinctrl_probe_dt()
905 	if (!info->groups)  in s32_pinctrl_probe_dt()
906 		return -ENOMEM;  in s32_pinctrl_probe_dt()
929 	if (!soc_data || !soc_data->pins || !soc_data->npins) {  in s32_pinctrl_probe()
930 		dev_err(&pdev->dev, "wrong pinctrl info\n");  in s32_pinctrl_probe()
931 		return -EINVAL;  in s32_pinctrl_probe()
934 	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);  in s32_pinctrl_probe()
936 		return -ENOMEM;  in s32_pinctrl_probe()
938 	info->soc_data = soc_data;  in s32_pinctrl_probe()
939 	info->dev = &pdev->dev;  in s32_pinctrl_probe()
942 	ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);  in s32_pinctrl_probe()
944 		return -ENOMEM;  in s32_pinctrl_probe()
946 	ipctl->info = info;  in s32_pinctrl_probe()
947 	ipctl->dev = info->dev;  in s32_pinctrl_probe()
950 	INIT_LIST_HEAD(&ipctl->gpio_configs);  in s32_pinctrl_probe()
951 	spin_lock_init(&ipctl->gpio_configs_lock);  in s32_pinctrl_probe()
954 		devm_kmalloc(&pdev->dev, sizeof(*s32_pinctrl_desc), GFP_KERNEL);  in s32_pinctrl_probe()
956 		return -ENOMEM;  in s32_pinctrl_probe()
958 	s32_pinctrl_desc->name = dev_name(&pdev->dev);  in s32_pinctrl_probe()
959 	s32_pinctrl_desc->pins = info->soc_data->pins;  in s32_pinctrl_probe()
960 	s32_pinctrl_desc->npins = info->soc_data->npins;  in s32_pinctrl_probe()
961 	s32_pinctrl_desc->pctlops = &s32_pctrl_ops;  in s32_pinctrl_probe()
962 	s32_pinctrl_desc->pmxops = &s32_pmx_ops;  in s32_pinctrl_probe()
963 	s32_pinctrl_desc->confops = &s32_pinconf_ops;  in s32_pinctrl_probe()
964 	s32_pinctrl_desc->owner = THIS_MODULE;  in s32_pinctrl_probe()
968 		dev_err(&pdev->dev, "fail to probe dt properties\n");  in s32_pinctrl_probe()
972 	ipctl->pctl = devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc,  in s32_pinctrl_probe()
974 	if (IS_ERR(ipctl->pctl))  in s32_pinctrl_probe()
975 		return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl),  in s32_pinctrl_probe()
979 	saved_context = &ipctl->saved_context;  in s32_pinctrl_probe()
980 	saved_context->pads =  in s32_pinctrl_probe()
981 		devm_kcalloc(&pdev->dev, info->soc_data->npins,  in s32_pinctrl_probe()
982 			     sizeof(*saved_context->pads),  in s32_pinctrl_probe()
984 	if (!saved_context->pads)  in s32_pinctrl_probe()
985 		return -ENOMEM;  in s32_pinctrl_probe()
988 	dev_info(&pdev->dev, "initialized s32 pinctrl driver\n");  in s32_pinctrl_probe()