Lines Matching +full:24 +full:- +full:21

1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt8365.h"
48 	MTK_PIN_DRV_GRP(20, 0x710, 24, 2),
49 	MTK_PIN_DRV_GRP(21, 0x710, 24, 2),
52 	MTK_PIN_DRV_GRP(24, 0x720, 0, 2),
77 	MTK_PIN_DRV_GRP(49, 0x720, 24, 2),
78 	MTK_PIN_DRV_GRP(50, 0x720, 24, 2),
79 	MTK_PIN_DRV_GRP(51, 0x720, 24, 2),
80 	MTK_PIN_DRV_GRP(52, 0x720, 24, 2),
81 	MTK_PIN_DRV_GRP(53, 0x720, 24, 2),
82 	MTK_PIN_DRV_GRP(54, 0x720, 24, 2),
83 	MTK_PIN_DRV_GRP(55, 0x720, 24, 2),
84 	MTK_PIN_DRV_GRP(56, 0x720, 24, 2),
109 	MTK_PIN_DRV_GRP(81, 0x730, 24, 2),
117 	MTK_PIN_DRV_GRP(89, 0x740, 24, 2),
118 	MTK_PIN_DRV_GRP(90, 0x740, 24, 2),
119 	MTK_PIN_DRV_GRP(91, 0x740, 24, 2),
120 	MTK_PIN_DRV_GRP(92, 0x740, 24, 2),
125 	MTK_PIN_DRV_GRP(97, 0x750, 24, 2),
133 	MTK_PIN_DRV_GRP(105, 0x760, 24, 2),
134 	MTK_PIN_DRV_GRP(106, 0x760, 24, 2),
135 	MTK_PIN_DRV_GRP(107, 0x760, 24, 2),
136 	MTK_PIN_DRV_GRP(108, 0x760, 24, 2),
137 	MTK_PIN_DRV_GRP(109, 0x760, 24, 2),
164 	MTK_PIN_DRV_GRP(136, 0x770, 24, 2),
165 	MTK_PIN_DRV_GRP(137, 0x770, 24, 2),
166 	MTK_PIN_DRV_GRP(138, 0x770, 24, 2),
167 	MTK_PIN_DRV_GRP(139, 0x770, 24, 2),
168 	MTK_PIN_DRV_GRP(140, 0x770, 24, 2),
169 	MTK_PIN_DRV_GRP(141, 0x770, 24, 2),
170 	MTK_PIN_DRV_GRP(142, 0x770, 24, 2),
171 	MTK_PIN_DRV_GRP(143, 0x770, 24, 2),
172 	MTK_PIN_DRV_GRP(144, 0x770, 24, 2),
178 	MTK_PIN_PUPD_SPEC_SR(24, 0x070, 6, 8, 7),
183 	MTK_PIN_PUPD_SPEC_SR(83, 0x070, 23, 22, 21),
184 	MTK_PIN_PUPD_SPEC_SR(84, 0x070, 26, 25, 24),
193 	MTK_PIN_PUPD_SPEC_SR(93, 0x080, 23, 22, 21),
194 	MTK_PIN_PUPD_SPEC_SR(94, 0x080, 26, 25, 24),
203 	MTK_PIN_PUPD_SPEC_SR(103, 0x090, 23, 22, 21),
204 	MTK_PIN_PUPD_SPEC_SR(104, 0x090, 26, 25, 24),
219 	MTK_PIN_IES_SMT_SPEC(20, 21, 0x410, 6),
234 	MTK_PIN_IES_SMT_SPEC(80, 80, 0x410, 21),
237 	MTK_PIN_IES_SMT_SPEC(83, 83, 0x410, 24),
266 	MTK_PIN_IES_SMT_SPEC(129, 135, 0x420, 21),
292 	MTK_PIN_IES_SMT_SPEC(21, 21, 0x470, 6),
295 	MTK_PIN_IES_SMT_SPEC(24, 24, 0x470, 8),
351 	MTK_PIN_IES_SMT_SPEC(80, 80, 0x470, 21),
354 	MTK_PIN_IES_SMT_SPEC(83, 83, 0x470, 24),
400 	MTK_PIN_IES_SMT_SPEC(129, 129, 0x480, 21),
401 	MTK_PIN_IES_SMT_SPEC(130, 130, 0x480, 21),
402 	MTK_PIN_IES_SMT_SPEC(131, 131, 0x480, 21),
403 	MTK_PIN_IES_SMT_SPEC(132, 132, 0x480, 21),
404 	MTK_PIN_IES_SMT_SPEC(133, 133, 0x480, 21),
405 	MTK_PIN_IES_SMT_SPEC(134, 134, 0x480, 21),
406 	MTK_PIN_IES_SMT_SPEC(135, 135, 0x480, 21),
426 		return -EINVAL;  in mt8365_set_clr_mode()
430 		return -EINVAL;  in mt8365_set_clr_mode()
478 	{ .compatible = "mediatek,mt8365-pinctrl", .data = &mt8365_pinctrl_data },
485 		.name = "mediatek-mt8365-pinctrl",