Lines Matching refs:PINCTRL_CONF_DESC
48 #define PINCTRL_CONF_DESC(p, offset, mask) \ macro
2006 PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
2007 PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
2008 PINCTRL_CONF_DESC(2, REG_I2C_SDA_PU, I2C_SDA_PU_MASK),
2009 PINCTRL_CONF_DESC(3, REG_I2C_SDA_PU, I2C_SCL_PU_MASK),
2010 PINCTRL_CONF_DESC(4, REG_I2C_SDA_PU, SPI_CS0_PU_MASK),
2011 PINCTRL_CONF_DESC(5, REG_I2C_SDA_PU, SPI_CLK_PU_MASK),
2012 PINCTRL_CONF_DESC(6, REG_I2C_SDA_PU, SPI_MOSI_PU_MASK),
2013 PINCTRL_CONF_DESC(7, REG_I2C_SDA_PU, SPI_MISO_PU_MASK),
2014 PINCTRL_CONF_DESC(13, REG_GPIO_L_PU, BIT(0)),
2015 PINCTRL_CONF_DESC(14, REG_GPIO_L_PU, BIT(1)),
2016 PINCTRL_CONF_DESC(15, REG_GPIO_L_PU, BIT(2)),
2017 PINCTRL_CONF_DESC(16, REG_GPIO_L_PU, BIT(3)),
2018 PINCTRL_CONF_DESC(17, REG_GPIO_L_PU, BIT(4)),
2019 PINCTRL_CONF_DESC(18, REG_GPIO_L_PU, BIT(5)),
2020 PINCTRL_CONF_DESC(19, REG_GPIO_L_PU, BIT(6)),
2021 PINCTRL_CONF_DESC(20, REG_GPIO_L_PU, BIT(7)),
2022 PINCTRL_CONF_DESC(21, REG_GPIO_L_PU, BIT(8)),
2023 PINCTRL_CONF_DESC(22, REG_GPIO_L_PU, BIT(9)),
2024 PINCTRL_CONF_DESC(23, REG_GPIO_L_PU, BIT(10)),
2025 PINCTRL_CONF_DESC(24, REG_GPIO_L_PU, BIT(11)),
2026 PINCTRL_CONF_DESC(25, REG_GPIO_L_PU, BIT(12)),
2027 PINCTRL_CONF_DESC(26, REG_GPIO_L_PU, BIT(13)),
2028 PINCTRL_CONF_DESC(27, REG_GPIO_L_PU, BIT(14)),
2029 PINCTRL_CONF_DESC(28, REG_GPIO_L_PU, BIT(15)),
2030 PINCTRL_CONF_DESC(29, REG_GPIO_L_PU, BIT(16)),
2031 PINCTRL_CONF_DESC(30, REG_GPIO_L_PU, BIT(17)),
2032 PINCTRL_CONF_DESC(31, REG_GPIO_L_PU, BIT(18)),
2033 PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(18)),
2034 PINCTRL_CONF_DESC(33, REG_GPIO_L_PU, BIT(20)),
2035 PINCTRL_CONF_DESC(34, REG_GPIO_L_PU, BIT(21)),
2036 PINCTRL_CONF_DESC(35, REG_GPIO_L_PU, BIT(22)),
2037 PINCTRL_CONF_DESC(36, REG_GPIO_L_PU, BIT(23)),
2038 PINCTRL_CONF_DESC(37, REG_GPIO_L_PU, BIT(24)),
2039 PINCTRL_CONF_DESC(38, REG_GPIO_L_PU, BIT(25)),
2040 PINCTRL_CONF_DESC(39, REG_GPIO_L_PU, BIT(26)),
2041 PINCTRL_CONF_DESC(40, REG_GPIO_L_PU, BIT(27)),
2042 PINCTRL_CONF_DESC(41, REG_GPIO_L_PU, BIT(28)),
2043 PINCTRL_CONF_DESC(42, REG_GPIO_L_PU, BIT(29)),
2044 PINCTRL_CONF_DESC(43, REG_GPIO_L_PU, BIT(30)),
2045 PINCTRL_CONF_DESC(44, REG_GPIO_L_PU, BIT(31)),
2046 PINCTRL_CONF_DESC(45, REG_GPIO_H_PU, BIT(0)),
2047 PINCTRL_CONF_DESC(46, REG_GPIO_H_PU, BIT(1)),
2048 PINCTRL_CONF_DESC(47, REG_GPIO_H_PU, BIT(2)),
2049 PINCTRL_CONF_DESC(48, REG_GPIO_H_PU, BIT(3)),
2050 PINCTRL_CONF_DESC(49, REG_GPIO_H_PU, BIT(4)),
2051 PINCTRL_CONF_DESC(50, REG_GPIO_H_PU, BIT(5)),
2052 PINCTRL_CONF_DESC(51, REG_GPIO_H_PU, BIT(6)),
2053 PINCTRL_CONF_DESC(52, REG_GPIO_H_PU, BIT(7)),
2054 PINCTRL_CONF_DESC(53, REG_GPIO_H_PU, BIT(8)),
2055 PINCTRL_CONF_DESC(54, REG_GPIO_H_PU, BIT(9)),
2056 PINCTRL_CONF_DESC(55, REG_GPIO_H_PU, BIT(10)),
2057 PINCTRL_CONF_DESC(56, REG_GPIO_H_PU, BIT(11)),
2058 PINCTRL_CONF_DESC(57, REG_GPIO_H_PU, BIT(12)),
2059 PINCTRL_CONF_DESC(58, REG_GPIO_H_PU, BIT(13)),
2060 PINCTRL_CONF_DESC(59, REG_GPIO_H_PU, BIT(14)),
2061 PINCTRL_CONF_DESC(61, REG_I2C_SDA_PU, PCIE0_RESET_PU_MASK),
2062 PINCTRL_CONF_DESC(62, REG_I2C_SDA_PU, PCIE1_RESET_PU_MASK),
2063 PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
2067 PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
2068 PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
2069 PINCTRL_CONF_DESC(2, REG_I2C_SDA_PD, I2C_SDA_PD_MASK),
2070 PINCTRL_CONF_DESC(3, REG_I2C_SDA_PD, I2C_SCL_PD_MASK),
2071 PINCTRL_CONF_DESC(4, REG_I2C_SDA_PD, SPI_CS0_PD_MASK),
2072 PINCTRL_CONF_DESC(5, REG_I2C_SDA_PD, SPI_CLK_PD_MASK),
2073 PINCTRL_CONF_DESC(6, REG_I2C_SDA_PD, SPI_MOSI_PD_MASK),
2074 PINCTRL_CONF_DESC(7, REG_I2C_SDA_PD, SPI_MISO_PD_MASK),
2075 PINCTRL_CONF_DESC(13, REG_GPIO_L_PD, BIT(0)),
2076 PINCTRL_CONF_DESC(14, REG_GPIO_L_PD, BIT(1)),
2077 PINCTRL_CONF_DESC(15, REG_GPIO_L_PD, BIT(2)),
2078 PINCTRL_CONF_DESC(16, REG_GPIO_L_PD, BIT(3)),
2079 PINCTRL_CONF_DESC(17, REG_GPIO_L_PD, BIT(4)),
2080 PINCTRL_CONF_DESC(18, REG_GPIO_L_PD, BIT(5)),
2081 PINCTRL_CONF_DESC(19, REG_GPIO_L_PD, BIT(6)),
2082 PINCTRL_CONF_DESC(20, REG_GPIO_L_PD, BIT(7)),
2083 PINCTRL_CONF_DESC(21, REG_GPIO_L_PD, BIT(8)),
2084 PINCTRL_CONF_DESC(22, REG_GPIO_L_PD, BIT(9)),
2085 PINCTRL_CONF_DESC(23, REG_GPIO_L_PD, BIT(10)),
2086 PINCTRL_CONF_DESC(24, REG_GPIO_L_PD, BIT(11)),
2087 PINCTRL_CONF_DESC(25, REG_GPIO_L_PD, BIT(12)),
2088 PINCTRL_CONF_DESC(26, REG_GPIO_L_PD, BIT(13)),
2089 PINCTRL_CONF_DESC(27, REG_GPIO_L_PD, BIT(14)),
2090 PINCTRL_CONF_DESC(28, REG_GPIO_L_PD, BIT(15)),
2091 PINCTRL_CONF_DESC(29, REG_GPIO_L_PD, BIT(16)),
2092 PINCTRL_CONF_DESC(30, REG_GPIO_L_PD, BIT(17)),
2093 PINCTRL_CONF_DESC(31, REG_GPIO_L_PD, BIT(18)),
2094 PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(18)),
2095 PINCTRL_CONF_DESC(33, REG_GPIO_L_PD, BIT(20)),
2096 PINCTRL_CONF_DESC(34, REG_GPIO_L_PD, BIT(21)),
2097 PINCTRL_CONF_DESC(35, REG_GPIO_L_PD, BIT(22)),
2098 PINCTRL_CONF_DESC(36, REG_GPIO_L_PD, BIT(23)),
2099 PINCTRL_CONF_DESC(37, REG_GPIO_L_PD, BIT(24)),
2100 PINCTRL_CONF_DESC(38, REG_GPIO_L_PD, BIT(25)),
2101 PINCTRL_CONF_DESC(39, REG_GPIO_L_PD, BIT(26)),
2102 PINCTRL_CONF_DESC(40, REG_GPIO_L_PD, BIT(27)),
2103 PINCTRL_CONF_DESC(41, REG_GPIO_L_PD, BIT(28)),
2104 PINCTRL_CONF_DESC(42, REG_GPIO_L_PD, BIT(29)),
2105 PINCTRL_CONF_DESC(43, REG_GPIO_L_PD, BIT(30)),
2106 PINCTRL_CONF_DESC(44, REG_GPIO_L_PD, BIT(31)),
2107 PINCTRL_CONF_DESC(45, REG_GPIO_H_PD, BIT(0)),
2108 PINCTRL_CONF_DESC(46, REG_GPIO_H_PD, BIT(1)),
2109 PINCTRL_CONF_DESC(47, REG_GPIO_H_PD, BIT(2)),
2110 PINCTRL_CONF_DESC(48, REG_GPIO_H_PD, BIT(3)),
2111 PINCTRL_CONF_DESC(49, REG_GPIO_H_PD, BIT(4)),
2112 PINCTRL_CONF_DESC(50, REG_GPIO_H_PD, BIT(5)),
2113 PINCTRL_CONF_DESC(51, REG_GPIO_H_PD, BIT(6)),
2114 PINCTRL_CONF_DESC(52, REG_GPIO_H_PD, BIT(7)),
2115 PINCTRL_CONF_DESC(53, REG_GPIO_H_PD, BIT(8)),
2116 PINCTRL_CONF_DESC(54, REG_GPIO_H_PD, BIT(9)),
2117 PINCTRL_CONF_DESC(55, REG_GPIO_H_PD, BIT(10)),
2118 PINCTRL_CONF_DESC(56, REG_GPIO_H_PD, BIT(11)),
2119 PINCTRL_CONF_DESC(57, REG_GPIO_H_PD, BIT(12)),
2120 PINCTRL_CONF_DESC(58, REG_GPIO_H_PD, BIT(13)),
2121 PINCTRL_CONF_DESC(59, REG_GPIO_H_PD, BIT(14)),
2122 PINCTRL_CONF_DESC(61, REG_I2C_SDA_PD, PCIE0_RESET_PD_MASK),
2123 PINCTRL_CONF_DESC(62, REG_I2C_SDA_PD, PCIE1_RESET_PD_MASK),
2124 PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
2128 PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
2129 PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
2130 PINCTRL_CONF_DESC(2, REG_I2C_SDA_E2, I2C_SDA_E2_MASK),
2131 PINCTRL_CONF_DESC(3, REG_I2C_SDA_E2, I2C_SCL_E2_MASK),
2132 PINCTRL_CONF_DESC(4, REG_I2C_SDA_E2, SPI_CS0_E2_MASK),
2133 PINCTRL_CONF_DESC(5, REG_I2C_SDA_E2, SPI_CLK_E2_MASK),
2134 PINCTRL_CONF_DESC(6, REG_I2C_SDA_E2, SPI_MOSI_E2_MASK),
2135 PINCTRL_CONF_DESC(7, REG_I2C_SDA_E2, SPI_MISO_E2_MASK),
2136 PINCTRL_CONF_DESC(13, REG_GPIO_L_E2, BIT(0)),
2137 PINCTRL_CONF_DESC(14, REG_GPIO_L_E2, BIT(1)),
2138 PINCTRL_CONF_DESC(15, REG_GPIO_L_E2, BIT(2)),
2139 PINCTRL_CONF_DESC(16, REG_GPIO_L_E2, BIT(3)),
2140 PINCTRL_CONF_DESC(17, REG_GPIO_L_E2, BIT(4)),
2141 PINCTRL_CONF_DESC(18, REG_GPIO_L_E2, BIT(5)),
2142 PINCTRL_CONF_DESC(19, REG_GPIO_L_E2, BIT(6)),
2143 PINCTRL_CONF_DESC(20, REG_GPIO_L_E2, BIT(7)),
2144 PINCTRL_CONF_DESC(21, REG_GPIO_L_E2, BIT(8)),
2145 PINCTRL_CONF_DESC(22, REG_GPIO_L_E2, BIT(9)),
2146 PINCTRL_CONF_DESC(23, REG_GPIO_L_E2, BIT(10)),
2147 PINCTRL_CONF_DESC(24, REG_GPIO_L_E2, BIT(11)),
2148 PINCTRL_CONF_DESC(25, REG_GPIO_L_E2, BIT(12)),
2149 PINCTRL_CONF_DESC(26, REG_GPIO_L_E2, BIT(13)),
2150 PINCTRL_CONF_DESC(27, REG_GPIO_L_E2, BIT(14)),
2151 PINCTRL_CONF_DESC(28, REG_GPIO_L_E2, BIT(15)),
2152 PINCTRL_CONF_DESC(29, REG_GPIO_L_E2, BIT(16)),
2153 PINCTRL_CONF_DESC(30, REG_GPIO_L_E2, BIT(17)),
2154 PINCTRL_CONF_DESC(31, REG_GPIO_L_E2, BIT(18)),
2155 PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(18)),
2156 PINCTRL_CONF_DESC(33, REG_GPIO_L_E2, BIT(20)),
2157 PINCTRL_CONF_DESC(34, REG_GPIO_L_E2, BIT(21)),
2158 PINCTRL_CONF_DESC(35, REG_GPIO_L_E2, BIT(22)),
2159 PINCTRL_CONF_DESC(36, REG_GPIO_L_E2, BIT(23)),
2160 PINCTRL_CONF_DESC(37, REG_GPIO_L_E2, BIT(24)),
2161 PINCTRL_CONF_DESC(38, REG_GPIO_L_E2, BIT(25)),
2162 PINCTRL_CONF_DESC(39, REG_GPIO_L_E2, BIT(26)),
2163 PINCTRL_CONF_DESC(40, REG_GPIO_L_E2, BIT(27)),
2164 PINCTRL_CONF_DESC(41, REG_GPIO_L_E2, BIT(28)),
2165 PINCTRL_CONF_DESC(42, REG_GPIO_L_E2, BIT(29)),
2166 PINCTRL_CONF_DESC(43, REG_GPIO_L_E2, BIT(30)),
2167 PINCTRL_CONF_DESC(44, REG_GPIO_L_E2, BIT(31)),
2168 PINCTRL_CONF_DESC(45, REG_GPIO_H_E2, BIT(0)),
2169 PINCTRL_CONF_DESC(46, REG_GPIO_H_E2, BIT(1)),
2170 PINCTRL_CONF_DESC(47, REG_GPIO_H_E2, BIT(2)),
2171 PINCTRL_CONF_DESC(48, REG_GPIO_H_E2, BIT(3)),
2172 PINCTRL_CONF_DESC(49, REG_GPIO_H_E2, BIT(4)),
2173 PINCTRL_CONF_DESC(50, REG_GPIO_H_E2, BIT(5)),
2174 PINCTRL_CONF_DESC(51, REG_GPIO_H_E2, BIT(6)),
2175 PINCTRL_CONF_DESC(52, REG_GPIO_H_E2, BIT(7)),
2176 PINCTRL_CONF_DESC(53, REG_GPIO_H_E2, BIT(8)),
2177 PINCTRL_CONF_DESC(54, REG_GPIO_H_E2, BIT(9)),
2178 PINCTRL_CONF_DESC(55, REG_GPIO_H_E2, BIT(10)),
2179 PINCTRL_CONF_DESC(56, REG_GPIO_H_E2, BIT(11)),
2180 PINCTRL_CONF_DESC(57, REG_GPIO_H_E2, BIT(12)),
2181 PINCTRL_CONF_DESC(58, REG_GPIO_H_E2, BIT(13)),
2182 PINCTRL_CONF_DESC(59, REG_GPIO_H_E2, BIT(14)),
2183 PINCTRL_CONF_DESC(61, REG_I2C_SDA_E2, PCIE0_RESET_E2_MASK),
2184 PINCTRL_CONF_DESC(62, REG_I2C_SDA_E2, PCIE1_RESET_E2_MASK),
2185 PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
2189 PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
2190 PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
2191 PINCTRL_CONF_DESC(2, REG_I2C_SDA_E4, I2C_SDA_E4_MASK),
2192 PINCTRL_CONF_DESC(3, REG_I2C_SDA_E4, I2C_SCL_E4_MASK),
2193 PINCTRL_CONF_DESC(4, REG_I2C_SDA_E4, SPI_CS0_E4_MASK),
2194 PINCTRL_CONF_DESC(5, REG_I2C_SDA_E4, SPI_CLK_E4_MASK),
2195 PINCTRL_CONF_DESC(6, REG_I2C_SDA_E4, SPI_MOSI_E4_MASK),
2196 PINCTRL_CONF_DESC(7, REG_I2C_SDA_E4, SPI_MISO_E4_MASK),
2197 PINCTRL_CONF_DESC(13, REG_GPIO_L_E4, BIT(0)),
2198 PINCTRL_CONF_DESC(14, REG_GPIO_L_E4, BIT(1)),
2199 PINCTRL_CONF_DESC(15, REG_GPIO_L_E4, BIT(2)),
2200 PINCTRL_CONF_DESC(16, REG_GPIO_L_E4, BIT(3)),
2201 PINCTRL_CONF_DESC(17, REG_GPIO_L_E4, BIT(4)),
2202 PINCTRL_CONF_DESC(18, REG_GPIO_L_E4, BIT(5)),
2203 PINCTRL_CONF_DESC(19, REG_GPIO_L_E4, BIT(6)),
2204 PINCTRL_CONF_DESC(20, REG_GPIO_L_E4, BIT(7)),
2205 PINCTRL_CONF_DESC(21, REG_GPIO_L_E4, BIT(8)),
2206 PINCTRL_CONF_DESC(22, REG_GPIO_L_E4, BIT(9)),
2207 PINCTRL_CONF_DESC(23, REG_GPIO_L_E4, BIT(10)),
2208 PINCTRL_CONF_DESC(24, REG_GPIO_L_E4, BIT(11)),
2209 PINCTRL_CONF_DESC(25, REG_GPIO_L_E4, BIT(12)),
2210 PINCTRL_CONF_DESC(26, REG_GPIO_L_E4, BIT(13)),
2211 PINCTRL_CONF_DESC(27, REG_GPIO_L_E4, BIT(14)),
2212 PINCTRL_CONF_DESC(28, REG_GPIO_L_E4, BIT(15)),
2213 PINCTRL_CONF_DESC(29, REG_GPIO_L_E4, BIT(16)),
2214 PINCTRL_CONF_DESC(30, REG_GPIO_L_E4, BIT(17)),
2215 PINCTRL_CONF_DESC(31, REG_GPIO_L_E4, BIT(18)),
2216 PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(18)),
2217 PINCTRL_CONF_DESC(33, REG_GPIO_L_E4, BIT(20)),
2218 PINCTRL_CONF_DESC(34, REG_GPIO_L_E4, BIT(21)),
2219 PINCTRL_CONF_DESC(35, REG_GPIO_L_E4, BIT(22)),
2220 PINCTRL_CONF_DESC(36, REG_GPIO_L_E4, BIT(23)),
2221 PINCTRL_CONF_DESC(37, REG_GPIO_L_E4, BIT(24)),
2222 PINCTRL_CONF_DESC(38, REG_GPIO_L_E4, BIT(25)),
2223 PINCTRL_CONF_DESC(39, REG_GPIO_L_E4, BIT(26)),
2224 PINCTRL_CONF_DESC(40, REG_GPIO_L_E4, BIT(27)),
2225 PINCTRL_CONF_DESC(41, REG_GPIO_L_E4, BIT(28)),
2226 PINCTRL_CONF_DESC(42, REG_GPIO_L_E4, BIT(29)),
2227 PINCTRL_CONF_DESC(43, REG_GPIO_L_E4, BIT(30)),
2228 PINCTRL_CONF_DESC(44, REG_GPIO_L_E4, BIT(31)),
2229 PINCTRL_CONF_DESC(45, REG_GPIO_H_E4, BIT(0)),
2230 PINCTRL_CONF_DESC(46, REG_GPIO_H_E4, BIT(1)),
2231 PINCTRL_CONF_DESC(47, REG_GPIO_H_E4, BIT(2)),
2232 PINCTRL_CONF_DESC(48, REG_GPIO_H_E4, BIT(3)),
2233 PINCTRL_CONF_DESC(49, REG_GPIO_H_E4, BIT(4)),
2234 PINCTRL_CONF_DESC(50, REG_GPIO_H_E4, BIT(5)),
2235 PINCTRL_CONF_DESC(51, REG_GPIO_H_E4, BIT(6)),
2236 PINCTRL_CONF_DESC(52, REG_GPIO_H_E4, BIT(7)),
2237 PINCTRL_CONF_DESC(53, REG_GPIO_H_E4, BIT(8)),
2238 PINCTRL_CONF_DESC(54, REG_GPIO_H_E4, BIT(9)),
2239 PINCTRL_CONF_DESC(55, REG_GPIO_H_E4, BIT(10)),
2240 PINCTRL_CONF_DESC(56, REG_GPIO_H_E4, BIT(11)),
2241 PINCTRL_CONF_DESC(57, REG_GPIO_H_E4, BIT(12)),
2242 PINCTRL_CONF_DESC(58, REG_GPIO_H_E4, BIT(13)),
2243 PINCTRL_CONF_DESC(59, REG_GPIO_H_E4, BIT(14)),
2244 PINCTRL_CONF_DESC(61, REG_I2C_SDA_E4, PCIE0_RESET_E4_MASK),
2245 PINCTRL_CONF_DESC(62, REG_I2C_SDA_E4, PCIE1_RESET_E4_MASK),
2246 PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
2250 PINCTRL_CONF_DESC(61, REG_PCIE_RESET_OD, PCIE0_RESET_OD_MASK),
2251 PINCTRL_CONF_DESC(62, REG_PCIE_RESET_OD, PCIE1_RESET_OD_MASK),
2252 PINCTRL_CONF_DESC(63, REG_PCIE_RESET_OD, PCIE2_RESET_OD_MASK),