Lines Matching defs:pctrl
572 static u32 chv_pctrl_readl(struct intel_pinctrl *pctrl, unsigned int offset)
574 const struct intel_community *community = &pctrl->communities[0];
579 static void chv_pctrl_writel(struct intel_pinctrl *pctrl, unsigned int offset, u32 value)
581 const struct intel_community *community = &pctrl->communities[0];
589 static void __iomem *chv_padreg(struct intel_pinctrl *pctrl, unsigned int offset,
592 const struct intel_community *community = &pctrl->communities[0];
601 static u32 chv_readl(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset)
603 return readl(chv_padreg(pctrl, pin, offset));
606 static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 value)
608 void __iomem *reg = chv_padreg(pctrl, pin, offset);
621 static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset)
623 return chv_pad_is_locked(chv_readl(pctrl, offset, CHV_PADCTRL1));
629 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
633 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
634 ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1);
664 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
665 struct device *dev = pctrl->dev;
669 grp = &pctrl->soc->groups[group];
675 if (chv_pad_locked(pctrl, grp->grp.pins[i])) {
697 value = chv_readl(pctrl, pin, CHV_PADCTRL0);
703 chv_writel(pctrl, pin, CHV_PADCTRL0, value);
706 value = chv_readl(pctrl, pin, CHV_PADCTRL1) & ~CHV_PADCTRL1_INVRXTX_MASK;
709 chv_writel(pctrl, pin, CHV_PADCTRL1, value);
718 static void chv_gpio_clear_triggering(struct intel_pinctrl *pctrl,
730 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
734 value = chv_readl(pctrl, offset, CHV_PADCTRL1);
737 chv_writel(pctrl, offset, CHV_PADCTRL1, value);
744 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
749 if (chv_pad_locked(pctrl, offset)) {
750 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
756 struct intel_community_context *cctx = &pctrl->context.communities[0];
768 chv_gpio_clear_triggering(pctrl, offset);
770 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
784 chv_writel(pctrl, offset, CHV_PADCTRL0, value);
794 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
798 if (chv_pad_locked(pctrl, offset))
801 chv_gpio_clear_triggering(pctrl, offset);
808 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
813 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK;
818 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
836 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
843 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
844 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1);
917 static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
924 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
973 chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0);
978 static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin,
985 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1);
992 chv_writel(pctrl, pin, CHV_PADCTRL1, ctrl1);
1000 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
1001 struct device *dev = pctrl->dev;
1006 if (chv_pad_locked(pctrl, pin))
1017 ret = chv_config_set_pull(pctrl, pin, param, arg);
1023 ret = chv_config_set_oden(pctrl, pin, false);
1029 ret = chv_config_set_oden(pctrl, pin, true);
1101 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1105 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1117 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1122 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1129 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
1134 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1138 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1175 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1181 intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
1184 chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line));
1189 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1194 intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
1198 value = chv_pctrl_readl(pctrl, CHV_INTMASK);
1203 chv_pctrl_writel(pctrl, CHV_INTMASK, value);
1246 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1247 struct device *dev = pctrl->dev;
1248 struct intel_community_context *cctx = &pctrl->context.communities[0];
1253 intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
1257 value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
1275 static int chv_gpio_set_intr_line(struct intel_pinctrl *pctrl, unsigned int pin)
1277 struct device *dev = pctrl->dev;
1278 struct intel_community_context *cctx = &pctrl->context.communities[0];
1279 const struct intel_community *community = &pctrl->communities[0];
1283 value = chv_readl(pctrl, pin, CHV_PADCTRL0);
1305 if (chv_pad_locked(pctrl, pin))
1322 chv_writel(pctrl, pin, CHV_PADCTRL0, value);
1331 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1338 ret = chv_gpio_set_intr_line(pctrl, hwirq);
1355 if (!chv_pad_locked(pctrl, hwirq)) {
1356 value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
1373 chv_writel(pctrl, hwirq, CHV_PADCTRL1, value);
1398 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1399 struct device *dev = pctrl->dev;
1400 const struct intel_community *community = &pctrl->communities[0];
1401 struct intel_community_context *cctx = &pctrl->context.communities[0];
1409 pending = chv_pctrl_readl(pctrl, CHV_INTSTAT);
1472 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1473 const struct intel_community *community = &pctrl->communities[0];
1477 for (i = 0; i < pctrl->soc->npins; i++) {
1481 desc = &pctrl->soc->pins[i];
1483 intsel = chv_readl(pctrl, desc->number, CHV_PADCTRL0);
1494 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1495 const struct intel_community *community = &pctrl->communities[0];
1504 if (!pctrl->chip.irq.init_valid_mask) {
1509 chv_pctrl_writel(pctrl, CHV_INTMASK, GENMASK(31, community->nirqs));
1513 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff);
1520 struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
1521 struct device *dev = pctrl->dev;
1522 const struct intel_community *community = &pctrl->communities[0];
1538 static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq)
1540 const struct intel_community *community = &pctrl->communities[0];
1542 struct gpio_chip *chip = &pctrl->chip;
1543 struct device *dev = pctrl->dev;
1549 chip->ngpio = pctrl->soc->pins[pctrl->soc->npins - 1].number + 1;
1555 pctrl->irq = irq;
1561 chip->irq.parents = &pctrl->irq;
1567 irq_base = devm_irq_alloc_descs(dev, -1, 0, pctrl->soc->npins, NUMA_NO_NODE);
1574 ret = devm_gpiochip_add_data(dev, chip, pctrl);
1597 struct intel_pinctrl *pctrl = region_context;
1602 chv_pctrl_writel(pctrl, address, *value);
1604 *value = chv_pctrl_readl(pctrl, address);
1617 struct intel_pinctrl *pctrl;
1626 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);
1627 if (!pctrl)
1630 pctrl->dev = dev;
1631 pctrl->soc = soc_data;
1633 pctrl->ncommunities = pctrl->soc->ncommunities;
1634 pctrl->communities = devm_kmemdup_array(dev, pctrl->soc->communities, pctrl->ncommunities,
1635 sizeof(*pctrl->soc->communities), GFP_KERNEL);
1636 if (!pctrl->communities)
1639 community = &pctrl->communities[0];
1647 pctrl->context.pads = devm_kcalloc(dev, pctrl->soc->npins,
1648 sizeof(*pctrl->context.pads),
1650 if (!pctrl->context.pads)
1654 pctrl->context.communities = devm_kcalloc(dev, pctrl->soc->ncommunities,
1655 sizeof(*pctrl->context.communities),
1657 if (!pctrl->context.communities)
1660 cctx = &pctrl->context.communities[0];
1668 pctrl->pctldesc = chv_pinctrl_desc;
1669 pctrl->pctldesc.name = dev_name(dev);
1670 pctrl->pctldesc.pins = pctrl->soc->pins;
1671 pctrl->pctldesc.npins = pctrl->soc->npins;
1673 pctrl->pctldev = devm_pinctrl_register(dev, &pctrl->pctldesc, pctrl);
1674 if (IS_ERR(pctrl->pctldev)) {
1676 return PTR_ERR(pctrl->pctldev);
1679 ret = chv_gpio_probe(pctrl, irq);
1686 NULL, pctrl);
1690 platform_set_drvdata(pdev, pctrl);
1697 struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
1698 const struct intel_community *community = &pctrl->communities[0];
1707 struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
1708 struct intel_community_context *cctx = &pctrl->context.communities[0];
1713 cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK);
1715 for (i = 0; i < pctrl->soc->npins; i++) {
1717 struct intel_pad_context *ctx = &pctrl->context.pads[i];
1719 desc = &pctrl->soc->pins[i];
1720 if (chv_pad_locked(pctrl, desc->number))
1723 ctx->padctrl0 = chv_readl(pctrl, desc->number, CHV_PADCTRL0);
1726 ctx->padctrl1 = chv_readl(pctrl, desc->number, CHV_PADCTRL1);
1734 struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
1735 struct intel_community_context *cctx = &pctrl->context.communities[0];
1745 chv_pctrl_writel(pctrl, CHV_INTMASK, 0x0000);
1747 for (i = 0; i < pctrl->soc->npins; i++) {
1749 struct intel_pad_context *ctx = &pctrl->context.pads[i];
1752 desc = &pctrl->soc->pins[i];
1753 if (chv_pad_locked(pctrl, desc->number))
1757 val = chv_readl(pctrl, desc->number, CHV_PADCTRL0);
1760 chv_writel(pctrl, desc->number, CHV_PADCTRL0, ctx->padctrl0);
1762 chv_readl(pctrl, desc->number, CHV_PADCTRL0));
1765 val = chv_readl(pctrl, desc->number, CHV_PADCTRL1);
1767 chv_writel(pctrl, desc->number, CHV_PADCTRL1, ctx->padctrl1);
1769 chv_readl(pctrl, desc->number, CHV_PADCTRL1));
1777 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff);
1778 chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask);