Lines Matching +full:pinctrl +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-only
7 * a group based selection. The gpio_a 8 - 11 are muxed with gpio_b and pwm.
10 * gpio_a (8 - 11)
11 * +----------
13 * gpio_a (8-11) | gpio_b (0 - 3)
14 * ------------------------+-------+----------
16 * | pwm (0 - 3)
17 * +----------
27 #include <linux/pinctrl/pinconf-generic.h>
28 #include <linux/pinctrl/pinconf.h>
29 #include <linux/pinctrl/pinctrl.h>
30 #include <linux/pinctrl/pinmux.h>
33 #include "../pinctrl-utils.h"
68 * @name: name of the group
74 const char *name; member
83 * @name: name of the function
88 const char *name; member
94 * nsp IOMUX pinctrl core
126 * @name: pin name
131 char *name; member
138 .name = n, \
223 .name = __stringify(group_name) "_grp", \
287 .name = #func, \
314 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_groups_count() local
316 return pinctrl->num_groups; in nsp_get_groups_count()
322 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_group_name() local
324 return pinctrl->groups[selector].name; in nsp_get_group_name()
331 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_group_pins() local
333 *pins = pinctrl->groups[selector].pins; in nsp_get_group_pins()
334 *num_pins = pinctrl->groups[selector].num_pins; in nsp_get_group_pins()
342 seq_printf(s, " %s", dev_name(pctrl_dev->dev)); in nsp_pin_dbg_show()
356 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_functions_count() local
358 return pinctrl->num_functions; in nsp_get_functions_count()
364 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_function_name() local
366 return pinctrl->functions[selector].name; in nsp_get_function_name()
374 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_get_function_groups() local
376 *groups = pinctrl->functions[selector].groups; in nsp_get_function_groups()
377 *num_groups = pinctrl->functions[selector].num_groups; in nsp_get_function_groups()
382 static int nsp_pinmux_set(struct nsp_pinctrl *pinctrl, in nsp_pinmux_set() argument
387 const struct nsp_mux *mux = &grp->mux; in nsp_pinmux_set()
393 for (i = 0; i < pinctrl->num_groups; i++) { in nsp_pinmux_set()
394 if ((mux->shift != mux_log[i].mux.shift) || in nsp_pinmux_set()
395 (mux->base != mux_log[i].mux.base)) in nsp_pinmux_set()
406 if (mux_log[i].mux.alt != mux->alt) { in nsp_pinmux_set()
407 dev_err(pinctrl->dev, in nsp_pinmux_set()
409 dev_err(pinctrl->dev, "func:%s grp:%s\n", in nsp_pinmux_set()
410 func->name, grp->name); in nsp_pinmux_set()
411 return -EINVAL; in nsp_pinmux_set()
416 if (i == pinctrl->num_groups) in nsp_pinmux_set()
417 return -EINVAL; in nsp_pinmux_set()
419 mask = mux->mask; in nsp_pinmux_set()
420 mux_log[i].mux.alt = mux->alt; in nsp_pinmux_set()
423 switch (mux->base) { in nsp_pinmux_set()
425 base_address = pinctrl->base0; in nsp_pinmux_set()
429 base_address = pinctrl->base1; in nsp_pinmux_set()
433 base_address = pinctrl->base2; in nsp_pinmux_set()
437 return -EINVAL; in nsp_pinmux_set()
440 spin_lock_irqsave(&pinctrl->lock, flags); in nsp_pinmux_set()
442 val &= ~(mask << grp->mux.shift); in nsp_pinmux_set()
443 val |= grp->mux.alt << grp->mux.shift; in nsp_pinmux_set()
445 spin_unlock_irqrestore(&pinctrl->lock, flags); in nsp_pinmux_set()
453 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_pinmux_enable() local
457 if (grp_select >= pinctrl->num_groups || in nsp_pinmux_enable()
458 func_select >= pinctrl->num_functions) in nsp_pinmux_enable()
459 return -EINVAL; in nsp_pinmux_enable()
461 func = &pinctrl->functions[func_select]; in nsp_pinmux_enable()
462 grp = &pinctrl->groups[grp_select]; in nsp_pinmux_enable()
464 dev_dbg(pctrl_dev->dev, "func:%u name:%s grp:%u name:%s\n", in nsp_pinmux_enable()
465 func_select, func->name, grp_select, grp->name); in nsp_pinmux_enable()
467 dev_dbg(pctrl_dev->dev, "shift:%u alt:%u\n", grp->mux.shift, in nsp_pinmux_enable()
468 grp->mux.alt); in nsp_pinmux_enable()
470 return nsp_pinmux_set(pinctrl, func, grp, pinctrl->mux_log); in nsp_pinmux_enable()
478 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_gpio_request_enable() local
479 u32 *gpio_select = pctrl_dev->desc->pins[pin].drv_data; in nsp_gpio_request_enable()
483 spin_lock_irqsave(&pinctrl->lock, flags); in nsp_gpio_request_enable()
484 val = readl(pinctrl->base0); in nsp_gpio_request_enable()
488 writel(val, pinctrl->base0); in nsp_gpio_request_enable()
490 spin_unlock_irqrestore(&pinctrl->lock, flags); in nsp_gpio_request_enable()
499 struct nsp_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); in nsp_gpio_disable_free() local
500 u32 *gpio_select = pctrl_dev->desc->pins[pin].drv_data; in nsp_gpio_disable_free()
504 spin_lock_irqsave(&pinctrl->lock, flags); in nsp_gpio_disable_free()
505 val = readl(pinctrl->base0); in nsp_gpio_disable_free()
510 writel(val, pinctrl->base0); in nsp_gpio_disable_free()
512 spin_unlock_irqrestore(&pinctrl->lock, flags); in nsp_gpio_disable_free()
525 .name = "nsp-pinmux",
530 static int nsp_mux_log_init(struct nsp_pinctrl *pinctrl) in nsp_mux_log_init() argument
536 pinctrl->mux_log = devm_kcalloc(pinctrl->dev, no_of_groups, in nsp_mux_log_init()
539 if (!pinctrl->mux_log) in nsp_mux_log_init()
540 return -ENOMEM; in nsp_mux_log_init()
543 log = &pinctrl->mux_log[i]; in nsp_mux_log_init()
544 log->mux.base = nsp_pin_groups[i].mux.base; in nsp_mux_log_init()
545 log->mux.shift = nsp_pin_groups[i].mux.shift; in nsp_mux_log_init()
546 log->mux.alt = 0; in nsp_mux_log_init()
547 log->is_configured = false; in nsp_mux_log_init()
555 struct nsp_pinctrl *pinctrl; in nsp_pinmux_probe() local
561 pinctrl = devm_kzalloc(&pdev->dev, sizeof(*pinctrl), GFP_KERNEL); in nsp_pinmux_probe()
562 if (!pinctrl) in nsp_pinmux_probe()
563 return -ENOMEM; in nsp_pinmux_probe()
564 pinctrl->dev = &pdev->dev; in nsp_pinmux_probe()
565 platform_set_drvdata(pdev, pinctrl); in nsp_pinmux_probe()
566 spin_lock_init(&pinctrl->lock); in nsp_pinmux_probe()
568 pinctrl->base0 = devm_platform_ioremap_resource(pdev, 0); in nsp_pinmux_probe()
569 if (IS_ERR(pinctrl->base0)) in nsp_pinmux_probe()
570 return PTR_ERR(pinctrl->base0); in nsp_pinmux_probe()
574 return -EINVAL; in nsp_pinmux_probe()
575 pinctrl->base1 = devm_ioremap(&pdev->dev, res->start, in nsp_pinmux_probe()
577 if (!pinctrl->base1) { in nsp_pinmux_probe()
578 dev_err(&pdev->dev, "unable to map I/O space\n"); in nsp_pinmux_probe()
579 return -ENOMEM; in nsp_pinmux_probe()
582 pinctrl->base2 = devm_platform_ioremap_resource(pdev, 2); in nsp_pinmux_probe()
583 if (IS_ERR(pinctrl->base2)) in nsp_pinmux_probe()
584 return PTR_ERR(pinctrl->base2); in nsp_pinmux_probe()
586 ret = nsp_mux_log_init(pinctrl); in nsp_pinmux_probe()
588 dev_err(&pdev->dev, "unable to initialize IOMUX log\n"); in nsp_pinmux_probe()
592 pins = devm_kcalloc(&pdev->dev, num_pins, sizeof(*pins), GFP_KERNEL); in nsp_pinmux_probe()
594 return -ENOMEM; in nsp_pinmux_probe()
598 pins[i].name = nsp_pins[i].name; in nsp_pinmux_probe()
602 pinctrl->groups = nsp_pin_groups; in nsp_pinmux_probe()
603 pinctrl->num_groups = ARRAY_SIZE(nsp_pin_groups); in nsp_pinmux_probe()
604 pinctrl->functions = nsp_pin_functions; in nsp_pinmux_probe()
605 pinctrl->num_functions = ARRAY_SIZE(nsp_pin_functions); in nsp_pinmux_probe()
609 pinctrl->pctl = devm_pinctrl_register(&pdev->dev, &nsp_pinctrl_desc, in nsp_pinmux_probe()
610 pinctrl); in nsp_pinmux_probe()
611 if (IS_ERR(pinctrl->pctl)) { in nsp_pinmux_probe()
612 dev_err(&pdev->dev, "unable to register nsp IOMUX pinctrl\n"); in nsp_pinmux_probe()
613 return PTR_ERR(pinctrl->pctl); in nsp_pinmux_probe()
620 { .compatible = "brcm,nsp-pinmux" },
626 .name = "nsp-pinmux",