Lines Matching +full:8 +full:x8

28 #define CYGNUS_NUM_IOMUX_REGS     8
29 #define CYGNUS_NUM_MUX_PER_REG    8
166 	CYGNUS_PIN_DESC(8, "bsc1_scl", 0, 0, 0),
207 	CYGNUS_PIN_DESC(49, "sc1_cmdvcc_l", 1, 0x10, 8),
214 	CYGNUS_PIN_DESC(56, "spi0_miso", 1, 0x18, 8),
229 	CYGNUS_PIN_DESC(71, "uart0_rts", 1, 0x1c, 8),
237 	CYGNUS_PIN_DESC(79, "uart1_rts", 1, 0x20, 8),
251 	CYGNUS_PIN_DESC(93, "sdio1_cd", 1, 0x14, 8),
279 	CYGNUS_PIN_DESC(121, "nand_dq7", 1, 0xc, 8),
294 	CYGNUS_PIN_DESC(136, "lcd_cld16", 1, 0x4, 8),
298 	CYGNUS_PIN_DESC(140, "lcd_cld2", 1, 0x8, 22),
299 	CYGNUS_PIN_DESC(141, "lcd_cld20", 1, 0x8, 30),
300 	CYGNUS_PIN_DESC(142, "lcd_cld21", 1, 0x8, 28),
301 	CYGNUS_PIN_DESC(143, "lcd_cld22", 1, 0x8, 26),
302 	CYGNUS_PIN_DESC(144, "lcd_cld23", 1, 0x8, 24),
303 	CYGNUS_PIN_DESC(145, "lcd_cld3", 1, 0x8, 20),
304 	CYGNUS_PIN_DESC(146, "lcd_cld4", 1, 0x8, 18),
305 	CYGNUS_PIN_DESC(147, "lcd_cld5", 1, 0x8, 16),
306 	CYGNUS_PIN_DESC(148, "lcd_cld6", 1, 0x8, 14),
307 	CYGNUS_PIN_DESC(149, "lcd_cld7", 1, 0x8, 12),
308 	CYGNUS_PIN_DESC(150, "lcd_cld8", 1, 0x8, 10),
309 	CYGNUS_PIN_DESC(151, "lcd_cld9", 1, 0x8, 8),
310 	CYGNUS_PIN_DESC(152, "lcd_clfp", 1, 0x8, 6),
311 	CYGNUS_PIN_DESC(153, "lcd_clle", 1, 0x8, 4),
312 	CYGNUS_PIN_DESC(154, "lcd_cllp", 1, 0x8, 2),
313 	CYGNUS_PIN_DESC(155, "lcd_clpower", 1, 0x8, 0),
319 	CYGNUS_PIN_DESC(161, "camera_pixdata9", 1, 0x0, 8),
343 static const unsigned bsc1_pins[] = { 8, 9 };
344 static const unsigned pcie_clkreq_pins[] = { 8, 9 };
495 	CYGNUS_PIN_GROUP(i2s2_2, 0x0, 8, 2),
502 	CYGNUS_PIN_GROUP(key2, 0x4, 8, 1),
510 	CYGNUS_PIN_GROUP(key8, 0x8, 0, 1),
511 	CYGNUS_PIN_GROUP(key9, 0x8, 4, 1),
512 	CYGNUS_PIN_GROUP(key10, 0x8, 8, 1),
513 	CYGNUS_PIN_GROUP(key11, 0x8, 12, 1),
514 	CYGNUS_PIN_GROUP(key12, 0x8, 16, 1),
515 	CYGNUS_PIN_GROUP(key13, 0x8, 20, 1),
516 	CYGNUS_PIN_GROUP(key14, 0x8, 24, 1),
517 	CYGNUS_PIN_GROUP(audio_dte2, 0x8, 24, 2),
518 	CYGNUS_PIN_GROUP(key15, 0x8, 28, 1),
519 	CYGNUS_PIN_GROUP(audio_dte3, 0x8, 28, 2),
522 	CYGNUS_PIN_GROUP(pwm2, 0xc, 8, 0),
532 	CYGNUS_PIN_GROUP(spi2, 0x10, 8, 0),
545 	CYGNUS_PIN_GROUP(uart1, 0x14, 8, 0),
551 	CYGNUS_PIN_GROUP(sdio1_data_0, 0x18, 8, 0),
552 	CYGNUS_PIN_GROUP(can0, 0x18, 8, 1),
553 	CYGNUS_PIN_GROUP(spi4_0, 0x18, 8, 2),
564 	CYGNUS_PIN_GROUP(cam_1, 0x1c, 8, 0),
565 	CYGNUS_PIN_GROUP(sram_1, 0x1c, 8, 1),
577 	CYGNUS_PIN_GROUP(gpio2_3p3, 0x28, 8, 0),
578 	CYGNUS_PIN_GROUP(usb2_oc, 0x28, 8, 1),