Lines Matching +full:1 +full:c12
44 #define SCU80 0x80 /* Multi-function Pin Control #1 */
78 #define B5 1
79 SSSF_PIN_DECL(B5, GPIOA1, MAC2LINK, SIG_DESC_SET(SCU80, 1));
224 #define SD2_DESC SIG_DESC_SET(SCU90, 1)
436 SSSF_PIN_DECL(E13, GPIOG1, SGPSLD, SIG_DESC_SET(SCU84, 1));
445 SIG_EXPR_LIST_DECL_SINGLE(B13, OSCCLK, OSCCLK, SIG_DESC_SET(SCU2C, 1));
469 #define BOOT_SRC_NOR { ASPEED_IP_SCU, HW_STRAP1, GENMASK(1, 0), 0, 0 }
530 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 1, 0 }
690 #define VPI18_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 }
898 #define Y3_DESC SIG_DESC_SET(SCU88, 1)
1120 #define VPOOFF0_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
1121 #define VPO12_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 }
1122 #define VPO24_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 2, 0 }
1123 #define VPOOFF1_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 3, 0 }
1125 #define VPO_24_OFF SIG_DESC_SET(SCU94, 1)
1179 #define T19_DESC SIG_DESC_SET(SCU8C, 1)
1286 SIG_EXPR_LIST_DECL_SINGLE(B12, GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1));
1292 #define C12 154 macro
1293 SIG_EXPR_LIST_DECL_SINGLE(C12, GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2));
1294 SIG_EXPR_LIST_DECL_SINGLE(C12, RMII1TXD0, RMII1, RMII1_DESC);
1295 SIG_EXPR_LIST_DECL_SINGLE(C12, RGMII1TXD0, RGMII1);
1296 PIN_DECL_(C12, SIG_EXPR_LIST_PTR(C12, GPIOT2),
1297 SIG_EXPR_LIST_PTR(C12, RMII1TXD0),
1298 SIG_EXPR_LIST_PTR(C12, RGMII1TXD0));
1457 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1459 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1520 SIG_EXPR_LIST_DECL_SINGLE(M1, GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1));
1822 #define M18_DESC SIG_DESC_SET(SCUA8, 1)
1905 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1967 ASPEED_PINCTRL_PIN(C12),
2483 /* GPIOs U[4-7], V[0-1] (RGMII1 Rx pins) */
2603 { PIN_CONFIG_BIAS_PULL_DOWN, 0, 1, BIT_MASK(0)},
2604 { PIN_CONFIG_BIAS_PULL_DOWN, -1, 0, BIT_MASK(0)},
2605 { PIN_CONFIG_BIAS_DISABLE, -1, 1, BIT_MASK(0)},
2607 { PIN_CONFIG_DRIVE_STRENGTH, 16, 1, BIT_MASK(0)},