Lines Matching refs:padctl_writel
538 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
545 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
563 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
570 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
620 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
626 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
632 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
646 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
656 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
672 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
677 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
717 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
721 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
748 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
752 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
780 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
799 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
808 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
830 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
889 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
903 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
926 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
933 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
970 padctl_writel(padctl, reg, USB2_VBUS_ID); in tegra186_utmi_phy_init()
1150 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1156 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1175 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1181 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1199 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1206 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1224 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1231 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1320 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1328 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1333 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1339 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1345 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1371 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1377 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1383 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1548 padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_restore()
1549 padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_restore()
1550 padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_restore()
1551 padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID); in tegra186_xusb_padctl_restore()