Lines Matching +full:vclamp +full:- +full:usb +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
282 writel(value, priv->ao_regs + offset); in ao_writel()
287 return readl(priv->ao_regs + offset); in ao_readl()
296 /* USB 2.0 UTMI PHY support */
306 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
308 INIT_LIST_HEAD(&usb2->base.list); in tegra186_usb2_lane_probe()
309 usb2->base.soc = &pad->soc->lanes[index]; in tegra186_usb2_lane_probe()
310 usb2->base.index = index; in tegra186_usb2_lane_probe()
311 usb2->base.pad = pad; in tegra186_usb2_lane_probe()
312 usb2->base.np = np; in tegra186_usb2_lane_probe()
314 err = tegra_xusb_lane_parse_dt(&usb2->base, np); in tegra186_usb2_lane_probe()
320 return &usb2->base; in tegra186_usb2_lane_probe()
333 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_sleepwalk()
335 unsigned int index = lane->index; in tegra186_utmi_enable_phy_sleepwalk()
338 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
415 /* setup the pull-ups and pull-downs of the signals during the four in tegra186_utmi_enable_phy_sleepwalk()
426 /* J state: D+/D- = high/low, K state: D+/D- = low/high */ in tegra186_utmi_enable_phy_sleepwalk()
430 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
435 /* J state: D+/D- = low/high, K state: D+/D- = high/low */ in tegra186_utmi_enable_phy_sleepwalk()
439 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
474 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
481 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_sleepwalk()
483 unsigned int index = lane->index; in tegra186_utmi_disable_phy_sleepwalk()
486 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
505 if (padctl->soc->supports_lp_cfg_en) { in tegra186_utmi_disable_phy_sleepwalk()
522 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
529 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_wake()
530 unsigned int index = lane->index; in tegra186_utmi_enable_phy_wake()
533 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
547 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
554 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_wake()
555 unsigned int index = lane->index; in tegra186_utmi_disable_phy_wake()
558 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
572 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
579 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_remote_wake_detected()
580 unsigned int index = lane->index; in tegra186_utmi_phy_remote_wake_detected()
604 struct device *dev = padctl->dev; in tegra186_utmi_bias_pad_power_on()
608 if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) in tegra186_utmi_bias_pad_power_on()
611 err = clk_prepare_enable(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
625 value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch); in tegra186_utmi_bias_pad_power_on()
634 if (padctl->soc->poll_trk_completed) { in tegra186_utmi_bias_pad_power_on()
652 if (padctl->soc->trk_update_on_idle) in tegra186_utmi_bias_pad_power_on()
654 if (padctl->soc->trk_hw_mode) in tegra186_utmi_bias_pad_power_on()
658 if (!padctl->soc->trk_hw_mode) in tegra186_utmi_bias_pad_power_on()
659 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
667 if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) in tegra186_utmi_bias_pad_power_off()
674 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_off()
678 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_off()
686 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_on()
689 struct device *dev = padctl->dev; in tegra186_utmi_pad_power_on()
690 unsigned int index = lane->index; in tegra186_utmi_pad_power_on()
696 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_on()
697 if (test_bit(index, priv->utmi_pad_enabled)) { in tegra186_utmi_pad_power_on()
698 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
705 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
723 set_bit(index, priv->utmi_pad_enabled); in tegra186_utmi_pad_power_on()
724 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
730 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_down()
732 unsigned int index = lane->index; in tegra186_utmi_pad_power_down()
738 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_down()
739 if (!test_bit(index, priv->utmi_pad_enabled)) { in tegra186_utmi_pad_power_down()
740 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
744 dev_dbg(padctl->dev, "power down UTMI pad %u\n", index); in tegra186_utmi_pad_power_down()
756 clear_bit(index, priv->utmi_pad_enabled); in tegra186_utmi_pad_power_down()
760 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
768 dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_vbus_override()
791 dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_id_override()
810 err = regulator_enable(port->supply); in tegra186_xusb_padctl_id_override()
812 dev_err(padctl->dev, "Failed to enable regulator: %d\n", err); in tegra186_xusb_padctl_id_override()
822 err = regulator_disable(port->supply); in tegra186_xusb_padctl_id_override()
824 dev_err(padctl->dev, "Failed to disable regulator: %d\n", err); in tegra186_xusb_padctl_id_override()
841 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_set_mode()
843 lane->index); in tegra186_utmi_phy_set_mode()
846 mutex_lock(&padctl->lock); in tegra186_utmi_phy_set_mode()
848 dev_dbg(&port->base.dev, "%s: mode %d", __func__, mode); in tegra186_utmi_phy_set_mode()
865 mutex_unlock(&padctl->lock); in tegra186_utmi_phy_set_mode()
873 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_power_on()
876 unsigned int index = lane->index; in tegra186_utmi_phy_power_on()
877 struct device *dev = padctl->dev; in tegra186_utmi_phy_power_on()
883 return -ENODEV; in tegra186_utmi_phy_power_on()
894 if (port->mode == USB_DR_MODE_UNKNOWN) in tegra186_utmi_phy_power_on()
896 else if (port->mode == USB_DR_MODE_PERIPHERAL) in tegra186_utmi_phy_power_on()
898 else if (port->mode == USB_DR_MODE_HOST) in tegra186_utmi_phy_power_on()
900 else if (port->mode == USB_DR_MODE_OTG) in tegra186_utmi_phy_power_on()
910 if (usb2->hs_curr_level_offset) { in tegra186_utmi_phy_power_on()
913 hs_current_level = (int)priv->calib.hs_curr_level[index] + in tegra186_utmi_phy_power_on()
914 usb2->hs_curr_level_offset; in tegra186_utmi_phy_power_on()
923 value |= HS_CURR_LEVEL(priv->calib.hs_curr_level[index]); in tegra186_utmi_phy_power_on()
930 value |= TERM_RANGE_ADJ(priv->calib.hs_term_range_adj); in tegra186_utmi_phy_power_on()
932 value |= RPD_CTRL(priv->calib.rpd_ctrl); in tegra186_utmi_phy_power_on()
950 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_init()
952 unsigned int index = lane->index; in tegra186_utmi_phy_init()
953 struct device *dev = padctl->dev; in tegra186_utmi_phy_init()
960 return -ENODEV; in tegra186_utmi_phy_init()
963 if (port->mode == USB_DR_MODE_OTG || in tegra186_utmi_phy_init()
964 port->mode == USB_DR_MODE_PERIPHERAL) { in tegra186_utmi_phy_init()
973 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_init()
974 err = regulator_enable(port->supply); in tegra186_utmi_phy_init()
988 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_exit()
990 unsigned int index = lane->index; in tegra186_utmi_phy_exit()
991 struct device *dev = padctl->dev; in tegra186_utmi_phy_exit()
997 return -ENODEV; in tegra186_utmi_phy_exit()
1000 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_exit()
1001 err = regulator_disable(port->supply); in tegra186_utmi_phy_exit()
1033 return ERR_PTR(-ENOMEM); in tegra186_usb2_pad_probe()
1035 pad = &usb2->base; in tegra186_usb2_pad_probe()
1036 pad->ops = &tegra186_usb2_lane_ops; in tegra186_usb2_pad_probe()
1037 pad->soc = soc; in tegra186_usb2_pad_probe()
1045 priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk"); in tegra186_usb2_pad_probe()
1046 if (IS_ERR(priv->usb2_trk_clk)) { in tegra186_usb2_pad_probe()
1047 err = PTR_ERR(priv->usb2_trk_clk); in tegra186_usb2_pad_probe()
1048 dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err); in tegra186_usb2_pad_probe()
1056 dev_set_drvdata(&pad->dev, pad); in tegra186_usb2_pad_probe()
1061 device_unregister(&pad->dev); in tegra186_usb2_pad_probe()
1094 return tegra_xusb_find_lane(port->padctl, "usb2", port->index); in tegra186_usb2_port_map()
1115 return ERR_PTR(-ENOMEM); in tegra186_usb3_lane_probe()
1117 INIT_LIST_HEAD(&usb3->base.list); in tegra186_usb3_lane_probe()
1118 usb3->base.soc = &pad->soc->lanes[index]; in tegra186_usb3_lane_probe()
1119 usb3->base.index = index; in tegra186_usb3_lane_probe()
1120 usb3->base.pad = pad; in tegra186_usb3_lane_probe()
1121 usb3->base.np = np; in tegra186_usb3_lane_probe()
1123 err = tegra_xusb_lane_parse_dt(&usb3->base, np); in tegra186_usb3_lane_probe()
1129 return &usb3->base; in tegra186_usb3_lane_probe()
1142 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_sleepwalk()
1143 unsigned int index = lane->index; in tegra186_usb3_enable_phy_sleepwalk()
1146 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1160 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1167 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_sleepwalk()
1168 unsigned int index = lane->index; in tegra186_usb3_disable_phy_sleepwalk()
1171 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1183 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1190 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_wake()
1191 unsigned int index = lane->index; in tegra186_usb3_enable_phy_wake()
1194 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1208 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1215 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_wake()
1216 unsigned int index = lane->index; in tegra186_usb3_disable_phy_wake()
1219 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1233 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1240 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_remote_wake_detected()
1241 unsigned int index = lane->index; in tegra186_usb3_phy_remote_wake_detected()
1273 return tegra_xusb_find_lane(port->padctl, "usb3", port->index); in tegra186_usb3_port_map()
1286 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_on()
1289 unsigned int index = lane->index; in tegra186_usb3_phy_power_on()
1290 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_on()
1296 return -ENODEV; in tegra186_usb3_phy_power_on()
1299 usb2 = tegra_xusb_find_usb2_port(padctl, port->port); in tegra186_usb3_phy_power_on()
1303 return -ENODEV; in tegra186_usb3_phy_power_on()
1306 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_on()
1311 if (usb2->mode == USB_DR_MODE_UNKNOWN) in tegra186_usb3_phy_power_on()
1313 else if (usb2->mode == USB_DR_MODE_PERIPHERAL) in tegra186_usb3_phy_power_on()
1315 else if (usb2->mode == USB_DR_MODE_HOST) in tegra186_usb3_phy_power_on()
1317 else if (usb2->mode == USB_DR_MODE_OTG) in tegra186_usb3_phy_power_on()
1322 if (padctl->soc->supports_gen2 && port->disable_gen2) { in tegra186_usb3_phy_power_on()
1347 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_on()
1355 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_off()
1357 unsigned int index = lane->index; in tegra186_usb3_phy_power_off()
1358 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_off()
1364 return -ENODEV; in tegra186_usb3_phy_power_off()
1367 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_off()
1385 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_off()
1419 return ERR_PTR(-ENOMEM); in tegra186_usb3_pad_probe()
1421 pad = &usb3->base; in tegra186_usb3_pad_probe()
1422 pad->ops = &tegra186_usb3_lane_ops; in tegra186_usb3_pad_probe()
1423 pad->soc = soc; in tegra186_usb3_pad_probe()
1435 dev_set_drvdata(&pad->dev, pad); in tegra186_usb3_pad_probe()
1440 device_unregister(&pad->dev); in tegra186_usb3_pad_probe()
1464 struct device *dev = padctl->base.dev; in tegra186_xusb_read_fuse_calibration()
1469 count = padctl->base.soc->ports.usb2.count; in tegra186_xusb_read_fuse_calibration()
1473 return -ENOMEM; in tegra186_xusb_read_fuse_calibration()
1486 padctl->calib.hs_curr_level = level; in tegra186_xusb_read_fuse_calibration()
1488 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1490 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1501 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK; in tegra186_xusb_read_fuse_calibration()
1517 return ERR_PTR(-ENOMEM); in tegra186_xusb_padctl_probe()
1519 priv->base.dev = dev; in tegra186_xusb_padctl_probe()
1520 priv->base.soc = soc; in tegra186_xusb_padctl_probe()
1523 priv->ao_regs = devm_ioremap_resource(dev, res); in tegra186_xusb_padctl_probe()
1524 if (IS_ERR(priv->ao_regs)) in tegra186_xusb_padctl_probe()
1525 return ERR_CAST(priv->ao_regs); in tegra186_xusb_padctl_probe()
1531 return &priv->base; in tegra186_xusb_padctl_probe()
1538 priv->context.vbus_id = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_save()
1539 priv->context.usb2_pad_mux = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_save()
1540 priv->context.usb2_port_cap = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_save()
1541 priv->context.ss_port_cap = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_save()
1548 padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_restore()
1549 padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_restore()
1550 padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_restore()
1551 padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID); in tegra186_xusb_padctl_restore()
1584 "avdd-pll-erefeut",
1585 "avdd-usb",
1586 "vclamp-usb",
1587 "vddio-hsic",
1591 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1592 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1593 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1604 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1605 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1606 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1653 "avdd-usb",
1654 "vclamp-usb",
1658 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1659 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1660 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1661 TEGRA186_LANE("usb2-3", 0, 0, 0, usb2),
1672 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1673 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1674 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1675 TEGRA186_LANE("usb3-3", 0, 0, 0, usb3),