299 	struct tegra_xusb_usb2_lane *usb2;  in tegra186_usb2_lane_probe()  local
302 	usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL);  in tegra186_usb2_lane_probe()
303 	if (!usb2)  in tegra186_usb2_lane_probe()
306 	INIT_LIST_HEAD(&usb2->base.list);  in tegra186_usb2_lane_probe()
307 	usb2->base.soc = &pad->soc->lanes[index];  in tegra186_usb2_lane_probe()
308 	usb2->base.index = index;  in tegra186_usb2_lane_probe()
309 	usb2->base.pad = pad;  in tegra186_usb2_lane_probe()
310 	usb2->base.np = np;  in tegra186_usb2_lane_probe()
312 	err = tegra_xusb_lane_parse_dt(&usb2->base, np);  in tegra186_usb2_lane_probe()
314 		kfree(usb2);  in tegra186_usb2_lane_probe()
318 	return &usb2->base;  in tegra186_usb2_lane_probe()
323 	struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane);  in tegra186_usb2_lane_remove()  local
325 	kfree(usb2);  in tegra186_usb2_lane_remove()
407 	 * as well as capture the configuration of the USB2.0 pad  in tegra186_utmi_enable_phy_sleepwalk()
455 	/* switch the electric control of the USB2.0 pad to XUSB_AO */  in tegra186_utmi_enable_phy_sleepwalk()
491 	/* switch the electric control of the USB2.0 pad to XUSB vcore logic */  in tegra186_utmi_disable_phy_sleepwalk()
615 		dev_warn(dev, "failed to enable USB2 trk clock: %d\n", err);  in tegra186_utmi_bias_pad_power_on()
643 			dev_warn(dev, "failed to poll USB2 trk completed: %d\n", err);  in tegra186_utmi_bias_pad_power_on()
710 		dev_err(dev, "no port found for USB2 lane %u\n", index);  in tegra186_utmi_pad_power_on()
848 	struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane);  in tegra186_utmi_phy_power_on()  local
858 		dev_err(dev, "no port found for USB2 lane %u\n", index);  in tegra186_utmi_phy_power_on()
886 	if (usb2->hs_curr_level_offset) {  in tegra186_utmi_phy_power_on()
890 						usb2->hs_curr_level_offset;  in tegra186_utmi_phy_power_on()
935 		dev_err(dev, "no port found for USB2 lane %u\n", index);  in tegra186_utmi_phy_init()
972 		dev_err(dev, "no port found for USB2 lane %u\n", index);  in tegra186_utmi_phy_exit()
1003 	struct tegra_xusb_usb2_pad *usb2;  in tegra186_usb2_pad_probe()  local
1007 	usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL);  in tegra186_usb2_pad_probe()
1008 	if (!usb2)  in tegra186_usb2_pad_probe()
1011 	pad = &usb2->base;  in tegra186_usb2_pad_probe()
1017 		kfree(usb2);  in tegra186_usb2_pad_probe()
1024 		dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err);  in tegra186_usb2_pad_probe()
1044 	struct tegra_xusb_usb2_pad *usb2 = to_usb2_pad(pad);  in tegra186_usb2_pad_remove()  local
1046 	kfree(usb2);  in tegra186_usb2_pad_remove()
1070 	return tegra_xusb_find_lane(port->padctl, "usb2", port->index);  in tegra186_usb2_port_map()
1264 	struct tegra_xusb_usb2_port *usb2;  in tegra186_usb3_phy_power_on()  local
1275 	usb2 = tegra_xusb_find_usb2_port(padctl, port->port);  in tegra186_usb3_phy_power_on()
1276 	if (!usb2) {  in tegra186_usb3_phy_power_on()
1287 	if (usb2->mode == USB_DR_MODE_UNKNOWN)  in tegra186_usb3_phy_power_on()
1289 	else if (usb2->mode == USB_DR_MODE_PERIPHERAL)  in tegra186_usb3_phy_power_on()
1291 	else if (usb2->mode == USB_DR_MODE_HOST)  in tegra186_usb3_phy_power_on()
1293 	else if (usb2->mode == USB_DR_MODE_OTG)  in tegra186_usb3_phy_power_on()
1423 	struct tegra_xusb_usb2_pad *usb2 = to_usb2_pad(pad);  in tegra186_usb3_pad_remove()  local
1425 	kfree(usb2);  in tegra186_usb3_pad_remove()
1445 	count = padctl->base.soc->ports.usb2.count;  in tegra186_xusb_read_fuse_calibration()
1567 	TEGRA186_LANE("usb2-0", 0,  0, 0, usb2),
1568 	TEGRA186_LANE("usb2-1", 0,  0, 0, usb2),
1569 	TEGRA186_LANE("usb2-2", 0,  0, 0, usb2),
1573 	.name = "usb2",
1604 		.usb2 = {
1634 	TEGRA186_LANE("usb2-0", 0,  0, 0, usb2),
1635 	TEGRA186_LANE("usb2-1", 0,  0, 0, usb2),
1636 	TEGRA186_LANE("usb2-2", 0,  0, 0, usb2),
1637 	TEGRA186_LANE("usb2-3", 0,  0, 0, usb2),
1641 	.name = "usb2",
1670 		.usb2 = {
1691 		.usb2 = {