Lines Matching full:value
227 u32 value; in tegra124_xusb_padctl_enable() local
234 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
235 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in tegra124_xusb_padctl_enable()
236 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
240 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
241 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in tegra124_xusb_padctl_enable()
242 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
246 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
247 value &= ~XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in tegra124_xusb_padctl_enable()
248 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_enable()
257 u32 value; in tegra124_xusb_padctl_disable() local
267 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
268 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in tegra124_xusb_padctl_disable()
269 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
273 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
274 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in tegra124_xusb_padctl_disable()
275 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
279 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
280 value |= XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in tegra124_xusb_padctl_disable()
281 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_xusb_padctl_disable()
293 u32 value, offset; in tegra124_usb3_save_context() local
307 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
308 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
310 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_TAP << in tegra124_usb3_save_context()
312 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
314 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
316 port->tap1 = value & XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_TAP_MASK; in tegra124_usb3_save_context()
318 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
319 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
321 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_AMP << in tegra124_usb3_save_context()
323 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
325 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
327 port->amp = value & XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_AMP_MASK; in tegra124_usb3_save_context()
329 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_save_context()
330 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_MASK << in tegra124_usb3_save_context()
334 value |= (port->tap1 << in tegra124_usb3_save_context()
338 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_save_context()
340 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
341 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
343 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_LATCH_G_Z << in tegra124_usb3_save_context()
345 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
347 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
348 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
350 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_G_Z << in tegra124_usb3_save_context()
352 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
354 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
356 port->ctle_g = value & in tegra124_usb3_save_context()
359 value = padctl_readl(padctl, offset); in tegra124_usb3_save_context()
360 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_MASK << in tegra124_usb3_save_context()
362 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL6_MISC_OUT_SEL_CTLE_Z << in tegra124_usb3_save_context()
364 padctl_writel(padctl, value, offset); in tegra124_usb3_save_context()
366 value = padctl_readl(padctl, offset) >> in tegra124_usb3_save_context()
368 port->ctle_z = value & in tegra124_usb3_save_context()
371 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_save_context()
372 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_MASK << in tegra124_usb3_save_context()
376 value |= (port->ctle_g << in tegra124_usb3_save_context()
380 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_save_context()
388 u32 value; in tegra124_hsic_set_idle() local
390 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_set_idle()
393 value |= XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_set_idle()
396 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_set_idle()
399 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_set_idle()
487 u32 value; in tegra124_usb2_phy_power_on() local
498 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
499 value &= ~((XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK << in tegra124_usb2_phy_power_on()
503 value |= (priv->fuse.hs_squelch_level << in tegra124_usb2_phy_power_on()
507 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
509 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra124_usb2_phy_power_on()
510 value &= ~(XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK << in tegra124_usb2_phy_power_on()
512 value |= XUSB_PADCTL_USB2_PORT_CAP_HOST << in tegra124_usb2_phy_power_on()
514 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra124_usb2_phy_power_on()
516 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra124_usb2_phy_power_on()
517 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK << in tegra124_usb2_phy_power_on()
526 value |= (priv->fuse.hs_curr_level[index] + in tegra124_usb2_phy_power_on()
529 value |= XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_SLEW_VAL << in tegra124_usb2_phy_power_on()
531 value |= XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL(index) << in tegra124_usb2_phy_power_on()
533 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra124_usb2_phy_power_on()
535 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra124_usb2_phy_power_on()
536 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK << in tegra124_usb2_phy_power_on()
543 value |= (priv->fuse.hs_term_range_adj << in tegra124_usb2_phy_power_on()
547 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra124_usb2_phy_power_on()
558 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
559 value &= ~XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD; in tegra124_usb2_phy_power_on()
560 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_on()
573 u32 value; in tegra124_usb2_phy_power_off() local
590 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_off()
591 value |= XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD; in tegra124_usb2_phy_power_off()
592 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra124_usb2_phy_power_off()
870 u32 value; in tegra124_hsic_phy_power_on() local
880 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
883 value |= XUSB_PADCTL_HSIC_PAD_CTL1_AUTO_TERM_EN; in tegra124_hsic_phy_power_on()
885 value &= ~XUSB_PADCTL_HSIC_PAD_CTL1_AUTO_TERM_EN; in tegra124_hsic_phy_power_on()
887 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
889 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index)); in tegra124_hsic_phy_power_on()
890 value &= ~((XUSB_PADCTL_HSIC_PAD_CTL0_TX_RTUNEN_MASK << in tegra124_hsic_phy_power_on()
898 value |= (hsic->tx_rtune_n << in tegra124_hsic_phy_power_on()
906 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL0(index)); in tegra124_hsic_phy_power_on()
908 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL2(index)); in tegra124_hsic_phy_power_on()
909 value &= ~((XUSB_PADCTL_HSIC_PAD_CTL2_RX_STROBE_TRIM_MASK << in tegra124_hsic_phy_power_on()
913 value |= (hsic->rx_strobe_trim << in tegra124_hsic_phy_power_on()
917 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL2(index)); in tegra124_hsic_phy_power_on()
919 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
920 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL1_RPD_STROBE | in tegra124_hsic_phy_power_on()
926 value |= XUSB_PADCTL_HSIC_PAD_CTL1_RPD_DATA | in tegra124_hsic_phy_power_on()
928 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_on()
939 u32 value; in tegra124_hsic_phy_power_off() local
941 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_off()
942 value |= XUSB_PADCTL_HSIC_PAD_CTL1_PD_RX | in tegra124_hsic_phy_power_off()
946 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index)); in tegra124_hsic_phy_power_off()
1089 u32 value; in tegra124_pcie_phy_power_on() local
1091 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1092 value &= ~XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK; in tegra124_pcie_phy_power_on()
1093 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1095 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()
1096 value |= XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN | in tegra124_pcie_phy_power_on()
1099 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()
1101 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1102 value |= XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST; in tegra124_pcie_phy_power_on()
1103 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1108 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_on()
1109 if (value & XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET) { in tegra124_pcie_phy_power_on()
1117 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_on()
1118 value |= XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index); in tegra124_pcie_phy_power_on()
1119 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_on()
1128 u32 value; in tegra124_pcie_phy_power_off() local
1130 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_off()
1131 value &= ~XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index); in tegra124_pcie_phy_power_off()
1132 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_pcie_phy_power_off()
1134 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_off()
1135 value &= ~XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST; in tegra124_pcie_phy_power_off()
1136 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in tegra124_pcie_phy_power_off()
1267 u32 value; in tegra124_sata_phy_power_on() local
1269 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_on()
1270 value &= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in tegra124_sata_phy_power_on()
1271 value &= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ; in tegra124_sata_phy_power_on()
1272 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_on()
1274 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1275 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in tegra124_sata_phy_power_on()
1276 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ; in tegra124_sata_phy_power_on()
1277 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1279 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1280 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE; in tegra124_sata_phy_power_on()
1281 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1283 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1284 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST; in tegra124_sata_phy_power_on()
1285 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1290 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_on()
1291 if (value & XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_LOCKDET) { in tegra124_sata_phy_power_on()
1299 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_on()
1300 value |= XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index); in tegra124_sata_phy_power_on()
1301 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_on()
1310 u32 value; in tegra124_sata_phy_power_off() local
1312 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_off()
1313 value &= ~XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index); in tegra124_sata_phy_power_off()
1314 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX); in tegra124_sata_phy_power_off()
1316 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1317 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST; in tegra124_sata_phy_power_off()
1318 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1320 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1321 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE; in tegra124_sata_phy_power_off()
1322 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1324 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1325 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in tegra124_sata_phy_power_off()
1326 value |= XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ; in tegra124_sata_phy_power_off()
1327 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_sata_phy_power_off()
1329 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_off()
1330 value |= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in tegra124_sata_phy_power_off()
1331 value |= ~XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ; in tegra124_sata_phy_power_off()
1332 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in tegra124_sata_phy_power_off()
1482 u32 value; in tegra124_usb3_port_enable() local
1484 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_enable()
1487 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()
1489 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()
1491 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index); in tegra124_usb3_port_enable()
1492 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, usb3->port); in tegra124_usb3_port_enable()
1493 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_enable()
1500 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_port_enable()
1501 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_MASK << in tegra124_usb3_port_enable()
1507 value |= (XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_WANDER_VAL << in tegra124_usb3_port_enable()
1515 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL2_RX_EQ_G_MASK << in tegra124_usb3_port_enable()
1519 value |= (usb3->ctle_g << in tegra124_usb3_port_enable()
1525 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index)); in tegra124_usb3_port_enable()
1527 value = XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_VAL; in tegra124_usb3_port_enable()
1530 value &= ~((XUSB_PADCTL_IOPHY_USB3_PAD_CTL4_DFE_CNTL_TAP_MASK << in tegra124_usb3_port_enable()
1534 value |= (usb3->tap1 << in tegra124_usb3_port_enable()
1540 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index)); in tegra124_usb3_port_enable()
1547 value = padctl_readl(padctl, offset); in tegra124_usb3_port_enable()
1548 value &= ~(XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_MASK << in tegra124_usb3_port_enable()
1550 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL2_SPARE_IN_VAL << in tegra124_usb3_port_enable()
1552 padctl_writel(padctl, value, offset); in tegra124_usb3_port_enable()
1559 value = padctl_readl(padctl, offset); in tegra124_usb3_port_enable()
1560 value |= XUSB_PADCTL_IOPHY_MISC_PAD_CTL5_RX_QEYE_EN; in tegra124_usb3_port_enable()
1561 padctl_writel(padctl, value, offset); in tegra124_usb3_port_enable()
1565 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_usb3_port_enable()
1566 value &= ~(XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL0_REFCLK_NDIV_MASK << in tegra124_usb3_port_enable()
1568 value |= 0x2 << in tegra124_usb3_port_enable()
1570 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in tegra124_usb3_port_enable()
1572 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL2); in tegra124_usb3_port_enable()
1573 value &= ~((XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK << in tegra124_usb3_port_enable()
1580 value |= (0x7 << in tegra124_usb3_port_enable()
1587 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL2); in tegra124_usb3_port_enable()
1589 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_S0_CTL3); in tegra124_usb3_port_enable()
1590 value &= ~XUSB_PADCTL_IOPHY_PLL_S0_CTL3_RCAL_BYPASS; in tegra124_usb3_port_enable()
1591 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_S0_CTL3); in tegra124_usb3_port_enable()
1594 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1595 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(index); in tegra124_usb3_port_enable()
1596 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1600 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1601 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra124_usb3_port_enable()
1602 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1606 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1607 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(index); in tegra124_usb3_port_enable()
1608 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_enable()
1616 u32 value; in tegra124_usb3_port_disable() local
1618 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1619 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(port->index); in tegra124_usb3_port_disable()
1620 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1624 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1625 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(port->index); in tegra124_usb3_port_disable()
1626 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1630 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1631 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(port->index); in tegra124_usb3_port_disable()
1632 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra124_usb3_port_disable()
1634 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_disable()
1635 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(port->index); in tegra124_usb3_port_disable()
1636 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(port->index, 0x7); in tegra124_usb3_port_disable()
1637 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP); in tegra124_usb3_port_disable()
1665 u32 value; in tegra124_xusb_read_fuse_calibration() local
1667 err = tegra_fuse_readl(TEGRA_FUSE_SKU_CALIB_0, &value); in tegra124_xusb_read_fuse_calibration()
1673 (value >> FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(i)) & in tegra124_xusb_read_fuse_calibration()
1677 (value >> FUSE_SKU_CALIB_HS_IREF_CAP_SHIFT) & in tegra124_xusb_read_fuse_calibration()
1680 (value >> FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_SHIFT) & in tegra124_xusb_read_fuse_calibration()
1683 (value >> FUSE_SKU_CALIB_HS_SQUELCH_LEVEL_SHIFT) & in tegra124_xusb_read_fuse_calibration()