1 // SPDX-License-Identifier: GPL-2.0+
3  * StarFive JH7110 PCIe 2.0 PHY driver
15 #include <linux/phy/phy.h>
37 	struct phy *phy;  member
44 	enum phy_mode mode;  member
49 	if (!data->stg_syscon || !data->sys_syscon) {  in phy_usb3_mode_set()
50 		dev_err(&data->phy->dev, "doesn't support usb3 mode\n");  in phy_usb3_mode_set()
51 		return -EINVAL;  in phy_usb3_mode_set()
54 	regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,  in phy_usb3_mode_set()
56 	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,  in phy_usb3_mode_set()
58 	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,  in phy_usb3_mode_set()
61 	/* Connect usb 3.0 phy mode */  in phy_usb3_mode_set()
62 	regmap_update_bits(data->sys_syscon, data->sys_phy_connect,  in phy_usb3_mode_set()
65 	/* Configuare spread-spectrum mode: down-spread-spectrum */  in phy_usb3_mode_set()
66 	writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);  in phy_usb3_mode_set()
75 	/* default is PCIe mode */  in phy_pcie_mode_set()
76 	if (!data->stg_syscon || !data->sys_syscon)  in phy_pcie_mode_set()
79 	regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,  in phy_pcie_mode_set()
81 	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,  in phy_pcie_mode_set()
84 	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,  in phy_pcie_mode_set()
87 	regmap_update_bits(data->sys_syscon, data->sys_phy_connect,  in phy_pcie_mode_set()
90 	val = readl(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);  in phy_pcie_mode_set()
92 	writel(val, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);  in phy_pcie_mode_set()
95 static void phy_kvco_gain_set(struct jh7110_pcie_phy *phy)  in phy_kvco_gain_set()  argument
97 	/* PCIe Multi-PHY PLL KVCO Gain fine tune settings: */  in phy_kvco_gain_set()
98 	writel(PHY_KVCO_FINE_TUNE_LEVEL, phy->regs + PCIE_KVCO_LEVEL_OFF);  in phy_kvco_gain_set()
99 	writel(PHY_KVCO_FINE_TUNE_SIGNALS, phy->regs + PCIE_KVCO_TUNE_SIGNAL_OFF);  in phy_kvco_gain_set()
102 static int jh7110_pcie_phy_set_mode(struct phy *_phy,  in jh7110_pcie_phy_set_mode()
103 				    enum phy_mode mode, int submode)  in jh7110_pcie_phy_set_mode()  argument
105 	struct jh7110_pcie_phy *phy = phy_get_drvdata(_phy);  in jh7110_pcie_phy_set_mode()  local
108 	if (mode == phy->mode)  in jh7110_pcie_phy_set_mode()
111 	switch (mode) {  in jh7110_pcie_phy_set_mode()
115 		ret = phy_usb3_mode_set(phy);  in jh7110_pcie_phy_set_mode()
120 		phy_pcie_mode_set(phy);  in jh7110_pcie_phy_set_mode()
123 		return -EINVAL;  in jh7110_pcie_phy_set_mode()
126 	dev_dbg(&_phy->dev, "Changing phy mode to %d\n", mode);  in jh7110_pcie_phy_set_mode()
127 	phy->mode = mode;  in jh7110_pcie_phy_set_mode()
139 	struct jh7110_pcie_phy *phy;  in jh7110_pcie_phy_probe()  local
140 	struct device *dev = &pdev->dev;  in jh7110_pcie_phy_probe()
144 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);  in jh7110_pcie_phy_probe()
145 	if (!phy)  in jh7110_pcie_phy_probe()
146 		return -ENOMEM;  in jh7110_pcie_phy_probe()
148 	phy->regs = devm_platform_ioremap_resource(pdev, 0);  in jh7110_pcie_phy_probe()
149 	if (IS_ERR(phy->regs))  in jh7110_pcie_phy_probe()
150 		return PTR_ERR(phy->regs);  in jh7110_pcie_phy_probe()
152 	phy->phy = devm_phy_create(dev, NULL, &jh7110_pcie_phy_ops);  in jh7110_pcie_phy_probe()
153 	if (IS_ERR(phy->phy))  in jh7110_pcie_phy_probe()
154 		return dev_err_probe(dev, PTR_ERR(phy->phy),  in jh7110_pcie_phy_probe()
155 				     "Failed to map phy base\n");  in jh7110_pcie_phy_probe()
157 	phy->sys_syscon =  in jh7110_pcie_phy_probe()
158 		syscon_regmap_lookup_by_phandle_args(pdev->dev.of_node,  in jh7110_pcie_phy_probe()
159 						     "starfive,sys-syscon",  in jh7110_pcie_phy_probe()
162 	if (!IS_ERR_OR_NULL(phy->sys_syscon))  in jh7110_pcie_phy_probe()
163 		phy->sys_phy_connect = args[0];  in jh7110_pcie_phy_probe()
165 		phy->sys_syscon = NULL;  in jh7110_pcie_phy_probe()
167 	phy->stg_syscon =  in jh7110_pcie_phy_probe()
168 		syscon_regmap_lookup_by_phandle_args(pdev->dev.of_node,  in jh7110_pcie_phy_probe()
169 						     "starfive,stg-syscon",  in jh7110_pcie_phy_probe()
172 	if (!IS_ERR_OR_NULL(phy->stg_syscon)) {  in jh7110_pcie_phy_probe()
173 		phy->stg_pcie_mode = args[0];  in jh7110_pcie_phy_probe()
174 		phy->stg_pcie_usb = args[1];  in jh7110_pcie_phy_probe()
176 		phy->stg_syscon = NULL;  in jh7110_pcie_phy_probe()
179 	phy_kvco_gain_set(phy);  in jh7110_pcie_phy_probe()
181 	phy_set_drvdata(phy->phy, phy);  in jh7110_pcie_phy_probe()
188 	{ .compatible = "starfive,jh7110-pcie-phy" },
197 		.name  = "jh7110-pcie-phy",
202 MODULE_DESCRIPTION("StarFive JH7110 PCIe 2.0 PHY driver");