Lines Matching refs:MIPHY_PLL_SBR_1
157 #define MIPHY_PLL_SBR_1 0xe3 macro
509 writeb_relaxed(SET_NEW_CHANGE, base + MIPHY_PLL_SBR_1); in miphy28lp_compensation()
543 writeb_relaxed(SET_NEW_CHANGE, base + MIPHY_PLL_SBR_1); in miphy28_usb3_miphy_reset()
576 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy_sata_tune_ssc()
579 writeb_relaxed(SET_NEW_CHANGE, base + MIPHY_PLL_SBR_1); in miphy_sata_tune_ssc()
582 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy_sata_tune_ssc()
616 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy_pcie_tune_ssc()
619 writeb_relaxed(SET_NEW_CHANGE, base + MIPHY_PLL_SBR_1); in miphy_pcie_tune_ssc()
622 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy_pcie_tune_ssc()
773 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy28lp_configure_usb3()
776 writeb_relaxed(0x02, base + MIPHY_PLL_SBR_1); in miphy28lp_configure_usb3()
779 writeb_relaxed(0x00, base + MIPHY_PLL_SBR_1); in miphy28lp_configure_usb3()