1 // SPDX-License-Identifier: GPL-2.0-only
3  * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
13 #include "phy-samsung-usb2.h"
85 #define EXYNOS_4x12_URSTCON_OTG_HLINK		BIT(1)
114 /* Mode switching SUB Device <-> Host */
116 #define EXYNOS_4x12_MODE_SWITCH_MASK		1
118 #define EXYNOS_4x12_MODE_SWITCH_HOST		1
159 		return -EINVAL;  in exynos4x12_rate_to_clk()
167 	struct samsung_usb2_phy_driver *drv = inst->drv;  in exynos4x12_isol()  local
171 	switch (inst->cfg->id) {  in exynos4x12_isol()
189 	regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask);  in exynos4x12_isol()
194 	struct samsung_usb2_phy_driver *drv = inst->drv;  in exynos4x12_setup_clk()  local
197 	clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK);  in exynos4x12_setup_clk()
200 	if (drv->cfg->has_refclk_sel)  in exynos4x12_setup_clk()
203 	clk |= drv->ref_reg_val << EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET;  in exynos4x12_setup_clk()
205 	writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK);  in exynos4x12_setup_clk()
210 	struct samsung_usb2_phy_driver *drv = inst->drv;  in exynos4x12_phy_pwr()  local
216 	switch (inst->cfg->id) {  in exynos4x12_phy_pwr()
240 		pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR);  in exynos4x12_phy_pwr()
242 		writel(pwr, drv->reg_phy + EXYNOS_4x12_UPHYPWR);  in exynos4x12_phy_pwr()
244 		rst = readl(drv->reg_phy + EXYNOS_4x12_UPHYRST);  in exynos4x12_phy_pwr()
246 		writel(rst, drv->reg_phy + EXYNOS_4x12_UPHYRST);  in exynos4x12_phy_pwr()
249 		writel(rst, drv->reg_phy + EXYNOS_4x12_UPHYRST);  in exynos4x12_phy_pwr()
254 		pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR);  in exynos4x12_phy_pwr()
256 		writel(pwr, drv->reg_phy + EXYNOS_4x12_UPHYPWR);  in exynos4x12_phy_pwr()
262 	if (inst->int_cnt++ > 0)  in exynos4x12_power_on_int()
267 	exynos4x12_phy_pwr(inst, 1);  in exynos4x12_power_on_int()
272 	struct samsung_usb2_phy_driver *drv = inst->drv;  in exynos4x12_power_on()  local
274 	if (inst->ext_cnt++ > 0)  in exynos4x12_power_on()
277 	if (inst->cfg->id == EXYNOS4x12_HOST) {  in exynos4x12_power_on()
278 		regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET,  in exynos4x12_power_on()
281 		exynos4x12_power_on_int(&drv->instances[EXYNOS4x12_DEVICE]);  in exynos4x12_power_on()
284 	if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch)  in exynos4x12_power_on()
285 		regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET,  in exynos4x12_power_on()
289 	if (inst->cfg->id == EXYNOS4x12_HSIC0 ||  in exynos4x12_power_on()
290 		inst->cfg->id == EXYNOS4x12_HSIC1) {  in exynos4x12_power_on()
291 		exynos4x12_power_on_int(&drv->instances[EXYNOS4x12_DEVICE]);  in exynos4x12_power_on()
292 		exynos4x12_power_on_int(&drv->instances[EXYNOS4x12_HOST]);  in exynos4x12_power_on()
302 	if (inst->int_cnt-- > 1)  in exynos4x12_power_off_int()
305 	exynos4x12_isol(inst, 1);  in exynos4x12_power_off_int()
311 	struct samsung_usb2_phy_driver *drv = inst->drv;  in exynos4x12_power_off()  local
313 	if (inst->ext_cnt-- > 1)  in exynos4x12_power_off()
316 	if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch)  in exynos4x12_power_off()
317 		regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET,  in exynos4x12_power_off()
321 	if (inst->cfg->id == EXYNOS4x12_HOST)  in exynos4x12_power_off()
322 		exynos4x12_power_off_int(&drv->instances[EXYNOS4x12_DEVICE]);  in exynos4x12_power_off()
324 	if (inst->cfg->id == EXYNOS4x12_HSIC0 ||  in exynos4x12_power_off()
325 		inst->cfg->id == EXYNOS4x12_HSIC1) {  in exynos4x12_power_off()
326 		exynos4x12_power_off_int(&drv->instances[EXYNOS4x12_DEVICE]);  in exynos4x12_power_off()
327 		exynos4x12_power_off_int(&drv->instances[EXYNOS4x12_HOST]);  in exynos4x12_power_off()
364 	.has_refclk_sel		= 1,
365 	.num_phys		= 1,
371 	.has_mode_switch	= 1,