Lines Matching +full:0 +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Rockchip USB2.0 PHY with Innosilicon IP block driver
9 #include <linux/clk-provider.h>
11 #include <linux/extcon-provider.h>
43 PHY_STATE_HS_ONLINE = 0,
44 PHY_STATE_DISCONNECT = 1,
50 * enum usb_chg_state - Different states involved in USB charger detection.
62 USB_CHG_STATE_UNDEFINED = 0,
89 * struct rockchip_chg_det_reg - usb charger detect registers
115 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration.
169 * struct rockchip_usb2phy_cfg - usb-phy configuration.
170 * @reg: the address offset of grf for usb-phy config.
174 * @port_cfgs: usb-phy port configurations.
187 * struct rockchip_usb2phy_port - usb-phy port data.
196 * @otg_mux_irq: IRQ number which multiplex otg-id/otg-bvalid/linestate
197 * irqs to one irq in otg-port.
228 * struct rockchip_usb2phy - usb2.0 phy driver data.
266 return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf; in get_reg_base()
274 tmp = en ? reg->enable : reg->disable; in property_enable()
275 mask = GENMASK(reg->bitend, reg->bitstart); in property_enable()
276 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in property_enable()
278 return regmap_write(base, reg->offset, val); in property_enable()
286 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in property_enabled()
288 ret = regmap_read(base, reg->offset, &orig); in property_enabled()
292 tmp = (orig & mask) >> reg->bitstart; in property_enabled()
293 return tmp != reg->disable; in property_enabled()
300 ret = reset_control_assert(rphy->phy_reset); in rockchip_usb2phy_reset()
306 ret = reset_control_deassert(rphy->phy_reset); in rockchip_usb2phy_reset()
312 return 0; in rockchip_usb2phy_reset()
319 clk_bulk_disable_unprepare(rphy->num_clks, rphy->clks); in rockchip_usb2phy_clk_bulk_disable()
330 if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare()
331 ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true); in rockchip_usb2phy_clk480m_prepare()
339 return 0; in rockchip_usb2phy_clk480m_prepare()
349 property_enable(base, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare()
358 return property_enabled(base, &rphy->phy_cfg->clkout_ctl); in rockchip_usb2phy_clk480m_prepared()
379 of_clk_del_provider(rphy->dev->of_node); in rockchip_usb2phy_clk480m_unregister()
380 clk_unregister(rphy->clk480m); in rockchip_usb2phy_clk480m_unregister()
386 struct device_node *node = rphy->dev->of_node; in rockchip_usb2phy_clk480m_register()
391 int ret = 0; in rockchip_usb2phy_clk480m_register()
393 init.flags = 0; in rockchip_usb2phy_clk480m_register()
398 of_property_read_string(node, "clock-output-names", &init.name); in rockchip_usb2phy_clk480m_register()
400 for (i = 0; i < rphy->num_clks; i++) { in rockchip_usb2phy_clk480m_register()
401 if (!strncmp(rphy->clks[i].id, "phyclk", 6)) { in rockchip_usb2phy_clk480m_register()
402 refclk = rphy->clks[i].clk; in rockchip_usb2phy_clk480m_register()
410 init.num_parents = 1; in rockchip_usb2phy_clk480m_register()
413 init.num_parents = 0; in rockchip_usb2phy_clk480m_register()
416 rphy->clk480m_hw.init = &init; in rockchip_usb2phy_clk480m_register()
419 rphy->clk480m = clk_register(rphy->dev, &rphy->clk480m_hw); in rockchip_usb2phy_clk480m_register()
420 if (IS_ERR(rphy->clk480m)) { in rockchip_usb2phy_clk480m_register()
421 ret = PTR_ERR(rphy->clk480m); in rockchip_usb2phy_clk480m_register()
425 ret = of_clk_add_provider(node, of_clk_src_simple_get, rphy->clk480m); in rockchip_usb2phy_clk480m_register()
426 if (ret < 0) in rockchip_usb2phy_clk480m_register()
429 return devm_add_action_or_reset(rphy->dev, rockchip_usb2phy_clk480m_unregister, rphy); in rockchip_usb2phy_clk480m_register()
432 clk_unregister(rphy->clk480m); in rockchip_usb2phy_clk480m_register()
439 struct device_node *node = rphy->dev->of_node; in rockchip_usb2phy_extcon_register()
444 edev = extcon_get_edev_by_phandle(rphy->dev, 0); in rockchip_usb2phy_extcon_register()
446 return dev_err_probe(rphy->dev, PTR_ERR(edev), in rockchip_usb2phy_extcon_register()
450 edev = devm_extcon_dev_allocate(rphy->dev, in rockchip_usb2phy_extcon_register()
454 return dev_err_probe(rphy->dev, PTR_ERR(edev), in rockchip_usb2phy_extcon_register()
457 ret = devm_extcon_dev_register(rphy->dev, edev); in rockchip_usb2phy_extcon_register()
459 return dev_err_probe(rphy->dev, ret, in rockchip_usb2phy_extcon_register()
463 rphy->edev = edev; in rockchip_usb2phy_extcon_register()
465 return 0; in rockchip_usb2phy_extcon_register()
474 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true); in rockchip_usb2phy_enable_host_disc_irq()
478 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_en, en); in rockchip_usb2phy_enable_host_disc_irq()
482 ret = property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true); in rockchip_usb2phy_enable_host_disc_irq()
486 return property_enable(rphy->grf, &rport->port_cfg->disrise_en, en); in rockchip_usb2phy_enable_host_disc_irq()
492 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent); in rockchip_usb2phy_init()
493 int ret = 0; in rockchip_usb2phy_init()
495 mutex_lock(&rport->mutex); in rockchip_usb2phy_init()
497 if (rport->port_id == USB2PHY_PORT_OTG) { in rockchip_usb2phy_init()
498 if (rport->mode != USB_DR_MODE_HOST && in rockchip_usb2phy_init()
499 rport->mode != USB_DR_MODE_UNKNOWN) { in rockchip_usb2phy_init()
501 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
502 &rport->port_cfg->bvalid_det_clr, in rockchip_usb2phy_init()
507 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
508 &rport->port_cfg->bvalid_det_en, in rockchip_usb2phy_init()
514 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
515 &rport->port_cfg->idfall_det_clr, in rockchip_usb2phy_init()
520 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
521 &rport->port_cfg->idrise_det_clr, in rockchip_usb2phy_init()
526 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
527 &rport->port_cfg->idfall_det_en, in rockchip_usb2phy_init()
532 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
533 &rport->port_cfg->idrise_det_en, in rockchip_usb2phy_init()
538 schedule_delayed_work(&rport->otg_sm_work, in rockchip_usb2phy_init()
542 dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode); in rockchip_usb2phy_init()
544 } else if (rport->port_id == USB2PHY_PORT_HOST) { in rockchip_usb2phy_init()
545 if (rport->port_cfg->disfall_en.offset) { in rockchip_usb2phy_init()
546 rport->host_disconnect = true; in rockchip_usb2phy_init()
549 dev_err(rphy->dev, "failed to enable disconnect irq\n"); in rockchip_usb2phy_init()
555 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
556 &rport->port_cfg->ls_det_clr, true); in rockchip_usb2phy_init()
560 ret = property_enable(rphy->grf, in rockchip_usb2phy_init()
561 &rport->port_cfg->ls_det_en, true); in rockchip_usb2phy_init()
565 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY); in rockchip_usb2phy_init()
569 mutex_unlock(&rport->mutex); in rockchip_usb2phy_init()
576 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent); in rockchip_usb2phy_power_on()
580 dev_dbg(&rport->phy->dev, "port power on\n"); in rockchip_usb2phy_power_on()
582 if (!rport->suspended) in rockchip_usb2phy_power_on()
583 return 0; in rockchip_usb2phy_power_on()
585 ret = clk_prepare_enable(rphy->clk480m); in rockchip_usb2phy_power_on()
589 ret = property_enable(base, &rport->port_cfg->phy_sus, false); in rockchip_usb2phy_power_on()
591 clk_disable_unprepare(rphy->clk480m); in rockchip_usb2phy_power_on()
597 * suspend mode with common_on_n 1'b1(aka REFCLK_LOGIC, in rockchip_usb2phy_power_on()
600 * please keep the common_on_n 1'b0 to set these blocks in rockchip_usb2phy_power_on()
610 rport->suspended = false; in rockchip_usb2phy_power_on()
611 return 0; in rockchip_usb2phy_power_on()
617 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent); in rockchip_usb2phy_power_off()
621 dev_dbg(&rport->phy->dev, "port power off\n"); in rockchip_usb2phy_power_off()
623 if (rport->suspended) in rockchip_usb2phy_power_off()
624 return 0; in rockchip_usb2phy_power_off()
626 ret = property_enable(base, &rport->port_cfg->phy_sus, true); in rockchip_usb2phy_power_off()
630 rport->suspended = true; in rockchip_usb2phy_power_off()
631 clk_disable_unprepare(rphy->clk480m); in rockchip_usb2phy_power_off()
633 return 0; in rockchip_usb2phy_power_off()
640 if (rport->port_id == USB2PHY_PORT_OTG && in rockchip_usb2phy_exit()
641 rport->mode != USB_DR_MODE_HOST && in rockchip_usb2phy_exit()
642 rport->mode != USB_DR_MODE_UNKNOWN) { in rockchip_usb2phy_exit()
643 cancel_delayed_work_sync(&rport->otg_sm_work); in rockchip_usb2phy_exit()
644 cancel_delayed_work_sync(&rport->chg_work); in rockchip_usb2phy_exit()
645 } else if (rport->port_id == USB2PHY_PORT_HOST) in rockchip_usb2phy_exit()
646 cancel_delayed_work_sync(&rport->sm_work); in rockchip_usb2phy_exit()
648 return 0; in rockchip_usb2phy_exit()
664 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_otg_sm_work()
669 vbus_attach = property_enabled(rphy->grf, in rockchip_usb2phy_otg_sm_work()
670 &rport->port_cfg->utmi_bvalid); in rockchip_usb2phy_otg_sm_work()
675 dev_dbg(&rport->phy->dev, "%s otg sm work\n", in rockchip_usb2phy_otg_sm_work()
676 usb_otg_state_string(rport->state)); in rockchip_usb2phy_otg_sm_work()
678 switch (rport->state) { in rockchip_usb2phy_otg_sm_work()
680 rport->state = OTG_STATE_B_IDLE; in rockchip_usb2phy_otg_sm_work()
682 rockchip_usb2phy_power_off(rport->phy); in rockchip_usb2phy_otg_sm_work()
685 if (extcon_get_state(rphy->edev, EXTCON_USB_HOST) > 0) { in rockchip_usb2phy_otg_sm_work()
686 dev_dbg(&rport->phy->dev, "usb otg host connect\n"); in rockchip_usb2phy_otg_sm_work()
687 rport->state = OTG_STATE_A_HOST; in rockchip_usb2phy_otg_sm_work()
688 rockchip_usb2phy_power_on(rport->phy); in rockchip_usb2phy_otg_sm_work()
691 dev_dbg(&rport->phy->dev, "vbus_attach\n"); in rockchip_usb2phy_otg_sm_work()
692 switch (rphy->chg_state) { in rockchip_usb2phy_otg_sm_work()
694 schedule_delayed_work(&rport->chg_work, 0); in rockchip_usb2phy_otg_sm_work()
697 switch (rphy->chg_type) { in rockchip_usb2phy_otg_sm_work()
699 dev_dbg(&rport->phy->dev, "sdp cable is connected\n"); in rockchip_usb2phy_otg_sm_work()
700 rockchip_usb2phy_power_on(rport->phy); in rockchip_usb2phy_otg_sm_work()
701 rport->state = OTG_STATE_B_PERIPHERAL; in rockchip_usb2phy_otg_sm_work()
707 dev_dbg(&rport->phy->dev, "dcp cable is connected\n"); in rockchip_usb2phy_otg_sm_work()
708 rockchip_usb2phy_power_off(rport->phy); in rockchip_usb2phy_otg_sm_work()
714 dev_dbg(&rport->phy->dev, "cdp cable is connected\n"); in rockchip_usb2phy_otg_sm_work()
715 rockchip_usb2phy_power_on(rport->phy); in rockchip_usb2phy_otg_sm_work()
716 rport->state = OTG_STATE_B_PERIPHERAL; in rockchip_usb2phy_otg_sm_work()
730 rphy->chg_state = USB_CHG_STATE_UNDEFINED; in rockchip_usb2phy_otg_sm_work()
731 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN; in rockchip_usb2phy_otg_sm_work()
734 if (rport->vbus_attached != vbus_attach) { in rockchip_usb2phy_otg_sm_work()
735 rport->vbus_attached = vbus_attach; in rockchip_usb2phy_otg_sm_work()
737 if (notify_charger && rphy->edev) { in rockchip_usb2phy_otg_sm_work()
738 extcon_set_state_sync(rphy->edev, in rockchip_usb2phy_otg_sm_work()
741 extcon_set_state_sync(rphy->edev, in rockchip_usb2phy_otg_sm_work()
749 dev_dbg(&rport->phy->dev, "usb disconnect\n"); in rockchip_usb2phy_otg_sm_work()
750 rphy->chg_state = USB_CHG_STATE_UNDEFINED; in rockchip_usb2phy_otg_sm_work()
751 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN; in rockchip_usb2phy_otg_sm_work()
752 rport->state = OTG_STATE_B_IDLE; in rockchip_usb2phy_otg_sm_work()
753 delay = 0; in rockchip_usb2phy_otg_sm_work()
754 rockchip_usb2phy_power_off(rport->phy); in rockchip_usb2phy_otg_sm_work()
759 if (extcon_get_state(rphy->edev, EXTCON_USB_HOST) == 0) { in rockchip_usb2phy_otg_sm_work()
760 dev_dbg(&rport->phy->dev, "usb otg host disconnect\n"); in rockchip_usb2phy_otg_sm_work()
761 rport->state = OTG_STATE_B_IDLE; in rockchip_usb2phy_otg_sm_work()
762 rockchip_usb2phy_power_off(rport->phy); in rockchip_usb2phy_otg_sm_work()
770 schedule_delayed_work(&rport->otg_sm_work, delay); in rockchip_usb2phy_otg_sm_work()
792 property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en); in rockchip_chg_enable_dcd()
793 property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en); in rockchip_chg_enable_dcd()
801 property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en); in rockchip_chg_enable_primary_det()
802 property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en); in rockchip_chg_enable_primary_det()
810 property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en); in rockchip_chg_enable_secondary_det()
811 property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en); in rockchip_chg_enable_secondary_det()
822 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_chg_detect_work()
827 dev_dbg(&rport->phy->dev, "chg detection work state = %d\n", in rockchip_chg_detect_work()
828 rphy->chg_state); in rockchip_chg_detect_work()
829 switch (rphy->chg_state) { in rockchip_chg_detect_work()
831 if (!rport->suspended) in rockchip_chg_detect_work()
832 rockchip_usb2phy_power_off(rport->phy); in rockchip_chg_detect_work()
833 /* put the controller in non-driving mode */ in rockchip_chg_detect_work()
834 property_enable(base, &rphy->phy_cfg->chg_det.opmode, false); in rockchip_chg_detect_work()
835 /* Start DCD processing stage 1 */ in rockchip_chg_detect_work()
837 rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD; in rockchip_chg_detect_work()
838 rphy->dcd_retries = 0; in rockchip_chg_detect_work()
843 is_dcd = property_enabled(rphy->grf, in rockchip_chg_detect_work()
844 &rphy->phy_cfg->chg_det.dp_det); in rockchip_chg_detect_work()
845 tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES; in rockchip_chg_detect_work()
854 rphy->chg_state = USB_CHG_STATE_DCD_DONE; in rockchip_chg_detect_work()
861 vout = property_enabled(rphy->grf, in rockchip_chg_detect_work()
862 &rphy->phy_cfg->chg_det.cp_det); in rockchip_chg_detect_work()
868 rphy->chg_state = USB_CHG_STATE_PRIMARY_DONE; in rockchip_chg_detect_work()
870 if (rphy->dcd_retries == CHG_DCD_MAX_RETRIES) { in rockchip_chg_detect_work()
872 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP; in rockchip_chg_detect_work()
873 rphy->chg_state = USB_CHG_STATE_DETECTED; in rockchip_chg_detect_work()
874 delay = 0; in rockchip_chg_detect_work()
876 rphy->chg_type = POWER_SUPPLY_TYPE_USB; in rockchip_chg_detect_work()
877 rphy->chg_state = USB_CHG_STATE_DETECTED; in rockchip_chg_detect_work()
878 delay = 0; in rockchip_chg_detect_work()
883 vout = property_enabled(rphy->grf, in rockchip_chg_detect_work()
884 &rphy->phy_cfg->chg_det.dcp_det); in rockchip_chg_detect_work()
888 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP; in rockchip_chg_detect_work()
890 rphy->chg_type = POWER_SUPPLY_TYPE_USB_CDP; in rockchip_chg_detect_work()
893 rphy->chg_state = USB_CHG_STATE_DETECTED; in rockchip_chg_detect_work()
897 property_enable(base, &rphy->phy_cfg->chg_det.opmode, true); in rockchip_chg_detect_work()
898 rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work); in rockchip_chg_detect_work()
899 dev_dbg(&rport->phy->dev, "charger = %s\n", in rockchip_chg_detect_work()
900 chg_to_string(rphy->chg_type)); in rockchip_chg_detect_work()
906 schedule_delayed_work(&rport->chg_work, delay); in rockchip_chg_detect_work()
910 * The function manage host-phy port state and suspend/resume phy port
926 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_sm_work()
931 mutex_lock(&rport->mutex); in rockchip_usb2phy_sm_work()
933 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_ls.offset, &ul); in rockchip_usb2phy_sm_work()
934 if (ret < 0) in rockchip_usb2phy_sm_work()
937 ul_mask = GENMASK(rport->port_cfg->utmi_ls.bitend, in rockchip_usb2phy_sm_work()
938 rport->port_cfg->utmi_ls.bitstart); in rockchip_usb2phy_sm_work()
940 if (rport->port_cfg->utmi_hstdet.offset) { in rockchip_usb2phy_sm_work()
941 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd); in rockchip_usb2phy_sm_work()
942 if (ret < 0) in rockchip_usb2phy_sm_work()
945 uhd_mask = GENMASK(rport->port_cfg->utmi_hstdet.bitend, in rockchip_usb2phy_sm_work()
946 rport->port_cfg->utmi_hstdet.bitstart); in rockchip_usb2phy_sm_work()
948 sh = rport->port_cfg->utmi_hstdet.bitend - in rockchip_usb2phy_sm_work()
949 rport->port_cfg->utmi_hstdet.bitstart + 1; in rockchip_usb2phy_sm_work()
951 state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | in rockchip_usb2phy_sm_work()
952 (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh); in rockchip_usb2phy_sm_work()
954 state = ((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << 1 | in rockchip_usb2phy_sm_work()
955 rport->host_disconnect; in rockchip_usb2phy_sm_work()
960 dev_dbg(&rport->phy->dev, "HS online\n"); in rockchip_usb2phy_sm_work()
968 * Plus, there are two cases, one is D- Line pull-up, and D+ in rockchip_usb2phy_sm_work()
969 * line pull-down, the state is 4; another is D+ line pull-up, in rockchip_usb2phy_sm_work()
970 * and D- line pull-down, the state is 2. in rockchip_usb2phy_sm_work()
972 if (!rport->suspended) { in rockchip_usb2phy_sm_work()
973 /* D- line pull-up, D+ line pull-down */ in rockchip_usb2phy_sm_work()
974 dev_dbg(&rport->phy->dev, "FS/LS online\n"); in rockchip_usb2phy_sm_work()
979 if (rport->suspended) { in rockchip_usb2phy_sm_work()
980 dev_dbg(&rport->phy->dev, "Connected\n"); in rockchip_usb2phy_sm_work()
981 rockchip_usb2phy_power_on(rport->phy); in rockchip_usb2phy_sm_work()
982 rport->suspended = false; in rockchip_usb2phy_sm_work()
984 /* D+ line pull-up, D- line pull-down */ in rockchip_usb2phy_sm_work()
985 dev_dbg(&rport->phy->dev, "FS/LS online\n"); in rockchip_usb2phy_sm_work()
989 if (!rport->suspended) { in rockchip_usb2phy_sm_work()
990 dev_dbg(&rport->phy->dev, "Disconnected\n"); in rockchip_usb2phy_sm_work()
991 rockchip_usb2phy_power_off(rport->phy); in rockchip_usb2phy_sm_work()
992 rport->suspended = true; in rockchip_usb2phy_sm_work()
997 * plug-in irq. in rockchip_usb2phy_sm_work()
999 property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true); in rockchip_usb2phy_sm_work()
1000 property_enable(rphy->grf, &rport->port_cfg->ls_det_en, true); in rockchip_usb2phy_sm_work()
1006 mutex_unlock(&rport->mutex); in rockchip_usb2phy_sm_work()
1009 dev_dbg(&rport->phy->dev, "unknown phy state\n"); in rockchip_usb2phy_sm_work()
1014 mutex_unlock(&rport->mutex); in rockchip_usb2phy_sm_work()
1015 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY); in rockchip_usb2phy_sm_work()
1021 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_linestate_irq()
1023 if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st)) in rockchip_usb2phy_linestate_irq()
1026 mutex_lock(&rport->mutex); in rockchip_usb2phy_linestate_irq()
1029 property_enable(rphy->grf, &rport->port_cfg->ls_det_en, false); in rockchip_usb2phy_linestate_irq()
1030 property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true); in rockchip_usb2phy_linestate_irq()
1032 mutex_unlock(&rport->mutex); in rockchip_usb2phy_linestate_irq()
1039 if (rport->suspended && rport->port_id == USB2PHY_PORT_HOST) in rockchip_usb2phy_linestate_irq()
1040 rockchip_usb2phy_sm_work(&rport->sm_work.work); in rockchip_usb2phy_linestate_irq()
1048 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_bvalid_irq()
1050 if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st)) in rockchip_usb2phy_bvalid_irq()
1054 property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true); in rockchip_usb2phy_bvalid_irq()
1056 rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work); in rockchip_usb2phy_bvalid_irq()
1064 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_id_irq()
1067 if (!property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st) && in rockchip_usb2phy_id_irq()
1068 !property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st)) in rockchip_usb2phy_id_irq()
1072 if (property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st)) in rockchip_usb2phy_id_irq()
1073 property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr, true); in rockchip_usb2phy_id_irq()
1075 if (property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st)) in rockchip_usb2phy_id_irq()
1076 property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr, true); in rockchip_usb2phy_id_irq()
1078 id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id); in rockchip_usb2phy_id_irq()
1079 extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id); in rockchip_usb2phy_id_irq()
1097 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); in rockchip_usb2phy_host_disc_irq()
1099 if (!property_enabled(rphy->grf, &rport->port_cfg->disfall_st) && in rockchip_usb2phy_host_disc_irq()
1100 !property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) in rockchip_usb2phy_host_disc_irq()
1103 mutex_lock(&rport->mutex); in rockchip_usb2phy_host_disc_irq()
1106 if (property_enabled(rphy->grf, &rport->port_cfg->disfall_st)) { in rockchip_usb2phy_host_disc_irq()
1107 property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true); in rockchip_usb2phy_host_disc_irq()
1108 rport->host_disconnect = false; in rockchip_usb2phy_host_disc_irq()
1109 } else if (property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) { in rockchip_usb2phy_host_disc_irq()
1110 property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true); in rockchip_usb2phy_host_disc_irq()
1111 rport->host_disconnect = true; in rockchip_usb2phy_host_disc_irq()
1114 mutex_unlock(&rport->mutex); in rockchip_usb2phy_host_disc_irq()
1126 for (index = 0; index < rphy->phy_cfg->num_ports; index++) { in rockchip_usb2phy_irq()
1127 rport = &rphy->ports[index]; in rockchip_usb2phy_irq()
1128 if (!rport->phy) in rockchip_usb2phy_irq()
1131 if (rport->port_id == USB2PHY_PORT_HOST && in rockchip_usb2phy_irq()
1132 rport->port_cfg->disfall_en.offset) in rockchip_usb2phy_irq()
1135 switch (rport->port_id) { in rockchip_usb2phy_irq()
1137 if (rport->mode != USB_DR_MODE_HOST && in rockchip_usb2phy_irq()
1138 rport->mode != USB_DR_MODE_UNKNOWN) in rockchip_usb2phy_irq()
1160 if (rphy->irq > 0) in rockchip_usb2phy_port_irq_init()
1161 return 0; in rockchip_usb2phy_port_irq_init()
1163 switch (rport->port_id) { in rockchip_usb2phy_port_irq_init()
1165 rport->ls_irq = of_irq_get_byname(child_np, "linestate"); in rockchip_usb2phy_port_irq_init()
1166 if (rport->ls_irq < 0) { in rockchip_usb2phy_port_irq_init()
1167 dev_err(rphy->dev, "no linestate irq provided\n"); in rockchip_usb2phy_port_irq_init()
1168 return rport->ls_irq; in rockchip_usb2phy_port_irq_init()
1171 ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL, in rockchip_usb2phy_port_irq_init()
1176 dev_err(rphy->dev, "failed to request linestate irq handle\n"); in rockchip_usb2phy_port_irq_init()
1182 * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate in rockchip_usb2phy_port_irq_init()
1183 * interrupts muxed together, so probe the otg-mux interrupt first, in rockchip_usb2phy_port_irq_init()
1186 rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux"); in rockchip_usb2phy_port_irq_init()
1187 if (rport->otg_mux_irq > 0) { in rockchip_usb2phy_port_irq_init()
1188 ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq, in rockchip_usb2phy_port_irq_init()
1195 dev_err(rphy->dev, in rockchip_usb2phy_port_irq_init()
1196 "failed to request otg-mux irq handle\n"); in rockchip_usb2phy_port_irq_init()
1200 rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid"); in rockchip_usb2phy_port_irq_init()
1201 if (rport->bvalid_irq < 0) { in rockchip_usb2phy_port_irq_init()
1202 dev_err(rphy->dev, "no vbus valid irq provided\n"); in rockchip_usb2phy_port_irq_init()
1203 ret = rport->bvalid_irq; in rockchip_usb2phy_port_irq_init()
1207 ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq, in rockchip_usb2phy_port_irq_init()
1214 dev_err(rphy->dev, in rockchip_usb2phy_port_irq_init()
1215 "failed to request otg-bvalid irq handle\n"); in rockchip_usb2phy_port_irq_init()
1219 rport->id_irq = of_irq_get_byname(child_np, "otg-id"); in rockchip_usb2phy_port_irq_init()
1220 if (rport->id_irq < 0) { in rockchip_usb2phy_port_irq_init()
1221 dev_err(rphy->dev, "no otg-id irq provided\n"); in rockchip_usb2phy_port_irq_init()
1222 ret = rport->id_irq; in rockchip_usb2phy_port_irq_init()
1226 ret = devm_request_threaded_irq(rphy->dev, rport->id_irq, in rockchip_usb2phy_port_irq_init()
1233 dev_err(rphy->dev, in rockchip_usb2phy_port_irq_init()
1234 "failed to request otg-id irq handle\n"); in rockchip_usb2phy_port_irq_init()
1240 return -EINVAL; in rockchip_usb2phy_port_irq_init()
1243 return 0; in rockchip_usb2phy_port_irq_init()
1252 rport->port_id = USB2PHY_PORT_HOST; in rockchip_usb2phy_host_port_init()
1253 rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST]; in rockchip_usb2phy_host_port_init()
1254 rport->suspended = true; in rockchip_usb2phy_host_port_init()
1256 mutex_init(&rport->mutex); in rockchip_usb2phy_host_port_init()
1257 INIT_DELAYED_WORK(&rport->sm_work, rockchip_usb2phy_sm_work); in rockchip_usb2phy_host_port_init()
1261 dev_err(rphy->dev, "failed to setup host irq\n"); in rockchip_usb2phy_host_port_init()
1265 return 0; in rockchip_usb2phy_host_port_init()
1274 schedule_delayed_work(&rport->otg_sm_work, OTG_SCHEDULE_DELAY); in rockchip_otg_event()
1285 rport->port_id = USB2PHY_PORT_OTG; in rockchip_usb2phy_otg_port_init()
1286 rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG]; in rockchip_usb2phy_otg_port_init()
1287 rport->state = OTG_STATE_UNDEFINED; in rockchip_usb2phy_otg_port_init()
1295 rport->suspended = true; in rockchip_usb2phy_otg_port_init()
1296 rport->vbus_attached = false; in rockchip_usb2phy_otg_port_init()
1298 mutex_init(&rport->mutex); in rockchip_usb2phy_otg_port_init()
1300 rport->mode = of_usb_get_dr_mode_by_phy(child_np, -1); in rockchip_usb2phy_otg_port_init()
1301 if (rport->mode == USB_DR_MODE_HOST || in rockchip_usb2phy_otg_port_init()
1302 rport->mode == USB_DR_MODE_UNKNOWN) { in rockchip_usb2phy_otg_port_init()
1303 ret = 0; in rockchip_usb2phy_otg_port_init()
1307 INIT_DELAYED_WORK(&rport->chg_work, rockchip_chg_detect_work); in rockchip_usb2phy_otg_port_init()
1308 INIT_DELAYED_WORK(&rport->otg_sm_work, rockchip_usb2phy_otg_sm_work); in rockchip_usb2phy_otg_port_init()
1312 dev_err(rphy->dev, "failed to init irq for host port\n"); in rockchip_usb2phy_otg_port_init()
1316 if (!IS_ERR(rphy->edev)) { in rockchip_usb2phy_otg_port_init()
1317 rport->event_nb.notifier_call = rockchip_otg_event; in rockchip_usb2phy_otg_port_init()
1319 ret = devm_extcon_register_notifier(rphy->dev, rphy->edev, in rockchip_usb2phy_otg_port_init()
1320 EXTCON_USB_HOST, &rport->event_nb); in rockchip_usb2phy_otg_port_init()
1322 dev_err(rphy->dev, "register USB HOST notifier failed\n"); in rockchip_usb2phy_otg_port_init()
1326 if (!of_property_present(rphy->dev->of_node, "extcon")) { in rockchip_usb2phy_otg_port_init()
1328 id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id); in rockchip_usb2phy_otg_port_init()
1329 extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id); in rockchip_usb2phy_otg_port_init()
1339 struct device *dev = &pdev->dev; in rockchip_usb2phy_probe()
1340 struct device_node *np = dev->of_node; in rockchip_usb2phy_probe()
1346 int index = 0, ret; in rockchip_usb2phy_probe()
1350 return -ENOMEM; in rockchip_usb2phy_probe()
1352 if (!dev->parent || !dev->parent->of_node) { in rockchip_usb2phy_probe()
1353 rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf"); in rockchip_usb2phy_probe()
1354 if (IS_ERR(rphy->grf)) { in rockchip_usb2phy_probe()
1356 return PTR_ERR(rphy->grf); in rockchip_usb2phy_probe()
1359 rphy->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_usb2phy_probe()
1360 if (IS_ERR(rphy->grf)) in rockchip_usb2phy_probe()
1361 return PTR_ERR(rphy->grf); in rockchip_usb2phy_probe()
1364 if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) { in rockchip_usb2phy_probe()
1365 rphy->usbgrf = in rockchip_usb2phy_probe()
1366 syscon_regmap_lookup_by_phandle(dev->of_node, in rockchip_usb2phy_probe()
1368 if (IS_ERR(rphy->usbgrf)) in rockchip_usb2phy_probe()
1369 return PTR_ERR(rphy->usbgrf); in rockchip_usb2phy_probe()
1371 rphy->usbgrf = NULL; in rockchip_usb2phy_probe()
1374 if (of_property_read_u32_index(np, "reg", 0, ®)) { in rockchip_usb2phy_probe()
1376 return -EINVAL; in rockchip_usb2phy_probe()
1380 if (of_property_count_u32_elems(np, "reg") > 2 && reg == 0) { in rockchip_usb2phy_probe()
1381 if (of_property_read_u32_index(np, "reg", 1, ®)) { in rockchip_usb2phy_probe()
1383 return -EINVAL; in rockchip_usb2phy_probe()
1387 rphy->dev = dev; in rockchip_usb2phy_probe()
1389 rphy->chg_state = USB_CHG_STATE_UNDEFINED; in rockchip_usb2phy_probe()
1390 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN; in rockchip_usb2phy_probe()
1391 rphy->irq = platform_get_irq_optional(pdev, 0); in rockchip_usb2phy_probe()
1395 return dev_err_probe(dev, -EINVAL, "phy configs are not assigned!\n"); in rockchip_usb2phy_probe()
1404 rphy->phy_cfg = &phy_cfgs[index]; in rockchip_usb2phy_probe()
1411 if (!rphy->phy_cfg) { in rockchip_usb2phy_probe()
1412 dev_err(dev, "could not find phy config for reg=0x%08x\n", reg); in rockchip_usb2phy_probe()
1413 return -EINVAL; in rockchip_usb2phy_probe()
1416 rphy->phy_reset = devm_reset_control_get_optional(dev, "phy"); in rockchip_usb2phy_probe()
1417 if (IS_ERR(rphy->phy_reset)) in rockchip_usb2phy_probe()
1418 return PTR_ERR(rphy->phy_reset); in rockchip_usb2phy_probe()
1420 ret = devm_clk_bulk_get_all(dev, &rphy->clks); in rockchip_usb2phy_probe()
1421 if (ret == -EPROBE_DEFER) in rockchip_usb2phy_probe()
1422 return dev_err_probe(&pdev->dev, -EPROBE_DEFER, in rockchip_usb2phy_probe()
1426 rphy->num_clks = ret < 0 ? 0 : ret; in rockchip_usb2phy_probe()
1432 ret = clk_bulk_prepare_enable(rphy->num_clks, rphy->clks); in rockchip_usb2phy_probe()
1440 if (rphy->phy_cfg->phy_tuning) { in rockchip_usb2phy_probe()
1441 ret = rphy->phy_cfg->phy_tuning(rphy); in rockchip_usb2phy_probe()
1446 index = 0; in rockchip_usb2phy_probe()
1448 struct rockchip_usb2phy_port *rport = &rphy->ports[index]; in rockchip_usb2phy_probe()
1451 /* This driver aims to support both otg-port and host-port */ in rockchip_usb2phy_probe()
1452 if (!of_node_name_eq(child_np, "host-port") && in rockchip_usb2phy_probe()
1453 !of_node_name_eq(child_np, "otg-port")) in rockchip_usb2phy_probe()
1462 rport->phy = phy; in rockchip_usb2phy_probe()
1463 phy_set_drvdata(rport->phy, rport); in rockchip_usb2phy_probe()
1466 if (of_node_name_eq(child_np, "host-port")) { in rockchip_usb2phy_probe()
1478 if (++index >= rphy->phy_cfg->num_ports) { in rockchip_usb2phy_probe()
1486 if (rphy->irq > 0) { in rockchip_usb2phy_probe()
1487 ret = devm_request_threaded_irq(rphy->dev, rphy->irq, NULL, in rockchip_usb2phy_probe()
1493 dev_err_probe(rphy->dev, ret, "failed to request usb2phy irq handle\n"); in rockchip_usb2phy_probe()
1508 return regmap_write_bits(rphy->grf, 0x298, in rk3128_usb2phy_tuning()
1510 BIT(2) << BIT_WRITEABLE_SHIFT | 0); in rk3128_usb2phy_tuning()
1516 u32 reg = rphy->phy_cfg->reg; in rk3576_usb2phy_tuning()
1519 ret = regmap_write(rphy->grf, reg + 0x0010, GENMASK(29, 29) | 0x0000); in rk3576_usb2phy_tuning()
1529 ret |= regmap_write(rphy->grf, reg + 0x000c, GENMASK(27, 24) | 0x0900); in rk3576_usb2phy_tuning()
1531 /* HS Transmitter Pre-Emphasis Current Control 2'b10 : 2x */ in rk3576_usb2phy_tuning()
1532 ret |= regmap_write(rphy->grf, reg + 0x0010, GENMASK(20, 19) | 0x0010); in rk3576_usb2phy_tuning()
1542 * utmi_termselect = 1'b1 (en FS terminations) in rk3588_usb2phy_tuning()
1545 int suspend_cfg = 0x14; in rk3588_usb2phy_tuning()
1547 if (rphy->phy_cfg->reg == 0x0000 || rphy->phy_cfg->reg == 0x4000) { in rk3588_usb2phy_tuning()
1549 suspend_cfg |= 0x01; /* utmi_opmode = 2'b01 (no-driving) */ in rk3588_usb2phy_tuning()
1551 } else if (rphy->phy_cfg->reg == 0x8000 || rphy->phy_cfg->reg == 0xc000) { in rk3588_usb2phy_tuning()
1553 suspend_cfg |= 0x00; /* utmi_opmode = 2'b00 (normal) */ in rk3588_usb2phy_tuning()
1555 return -EINVAL; in rk3588_usb2phy_tuning()
1559 ret = regmap_write(rphy->grf, 0x0008, GENMASK(29, 29) | 0x0000); in rk3588_usb2phy_tuning()
1569 ret |= regmap_write(rphy->grf, 0x000c, GENMASK(20, 16) | suspend_cfg); in rk3588_usb2phy_tuning()
1572 ret |= regmap_write(rphy->grf, 0x0004, GENMASK(27, 24) | 0x0900); in rk3588_usb2phy_tuning()
1574 /* HS Transmitter Pre-Emphasis Current Control 2'b10 : 2x */ in rk3588_usb2phy_tuning()
1575 ret |= regmap_write(rphy->grf, 0x0008, GENMASK(20, 19) | 0x0010); in rk3588_usb2phy_tuning()
1581 ret |= regmap_write(rphy->grf, 0x0010, GENMASK(17, 16) | 0x0003); in rk3588_usb2phy_tuning()
1588 .reg = 0x17c,
1591 .clkout_ctl = { 0x017c, 11, 11, 1, 0 },
1594 .phy_sus = { 0x017c, 8, 0, 0, 0x1d1 },
1595 .bvalid_det_en = { 0x017c, 14, 14, 0, 1 },
1596 .bvalid_det_st = { 0x017c, 15, 15, 0, 1 },
1597 .bvalid_det_clr = { 0x017c, 15, 15, 0, 1 },
1598 .ls_det_en = { 0x017c, 12, 12, 0, 1 },
1599 .ls_det_st = { 0x017c, 13, 13, 0, 1 },
1600 .ls_det_clr = { 0x017c, 13, 13, 0, 1 },
1601 .utmi_bvalid = { 0x014c, 8, 8, 0, 1 },
1602 .utmi_id = { 0x014c, 11, 11, 0, 1 },
1603 .utmi_ls = { 0x014c, 10, 9, 0, 1 },
1607 .phy_sus = { 0x0194, 8, 0, 0, 0x1d1 },
1608 .ls_det_en = { 0x0194, 14, 14, 0, 1 },
1609 .ls_det_st = { 0x0194, 15, 15, 0, 1 },
1610 .ls_det_clr = { 0x0194, 15, 15, 0, 1 }
1619 .reg = 0x17c,
1622 .clkout_ctl = { 0x0190, 15, 15, 1, 0 },
1625 .phy_sus = { 0x017c, 8, 0, 0, 0x1d1 },
1626 .bvalid_det_en = { 0x017c, 14, 14, 0, 1 },
1627 .bvalid_det_st = { 0x017c, 15, 15, 0, 1 },
1628 .bvalid_det_clr = { 0x017c, 15, 15, 0, 1 },
1629 .idfall_det_en = { 0x01a0, 2, 2, 0, 1 },
1630 .idfall_det_st = { 0x01a0, 3, 3, 0, 1 },
1631 .idfall_det_clr = { 0x01a0, 3, 3, 0, 1 },
1632 .idrise_det_en = { 0x01a0, 0, 0, 0, 1 },
1633 .idrise_det_st = { 0x01a0, 1, 1, 0, 1 },
1634 .idrise_det_clr = { 0x01a0, 1, 1, 0, 1 },
1635 .ls_det_en = { 0x017c, 12, 12, 0, 1 },
1636 .ls_det_st = { 0x017c, 13, 13, 0, 1 },
1637 .ls_det_clr = { 0x017c, 13, 13, 0, 1 },
1638 .utmi_bvalid = { 0x014c, 5, 5, 0, 1 },
1639 .utmi_id = { 0x014c, 8, 8, 0, 1 },
1640 .utmi_ls = { 0x014c, 7, 6, 0, 1 },
1643 .phy_sus = { 0x0194, 8, 0, 0, 0x1d1 },
1644 .ls_det_en = { 0x0194, 14, 14, 0, 1 },
1645 .ls_det_st = { 0x0194, 15, 15, 0, 1 },
1646 .ls_det_clr = { 0x0194, 15, 15, 0, 1 }
1650 .opmode = { 0x017c, 3, 0, 5, 1 },
1651 .cp_det = { 0x02c0, 6, 6, 0, 1 },
1652 .dcp_det = { 0x02c0, 5, 5, 0, 1 },
1653 .dp_det = { 0x02c0, 7, 7, 0, 1 },
1654 .idm_sink_en = { 0x0184, 8, 8, 0, 1 },
1655 .idp_sink_en = { 0x0184, 7, 7, 0, 1 },
1656 .idp_src_en = { 0x0184, 9, 9, 0, 1 },
1657 .rdm_pdwn_en = { 0x0184, 10, 10, 0, 1 },
1658 .vdm_src_en = { 0x0184, 12, 12, 0, 1 },
1659 .vdp_src_en = { 0x0184, 11, 11, 0, 1 },
1667 .reg = 0x760,
1669 .clkout_ctl = { 0x0768, 4, 4, 1, 0 },
1672 .phy_sus = { 0x0760, 15, 0, 0, 0x1d1 },
1673 .bvalid_det_en = { 0x0680, 3, 3, 0, 1 },
1674 .bvalid_det_st = { 0x0690, 3, 3, 0, 1 },
1675 .bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
1676 .idfall_det_en = { 0x0680, 6, 6, 0, 1 },
1677 .idfall_det_st = { 0x0690, 6, 6, 0, 1 },
1678 .idfall_det_clr = { 0x06a0, 6, 6, 0, 1 },
1679 .idrise_det_en = { 0x0680, 5, 5, 0, 1 },
1680 .idrise_det_st = { 0x0690, 5, 5, 0, 1 },
1681 .idrise_det_clr = { 0x06a0, 5, 5, 0, 1 },
1682 .ls_det_en = { 0x0680, 2, 2, 0, 1 },
1683 .ls_det_st = { 0x0690, 2, 2, 0, 1 },
1684 .ls_det_clr = { 0x06a0, 2, 2, 0, 1 },
1685 .utmi_bvalid = { 0x0480, 4, 4, 0, 1 },
1686 .utmi_id = { 0x0480, 1, 1, 0, 1 },
1687 .utmi_ls = { 0x0480, 3, 2, 0, 1 },
1690 .phy_sus = { 0x0764, 15, 0, 0, 0x1d1 },
1691 .ls_det_en = { 0x0680, 4, 4, 0, 1 },
1692 .ls_det_st = { 0x0690, 4, 4, 0, 1 },
1693 .ls_det_clr = { 0x06a0, 4, 4, 0, 1 }
1697 .opmode = { 0x0760, 3, 0, 5, 1 },
1698 .cp_det = { 0x0884, 4, 4, 0, 1 },
1699 .dcp_det = { 0x0884, 3, 3, 0, 1 },
1700 .dp_det = { 0x0884, 5, 5, 0, 1 },
1701 .idm_sink_en = { 0x0768, 8, 8, 0, 1 },
1702 .idp_sink_en = { 0x0768, 7, 7, 0, 1 },
1703 .idp_src_en = { 0x0768, 9, 9, 0, 1 },
1704 .rdm_pdwn_en = { 0x0768, 10, 10, 0, 1 },
1705 .vdm_src_en = { 0x0768, 12, 12, 0, 1 },
1706 .vdp_src_en = { 0x0768, 11, 11, 0, 1 },
1710 .reg = 0x800,
1712 .clkout_ctl = { 0x0808, 4, 4, 1, 0 },
1715 .phy_sus = { 0x800, 15, 0, 0, 0x1d1 },
1716 .ls_det_en = { 0x0684, 0, 0, 0, 1 },
1717 .ls_det_st = { 0x0694, 0, 0, 0, 1 },
1718 .ls_det_clr = { 0x06a4, 0, 0, 0, 1 }
1721 .phy_sus = { 0x804, 15, 0, 0, 0x1d1 },
1722 .ls_det_en = { 0x0684, 1, 1, 0, 1 },
1723 .ls_det_st = { 0x0694, 1, 1, 0, 1 },
1724 .ls_det_clr = { 0x06a4, 1, 1, 0, 1 }
1733 .reg = 0x100,
1735 .clkout_ctl = { 0x108, 4, 4, 1, 0 },
1738 .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
1739 .bvalid_det_en = { 0x3020, 3, 2, 0, 3 },
1740 .bvalid_det_st = { 0x3024, 3, 2, 0, 3 },
1741 .bvalid_det_clr = { 0x3028, 3, 2, 0, 3 },
1742 .idfall_det_en = { 0x3020, 5, 5, 0, 1 },
1743 .idfall_det_st = { 0x3024, 5, 5, 0, 1 },
1744 .idfall_det_clr = { 0x3028, 5, 5, 0, 1 },
1745 .idrise_det_en = { 0x3020, 4, 4, 0, 1 },
1746 .idrise_det_st = { 0x3024, 4, 4, 0, 1 },
1747 .idrise_det_clr = { 0x3028, 4, 4, 0, 1 },
1748 .ls_det_en = { 0x3020, 0, 0, 0, 1 },
1749 .ls_det_st = { 0x3024, 0, 0, 0, 1 },
1750 .ls_det_clr = { 0x3028, 0, 0, 0, 1 },
1751 .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
1752 .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
1753 .utmi_id = { 0x0120, 6, 6, 0, 1 },
1754 .utmi_ls = { 0x0120, 5, 4, 0, 1 },
1757 .phy_sus = { 0x0104, 8, 0, 0, 0x1d1 },
1758 .ls_det_en = { 0x3020, 1, 1, 0, 1 },
1759 .ls_det_st = { 0x3024, 1, 1, 0, 1 },
1760 .ls_det_clr = { 0x3028, 1, 1, 0, 1 },
1761 .utmi_ls = { 0x0120, 17, 16, 0, 1 },
1762 .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
1766 .opmode = { 0x0100, 3, 0, 5, 1 },
1767 .cp_det = { 0x0120, 24, 24, 0, 1 },
1768 .dcp_det = { 0x0120, 23, 23, 0, 1 },
1769 .dp_det = { 0x0120, 25, 25, 0, 1 },
1770 .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
1771 .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
1772 .idp_src_en = { 0x0108, 9, 9, 0, 1 },
1773 .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
1774 .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
1775 .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
1783 .reg = 0x100,
1785 .clkout_ctl = { 0x108, 4, 4, 1, 0 },
1788 .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 },
1789 .bvalid_det_en = { 0x0110, 3, 2, 0, 3 },
1790 .bvalid_det_st = { 0x0114, 3, 2, 0, 3 },
1791 .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 },
1792 .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
1793 .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
1794 .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
1795 .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
1796 .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
1797 .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
1798 .ls_det_en = { 0x0110, 0, 0, 0, 1 },
1799 .ls_det_st = { 0x0114, 0, 0, 0, 1 },
1800 .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
1801 .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
1802 .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
1803 .utmi_id = { 0x0120, 6, 6, 0, 1 },
1804 .utmi_ls = { 0x0120, 5, 4, 0, 1 },
1807 .phy_sus = { 0x104, 15, 0, 0, 0x1d1 },
1808 .ls_det_en = { 0x110, 1, 1, 0, 1 },
1809 .ls_det_st = { 0x114, 1, 1, 0, 1 },
1810 .ls_det_clr = { 0x118, 1, 1, 0, 1 },
1811 .utmi_ls = { 0x120, 17, 16, 0, 1 },
1812 .utmi_hstdet = { 0x120, 19, 19, 0, 1 }
1816 .opmode = { 0x0100, 3, 0, 5, 1 },
1817 .cp_det = { 0x0120, 24, 24, 0, 1 },
1818 .dcp_det = { 0x0120, 23, 23, 0, 1 },
1819 .dp_det = { 0x0120, 25, 25, 0, 1 },
1820 .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
1821 .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
1822 .idp_src_en = { 0x0108, 9, 9, 0, 1 },
1823 .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
1824 .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
1825 .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
1833 .reg = 0x700,
1835 .clkout_ctl = { 0x0724, 15, 15, 1, 0 },
1838 .phy_sus = { 0x0728, 15, 0, 0, 0x1d1 },
1839 .ls_det_en = { 0x0680, 4, 4, 0, 1 },
1840 .ls_det_st = { 0x0690, 4, 4, 0, 1 },
1841 .ls_det_clr = { 0x06a0, 4, 4, 0, 1 },
1842 .utmi_ls = { 0x049c, 14, 13, 0, 1 },
1843 .utmi_hstdet = { 0x049c, 12, 12, 0, 1 }
1852 .reg = 0xe450,
1854 .clkout_ctl = { 0xe450, 4, 4, 1, 0 },
1857 .phy_sus = { 0xe454, 1, 0, 2, 1 },
1858 .bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 },
1859 .bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 },
1860 .bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 },
1861 .idfall_det_en = { 0xe3c0, 5, 5, 0, 1 },
1862 .idfall_det_st = { 0xe3e0, 5, 5, 0, 1 },
1863 .idfall_det_clr = { 0xe3d0, 5, 5, 0, 1 },
1864 .idrise_det_en = { 0xe3c0, 4, 4, 0, 1 },
1865 .idrise_det_st = { 0xe3e0, 4, 4, 0, 1 },
1866 .idrise_det_clr = { 0xe3d0, 4, 4, 0, 1 },
1867 .utmi_avalid = { 0xe2ac, 7, 7, 0, 1 },
1868 .utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 },
1869 .utmi_id = { 0xe2ac, 8, 8, 0, 1 },
1872 .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 },
1873 .ls_det_en = { 0xe3c0, 6, 6, 0, 1 },
1874 .ls_det_st = { 0xe3e0, 6, 6, 0, 1 },
1875 .ls_det_clr = { 0xe3d0, 6, 6, 0, 1 },
1876 .utmi_ls = { 0xe2ac, 22, 21, 0, 1 },
1877 .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 }
1881 .opmode = { 0xe454, 3, 0, 5, 1 },
1882 .cp_det = { 0xe2ac, 2, 2, 0, 1 },
1883 .dcp_det = { 0xe2ac, 1, 1, 0, 1 },
1884 .dp_det = { 0xe2ac, 0, 0, 0, 1 },
1885 .idm_sink_en = { 0xe450, 8, 8, 0, 1 },
1886 .idp_sink_en = { 0xe450, 7, 7, 0, 1 },
1887 .idp_src_en = { 0xe450, 9, 9, 0, 1 },
1888 .rdm_pdwn_en = { 0xe450, 10, 10, 0, 1 },
1889 .vdm_src_en = { 0xe450, 12, 12, 0, 1 },
1890 .vdp_src_en = { 0xe450, 11, 11, 0, 1 },
1894 .reg = 0xe460,
1896 .clkout_ctl = { 0xe460, 4, 4, 1, 0 },
1899 .phy_sus = { 0xe464, 1, 0, 2, 1 },
1900 .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 },
1901 .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 },
1902 .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
1903 .idfall_det_en = { 0xe3c0, 10, 10, 0, 1 },
1904 .idfall_det_st = { 0xe3e0, 10, 10, 0, 1 },
1905 .idfall_det_clr = { 0xe3d0, 10, 10, 0, 1 },
1906 .idrise_det_en = { 0xe3c0, 9, 9, 0, 1 },
1907 .idrise_det_st = { 0xe3e0, 9, 9, 0, 1 },
1908 .idrise_det_clr = { 0xe3d0, 9, 9, 0, 1 },
1909 .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 },
1910 .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 },
1911 .utmi_id = { 0xe2ac, 11, 11, 0, 1 },
1914 .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 },
1915 .ls_det_en = { 0xe3c0, 11, 11, 0, 1 },
1916 .ls_det_st = { 0xe3e0, 11, 11, 0, 1 },
1917 .ls_det_clr = { 0xe3d0, 11, 11, 0, 1 },
1918 .utmi_ls = { 0xe2ac, 26, 25, 0, 1 },
1919 .utmi_hstdet = { 0xe2ac, 27, 27, 0, 1 }
1928 .reg = 0xff740000,
1930 .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
1933 .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
1934 .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
1935 .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
1936 .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
1937 .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
1938 .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
1939 .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
1940 .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
1941 .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
1942 .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
1943 .ls_det_en = { 0x0110, 0, 0, 0, 1 },
1944 .ls_det_st = { 0x0114, 0, 0, 0, 1 },
1945 .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
1946 .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
1947 .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
1948 .utmi_ls = { 0x0120, 5, 4, 0, 1 },
1951 .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
1952 .ls_det_en = { 0x0110, 1, 1, 0, 1 },
1953 .ls_det_st = { 0x0114, 1, 1, 0, 1 },
1954 .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
1955 .utmi_ls = { 0x0120, 17, 16, 0, 1 },
1956 .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
1960 .cp_det = { 0x0120, 24, 24, 0, 1 },
1961 .dcp_det = { 0x0120, 23, 23, 0, 1 },
1962 .dp_det = { 0x0120, 25, 25, 0, 1 },
1963 .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
1964 .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
1965 .idp_src_en = { 0x0108, 9, 9, 0, 1 },
1966 .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
1967 .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
1968 .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
1976 .reg = 0xfe8a0000,
1978 .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
1981 .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
1982 .bvalid_det_en = { 0x0080, 3, 2, 0, 3 },
1983 .bvalid_det_st = { 0x0084, 3, 2, 0, 3 },
1984 .bvalid_det_clr = { 0x0088, 3, 2, 0, 3 },
1985 .idfall_det_en = { 0x0080, 5, 5, 0, 1 },
1986 .idfall_det_st = { 0x0084, 5, 5, 0, 1 },
1987 .idfall_det_clr = { 0x0088, 5, 5, 0, 1 },
1988 .idrise_det_en = { 0x0080, 4, 4, 0, 1 },
1989 .idrise_det_st = { 0x0084, 4, 4, 0, 1 },
1990 .idrise_det_clr = { 0x0088, 4, 4, 0, 1 },
1991 .utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
1992 .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
1993 .utmi_id = { 0x00c0, 6, 6, 0, 1 },
1997 .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d2 },
1998 .ls_det_en = { 0x0080, 1, 1, 0, 1 },
1999 .ls_det_st = { 0x0084, 1, 1, 0, 1 },
2000 .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
2001 .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
2002 .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
2006 .opmode = { 0x0000, 3, 0, 5, 1 },
2007 .cp_det = { 0x00c0, 24, 24, 0, 1 },
2008 .dcp_det = { 0x00c0, 23, 23, 0, 1 },
2009 .dp_det = { 0x00c0, 25, 25, 0, 1 },
2010 .idm_sink_en = { 0x0008, 8, 8, 0, 1 },
2011 .idp_sink_en = { 0x0008, 7, 7, 0, 1 },
2012 .idp_src_en = { 0x0008, 9, 9, 0, 1 },
2013 .rdm_pdwn_en = { 0x0008, 10, 10, 0, 1 },
2014 .vdm_src_en = { 0x0008, 12, 12, 0, 1 },
2015 .vdp_src_en = { 0x0008, 11, 11, 0, 1 },
2019 .reg = 0xfe8b0000,
2021 .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
2024 .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 },
2025 .ls_det_en = { 0x0080, 0, 0, 0, 1 },
2026 .ls_det_st = { 0x0084, 0, 0, 0, 1 },
2027 .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
2028 .utmi_ls = { 0x00c0, 5, 4, 0, 1 },
2029 .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
2032 .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 },
2033 .ls_det_en = { 0x0080, 1, 1, 0, 1 },
2034 .ls_det_st = { 0x0084, 1, 1, 0, 1 },
2035 .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
2036 .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
2037 .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
2046 .reg = 0x0,
2047 .num_ports = 1,
2049 .clkout_ctl = { 0x0008, 0, 0, 1, 0 },
2052 .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
2053 .bvalid_det_en = { 0x00c0, 1, 1, 0, 1 },
2054 .bvalid_det_st = { 0x00c4, 1, 1, 0, 1 },
2055 .bvalid_det_clr = { 0x00c8, 1, 1, 0, 1 },
2056 .ls_det_en = { 0x00c0, 0, 0, 0, 1 },
2057 .ls_det_st = { 0x00c4, 0, 0, 0, 1 },
2058 .ls_det_clr = { 0x00c8, 0, 0, 0, 1 },
2059 .disfall_en = { 0x00c0, 6, 6, 0, 1 },
2060 .disfall_st = { 0x00c4, 6, 6, 0, 1 },
2061 .disfall_clr = { 0x00c8, 6, 6, 0, 1 },
2062 .disrise_en = { 0x00c0, 5, 5, 0, 1 },
2063 .disrise_st = { 0x00c4, 5, 5, 0, 1 },
2064 .disrise_clr = { 0x00c8, 5, 5, 0, 1 },
2065 .utmi_avalid = { 0x0080, 1, 1, 0, 1 },
2066 .utmi_bvalid = { 0x0080, 0, 0, 0, 1 },
2067 .utmi_ls = { 0x0080, 5, 4, 0, 1 },
2071 .cp_det = { 0x0080, 8, 8, 0, 1 },
2072 .dcp_det = { 0x0080, 8, 8, 0, 1 },
2073 .dp_det = { 0x0080, 9, 9, 1, 0 },
2074 .idm_sink_en = { 0x0010, 5, 5, 1, 0 },
2075 .idp_sink_en = { 0x0010, 5, 5, 0, 1 },
2076 .idp_src_en = { 0x0010, 14, 14, 0, 1 },
2077 .rdm_pdwn_en = { 0x0010, 14, 14, 0, 1 },
2078 .vdm_src_en = { 0x0010, 7, 6, 0, 3 },
2079 .vdp_src_en = { 0x0010, 7, 6, 0, 3 },
2083 .reg = 0x2000,
2084 .num_ports = 1,
2086 .clkout_ctl = { 0x2008, 0, 0, 1, 0 },
2089 .phy_sus = { 0x2000, 8, 0, 0, 0x1d1 },
2090 .bvalid_det_en = { 0x20c0, 1, 1, 0, 1 },
2091 .bvalid_det_st = { 0x20c4, 1, 1, 0, 1 },
2092 .bvalid_det_clr = { 0x20c8, 1, 1, 0, 1 },
2093 .ls_det_en = { 0x20c0, 0, 0, 0, 1 },
2094 .ls_det_st = { 0x20c4, 0, 0, 0, 1 },
2095 .ls_det_clr = { 0x20c8, 0, 0, 0, 1 },
2096 .disfall_en = { 0x20c0, 6, 6, 0, 1 },
2097 .disfall_st = { 0x20c4, 6, 6, 0, 1 },
2098 .disfall_clr = { 0x20c8, 6, 6, 0, 1 },
2099 .disrise_en = { 0x20c0, 5, 5, 0, 1 },
2100 .disrise_st = { 0x20c4, 5, 5, 0, 1 },
2101 .disrise_clr = { 0x20c8, 5, 5, 0, 1 },
2102 .utmi_avalid = { 0x2080, 1, 1, 0, 1 },
2103 .utmi_bvalid = { 0x2080, 0, 0, 0, 1 },
2104 .utmi_ls = { 0x2080, 5, 4, 0, 1 },
2108 .cp_det = { 0x2080, 8, 8, 0, 1 },
2109 .dcp_det = { 0x2080, 8, 8, 0, 1 },
2110 .dp_det = { 0x2080, 9, 9, 1, 0 },
2111 .idm_sink_en = { 0x2010, 5, 5, 1, 0 },
2112 .idp_sink_en = { 0x2010, 5, 5, 0, 1 },
2113 .idp_src_en = { 0x2010, 14, 14, 0, 1 },
2114 .rdm_pdwn_en = { 0x2010, 14, 14, 0, 1 },
2115 .vdm_src_en = { 0x2010, 7, 6, 0, 3 },
2116 .vdp_src_en = { 0x2010, 7, 6, 0, 3 },
2124 .reg = 0x0000,
2125 .num_ports = 1,
2127 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
2130 .phy_sus = { 0x000c, 11, 11, 0, 1 },
2131 .bvalid_det_en = { 0x0080, 1, 1, 0, 1 },
2132 .bvalid_det_st = { 0x0084, 1, 1, 0, 1 },
2133 .bvalid_det_clr = { 0x0088, 1, 1, 0, 1 },
2134 .ls_det_en = { 0x0080, 0, 0, 0, 1 },
2135 .ls_det_st = { 0x0084, 0, 0, 0, 1 },
2136 .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
2137 .disfall_en = { 0x0080, 6, 6, 0, 1 },
2138 .disfall_st = { 0x0084, 6, 6, 0, 1 },
2139 .disfall_clr = { 0x0088, 6, 6, 0, 1 },
2140 .disrise_en = { 0x0080, 5, 5, 0, 1 },
2141 .disrise_st = { 0x0084, 5, 5, 0, 1 },
2142 .disrise_clr = { 0x0088, 5, 5, 0, 1 },
2143 .utmi_avalid = { 0x00c0, 7, 7, 0, 1 },
2144 .utmi_bvalid = { 0x00c0, 6, 6, 0, 1 },
2145 .utmi_ls = { 0x00c0, 10, 9, 0, 1 },
2149 .cp_det = { 0x00c0, 0, 0, 0, 1 },
2150 .dcp_det = { 0x00c0, 0, 0, 0, 1 },
2151 .dp_det = { 0x00c0, 1, 1, 1, 0 },
2152 .idm_sink_en = { 0x0008, 5, 5, 1, 0 },
2153 .idp_sink_en = { 0x0008, 5, 5, 0, 1 },
2154 .idp_src_en = { 0x0008, 14, 14, 0, 1 },
2155 .rdm_pdwn_en = { 0x0008, 14, 14, 0, 1 },
2156 .vdm_src_en = { 0x0008, 7, 6, 0, 3 },
2157 .vdp_src_en = { 0x0008, 7, 6, 0, 3 },
2161 .reg = 0x4000,
2162 .num_ports = 1,
2164 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
2167 .phy_sus = { 0x000c, 11, 11, 0, 1 },
2168 .bvalid_det_en = { 0x0080, 1, 1, 0, 1 },
2169 .bvalid_det_st = { 0x0084, 1, 1, 0, 1 },
2170 .bvalid_det_clr = { 0x0088, 1, 1, 0, 1 },
2171 .ls_det_en = { 0x0080, 0, 0, 0, 1 },
2172 .ls_det_st = { 0x0084, 0, 0, 0, 1 },
2173 .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
2174 .disfall_en = { 0x0080, 6, 6, 0, 1 },
2175 .disfall_st = { 0x0084, 6, 6, 0, 1 },
2176 .disfall_clr = { 0x0088, 6, 6, 0, 1 },
2177 .disrise_en = { 0x0080, 5, 5, 0, 1 },
2178 .disrise_st = { 0x0084, 5, 5, 0, 1 },
2179 .disrise_clr = { 0x0088, 5, 5, 0, 1 },
2180 .utmi_avalid = { 0x00c0, 7, 7, 0, 1 },
2181 .utmi_bvalid = { 0x00c0, 6, 6, 0, 1 },
2182 .utmi_ls = { 0x00c0, 10, 9, 0, 1 },
2186 .cp_det = { 0x00c0, 0, 0, 0, 1 },
2187 .dcp_det = { 0x00c0, 0, 0, 0, 1 },
2188 .dp_det = { 0x00c0, 1, 1, 1, 0 },
2189 .idm_sink_en = { 0x0008, 5, 5, 1, 0 },
2190 .idp_sink_en = { 0x0008, 5, 5, 0, 1 },
2191 .idp_src_en = { 0x0008, 14, 14, 0, 1 },
2192 .rdm_pdwn_en = { 0x0008, 14, 14, 0, 1 },
2193 .vdm_src_en = { 0x0008, 7, 6, 0, 3 },
2194 .vdp_src_en = { 0x0008, 7, 6, 0, 3 },
2198 .reg = 0x8000,
2199 .num_ports = 1,
2201 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
2204 .phy_sus = { 0x0008, 2, 2, 0, 1 },
2205 .ls_det_en = { 0x0080, 0, 0, 0, 1 },
2206 .ls_det_st = { 0x0084, 0, 0, 0, 1 },
2207 .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
2208 .disfall_en = { 0x0080, 6, 6, 0, 1 },
2209 .disfall_st = { 0x0084, 6, 6, 0, 1 },
2210 .disfall_clr = { 0x0088, 6, 6, 0, 1 },
2211 .disrise_en = { 0x0080, 5, 5, 0, 1 },
2212 .disrise_st = { 0x0084, 5, 5, 0, 1 },
2213 .disrise_clr = { 0x0088, 5, 5, 0, 1 },
2214 .utmi_ls = { 0x00c0, 10, 9, 0, 1 },
2219 .reg = 0xc000,
2220 .num_ports = 1,
2222 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
2225 .phy_sus = { 0x0008, 2, 2, 0, 1 },
2226 .ls_det_en = { 0x0080, 0, 0, 0, 1 },
2227 .ls_det_st = { 0x0084, 0, 0, 0, 1 },
2228 .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
2229 .disfall_en = { 0x0080, 6, 6, 0, 1 },
2230 .disfall_st = { 0x0084, 6, 6, 0, 1 },
2231 .disfall_clr = { 0x0088, 6, 6, 0, 1 },
2232 .disrise_en = { 0x0080, 5, 5, 0, 1 },
2233 .disrise_st = { 0x0084, 5, 5, 0, 1 },
2234 .disrise_clr = { 0x0088, 5, 5, 0, 1 },
2235 .utmi_ls = { 0x00c0, 10, 9, 0, 1 },
2244 .reg = 0x100,
2246 .clkout_ctl = { 0x108, 4, 4, 1, 0 },
2249 .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 },
2250 .bvalid_det_en = { 0x0680, 3, 3, 0, 1 },
2251 .bvalid_det_st = { 0x0690, 3, 3, 0, 1 },
2252 .bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
2253 .ls_det_en = { 0x0680, 2, 2, 0, 1 },
2254 .ls_det_st = { 0x0690, 2, 2, 0, 1 },
2255 .ls_det_clr = { 0x06a0, 2, 2, 0, 1 },
2256 .utmi_bvalid = { 0x0804, 10, 10, 0, 1 },
2257 .utmi_ls = { 0x0804, 13, 12, 0, 1 },
2260 .phy_sus = { 0x0104, 15, 0, 0, 0x1d1 },
2261 .ls_det_en = { 0x0680, 4, 4, 0, 1 },
2262 .ls_det_st = { 0x0690, 4, 4, 0, 1 },
2263 .ls_det_clr = { 0x06a0, 4, 4, 0, 1 },
2264 .utmi_ls = { 0x0804, 9, 8, 0, 1 },
2265 .utmi_hstdet = { 0x0804, 7, 7, 0, 1 }
2269 .opmode = { 0x0100, 3, 0, 5, 1 },
2270 .cp_det = { 0x0804, 1, 1, 0, 1 },
2271 .dcp_det = { 0x0804, 0, 0, 0, 1 },
2272 .dp_det = { 0x0804, 2, 2, 0, 1 },
2273 .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
2274 .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
2275 .idp_src_en = { 0x0108, 9, 9, 0, 1 },
2276 .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
2277 .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
2278 .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
2285 { .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
2286 { .compatible = "rockchip,rk3036-usb2phy", .data = &rk3036_phy_cfgs },
2287 { .compatible = "rockchip,rk3128-usb2phy", .data = &rk3128_phy_cfgs },
2288 { .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
2289 { .compatible = "rockchip,rk3308-usb2phy", .data = &rk3308_phy_cfgs },
2290 { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
2291 { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
2292 { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
2293 { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
2294 { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
2295 { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
2296 { .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
2297 { .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
2305 .name = "rockchip-usb2phy",
2311 MODULE_AUTHOR("Frank Wang <frank.wang@rock-chips.com>");
2312 MODULE_DESCRIPTION("Rockchip USB2.0 PHY driver");