1 // SPDX-License-Identifier: GPL-2.0-only
3  * Rockchip DP PHY driver
5  * Copyright (C) 2016 FuZhou Rockchip Co., Ltd.
6  * Author: Yakir Yang <ykk@@rock-chips.com>
13 #include <linux/phy/phy.h>
32 static int rockchip_set_phy_state(struct phy *phy, bool enable)  in rockchip_set_phy_state()  argument
34 	struct rockchip_dp_phy *dp = phy_get_drvdata(phy);  in rockchip_set_phy_state()  local
38 		ret = regmap_write(dp->grf, GRF_SOC_CON12,  in rockchip_set_phy_state()
42 			dev_err(dp->dev, "Can't enable PHY power %d\n", ret);  in rockchip_set_phy_state()
46 		ret = clk_prepare_enable(dp->phy_24m);  in rockchip_set_phy_state()
48 		clk_disable_unprepare(dp->phy_24m);  in rockchip_set_phy_state()
50 		ret = regmap_write(dp->grf, GRF_SOC_CON12,  in rockchip_set_phy_state()
58 static int rockchip_dp_phy_power_on(struct phy *phy)  in rockchip_dp_phy_power_on()  argument
60 	return rockchip_set_phy_state(phy, true);  in rockchip_dp_phy_power_on()
63 static int rockchip_dp_phy_power_off(struct phy *phy)  in rockchip_dp_phy_power_off()  argument
65 	return rockchip_set_phy_state(phy, false);  in rockchip_dp_phy_power_off()
76 	struct device *dev = &pdev->dev;  in rockchip_dp_phy_probe()
77 	struct device_node *np = dev->of_node;  in rockchip_dp_phy_probe()
79 	struct rockchip_dp_phy *dp;  in rockchip_dp_phy_probe()  local
80 	struct phy *phy;  in rockchip_dp_phy_probe()  local
84 		return -ENODEV;  in rockchip_dp_phy_probe()
86 	if (!dev->parent || !dev->parent->of_node)  in rockchip_dp_phy_probe()
87 		return -ENODEV;  in rockchip_dp_phy_probe()
89 	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);  in rockchip_dp_phy_probe()
90 	if (!dp)  in rockchip_dp_phy_probe()
91 		return -ENOMEM;  in rockchip_dp_phy_probe()
93 	dp->dev = dev;  in rockchip_dp_phy_probe()
95 	dp->phy_24m = devm_clk_get(dev, "24m");  in rockchip_dp_phy_probe()
96 	if (IS_ERR(dp->phy_24m)) {  in rockchip_dp_phy_probe()
98 		return PTR_ERR(dp->phy_24m);  in rockchip_dp_phy_probe()
101 	ret = clk_set_rate(dp->phy_24m, 24000000);  in rockchip_dp_phy_probe()
103 		dev_err(dp->dev, "cannot set clock phy_24m %d\n", ret);  in rockchip_dp_phy_probe()
107 	dp->grf = syscon_node_to_regmap(dev->parent->of_node);  in rockchip_dp_phy_probe()
108 	if (IS_ERR(dp->grf)) {  in rockchip_dp_phy_probe()
109 		dev_err(dev, "rk3288-dp needs the General Register Files syscon\n");  in rockchip_dp_phy_probe()
110 		return PTR_ERR(dp->grf);  in rockchip_dp_phy_probe()
113 	ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER |  in rockchip_dp_phy_probe()
116 		dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret);  in rockchip_dp_phy_probe()
120 	phy = devm_phy_create(dev, np, &rockchip_dp_phy_ops);  in rockchip_dp_phy_probe()
121 	if (IS_ERR(phy)) {  in rockchip_dp_phy_probe()
122 		dev_err(dev, "failed to create phy\n");  in rockchip_dp_phy_probe()
123 		return PTR_ERR(phy);  in rockchip_dp_phy_probe()
125 	phy_set_drvdata(phy, dp);  in rockchip_dp_phy_probe()
133 	{ .compatible = "rockchip,rk3288-dp-phy" },
142 		.name	= "rockchip-dp-phy",
149 MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
150 MODULE_DESCRIPTION("Rockchip DP PHY driver");