Lines Matching +full:0 +full:x170
10 #define QSERDES_PLL_BG_TIMER 0x00c
11 #define QSERDES_PLL_SSC_EN_CENTER 0x010
12 #define QSERDES_PLL_SSC_ADJ_PER1 0x014
13 #define QSERDES_PLL_SSC_ADJ_PER2 0x018
14 #define QSERDES_PLL_SSC_PER1 0x01c
15 #define QSERDES_PLL_SSC_PER2 0x020
16 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024
17 #define QSERDES_PLL_SSC_STEP_SIZE2_MODE0 0x028
18 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE1 0x02c
19 #define QSERDES_PLL_SSC_STEP_SIZE2_MODE1 0x030
20 #define QSERDES_PLL_BIAS_EN_CLKBUFLR_EN 0x03c
21 #define QSERDES_PLL_CLK_ENABLE1 0x040
22 #define QSERDES_PLL_SYS_CLK_CTRL 0x044
23 #define QSERDES_PLL_SYSCLK_BUF_ENABLE 0x048
24 #define QSERDES_PLL_PLL_IVCO 0x050
25 #define QSERDES_PLL_LOCK_CMP1_MODE0 0x054
26 #define QSERDES_PLL_LOCK_CMP2_MODE0 0x058
27 #define QSERDES_PLL_LOCK_CMP1_MODE1 0x060
28 #define QSERDES_PLL_LOCK_CMP2_MODE1 0x064
29 #define QSERDES_PLL_BG_TRIM 0x074
30 #define QSERDES_PLL_CLK_EP_DIV_MODE0 0x078
31 #define QSERDES_PLL_CLK_EP_DIV_MODE1 0x07c
32 #define QSERDES_PLL_CP_CTRL_MODE0 0x080
33 #define QSERDES_PLL_CP_CTRL_MODE1 0x084
34 #define QSERDES_PLL_PLL_RCTRL_MODE0 0x088
35 #define QSERDES_PLL_PLL_RCTRL_MODE1 0x08c
36 #define QSERDES_PLL_PLL_CCTRL_MODE0 0x090
37 #define QSERDES_PLL_PLL_CCTRL_MODE1 0x094
38 #define QSERDES_PLL_BIAS_EN_CTRL_BY_PSM 0x0a4
39 #define QSERDES_PLL_SYSCLK_EN_SEL 0x0a8
40 #define QSERDES_PLL_RESETSM_CNTRL 0x0b0
41 #define QSERDES_PLL_LOCK_CMP_EN 0x0c4
42 #define QSERDES_PLL_DEC_START_MODE0 0x0cc
43 #define QSERDES_PLL_DEC_START_MODE1 0x0d0
44 #define QSERDES_PLL_DIV_FRAC_START1_MODE0 0x0d8
45 #define QSERDES_PLL_DIV_FRAC_START2_MODE0 0x0dc
46 #define QSERDES_PLL_DIV_FRAC_START3_MODE0 0x0e0
47 #define QSERDES_PLL_DIV_FRAC_START1_MODE1 0x0e4
48 #define QSERDES_PLL_DIV_FRAC_START2_MODE1 0x0e8
49 #define QSERDES_PLL_DIV_FRAC_START3_MODE1 0x0ec
50 #define QSERDES_PLL_INTEGLOOP_GAIN0_MODE0 0x100
51 #define QSERDES_PLL_INTEGLOOP_GAIN1_MODE0 0x104
52 #define QSERDES_PLL_INTEGLOOP_GAIN0_MODE1 0x108
53 #define QSERDES_PLL_INTEGLOOP_GAIN1_MODE1 0x10c
54 #define QSERDES_PLL_VCO_TUNE_MAP 0x120
55 #define QSERDES_PLL_VCO_TUNE1_MODE0 0x124
56 #define QSERDES_PLL_VCO_TUNE2_MODE0 0x128
57 #define QSERDES_PLL_VCO_TUNE1_MODE1 0x12c
58 #define QSERDES_PLL_VCO_TUNE2_MODE1 0x130
59 #define QSERDES_PLL_VCO_TUNE_TIMER1 0x13c
60 #define QSERDES_PLL_VCO_TUNE_TIMER2 0x140
61 #define QSERDES_PLL_CLK_SELECT 0x16c
62 #define QSERDES_PLL_HSCLK_SEL 0x170
63 #define QSERDES_PLL_CORECLK_DIV 0x17c
64 #define QSERDES_PLL_CORE_CLK_EN 0x184
65 #define QSERDES_PLL_CMN_CONFIG 0x18c
66 #define QSERDES_PLL_SVS_MODE_CLK_SEL 0x194
67 #define QSERDES_PLL_CORECLK_DIV_MODE1 0x1b4