104 	void __iomem *tx1;  member
389 	writel(swing, edp->tx1 + TXn_TX_DRV_LVL);  in qcom_edp_set_voltages()
390 	writel(emph, edp->tx1 + TXn_TX_EMP_POST1_LVL);  in qcom_edp_set_voltages()
625 	writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG);  in qcom_edp_ldo_config_v3()
643 	writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG);  in qcom_edp_ldo_config_v4()
888 	writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG);  in qcom_edp_ldo_config_v6()
1110 	writel(0x00, edp->tx1 + TXn_LANE_MODE_1);  in qcom_edp_phy_power_on()
1134 	writel(0x03, edp->tx1 + TXn_TRANSCEIVER_BIAS_EN);  in qcom_edp_phy_power_on()
1135 	writel(0x0f, edp->tx1 + TXn_CLKBUF_ENABLE);  in qcom_edp_phy_power_on()
1136 	writel(0x03, edp->tx1 + TXn_RESET_TSYNC_EN);  in qcom_edp_phy_power_on()
1137 	writel(0x01, edp->tx1 + TXn_TRAN_DRVR_EMP_EN);  in qcom_edp_phy_power_on()
1138 	writel(0x04, edp->tx1 + TXn_TX_BAND);  in qcom_edp_phy_power_on()
1157 	writel(0x1f, edp->tx1 + TXn_HIGHZ_DRVR_EN);  in qcom_edp_phy_power_on()
1158 	writel(0x04, edp->tx1 + TXn_HIGHZ_DRVR_EN);  in qcom_edp_phy_power_on()
1159 	writel(0x00, edp->tx1 + TXn_TX_POL_INV);  in qcom_edp_phy_power_on()
1161 	writel(0x10, edp->tx1 + TXn_TX_DRV_LVL_OFFSET);  in qcom_edp_phy_power_on()
1164 	writel(0x11, edp->tx1 + TXn_RES_CODE_LANE_OFFSET_TX0);  in qcom_edp_phy_power_on()
1165 	writel(0x11, edp->tx1 + TXn_RES_CODE_LANE_OFFSET_TX1);  in qcom_edp_phy_power_on()
1168 	writel(0x10, edp->tx1 + TXn_TX_EMP_POST1_LVL);  in qcom_edp_phy_power_on()
1170 	writel(0x1f, edp->tx1 + TXn_TX_DRV_LVL);  in qcom_edp_phy_power_on()
1194 	writel(drvr1_en, edp->tx1 + TXn_HIGHZ_DRVR_EN);  in qcom_edp_phy_power_on()
1195 	writel(bias1_en, edp->tx1 + TXn_TRANSCEIVER_BIAS_EN);  in qcom_edp_phy_power_on()
1438 	edp->tx1 = devm_platform_ioremap_resource(pdev, 2);  in qcom_edp_phy_probe()
1439 	if (IS_ERR(edp->tx1))  in qcom_edp_phy_probe()
1440 		return PTR_ERR(edp->tx1);  in qcom_edp_phy_probe()