Lines Matching refs:MAX_LANE
50 #define MAX_LANE 2 macro
520 u32 speed[MAX_LANE]; /* Index for override parameter per lane */
522 u32 txboostgain[MAX_LANE*3]; /* Tx freq boost and gain control */
523 u32 txeyetuning[MAX_LANE*3]; /* Tx eye tuning */
524 u32 txeyedirection[MAX_LANE*3]; /* Tx eye tuning direction */
525 u32 txamplitude[MAX_LANE*3]; /* Tx amplitude control */
526 u32 txprecursor_cn1[MAX_LANE*3]; /* Tx emphasis taps 1st pre-cursor */
527 u32 txprecursor_cn2[MAX_LANE*3]; /* Tx emphasis taps 2nd pre-cursor */
528 u32 txpostcursor_cp1[MAX_LANE*3]; /* Tx emphasis taps post-cursor */
946 for (lane = 0; lane < MAX_LANE; lane++) { in xgene_phy_sata_cfg_lanes()
1601 for (i = 0; i < MAX_LANE; i++) in xgene_phy_hw_init()
1689 for (i = 0; i < MAX_LANE; i++) in xgene_phy_probe()