11 #include <linux/phy/phy.h>
158 	int (*phy_init)(struct phy *p);
164 	struct phy *phy;  member
175 	struct phy *repeater;
180 static int snps_eusb2_hsphy_set_mode(struct phy *p, enum phy_mode mode, int submode)  in snps_eusb2_hsphy_set_mode()
182 	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);  in snps_eusb2_hsphy_set_mode()  local
184 	phy->mode = mode;  in snps_eusb2_hsphy_set_mode()
186 	return phy_set_mode_ext(phy->repeater, mode, submode);  in snps_eusb2_hsphy_set_mode()
203 static void qcom_eusb2_default_parameters(struct snps_eusb2_hsphy *phy)  in qcom_eusb2_default_parameters()  argument
206 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,  in qcom_eusb2_default_parameters()
211 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,  in qcom_eusb2_default_parameters()
216 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,  in qcom_eusb2_default_parameters()
221 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8,  in qcom_eusb2_default_parameters()
226 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8,  in qcom_eusb2_default_parameters()
246 static int exynos_eusb2_ref_clk_init(struct snps_eusb2_hsphy *phy)  in exynos_eusb2_ref_clk_init()  argument
249 	unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk);  in exynos_eusb2_ref_clk_init()
259 		dev_err(&phy->phy->dev, "unsupported ref_clk_freq: %lu\n", ref_clk_freq);  in exynos_eusb2_ref_clk_init()
263 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,  in exynos_eusb2_ref_clk_init()
267 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_CFG_PLLCFG0,  in exynos_eusb2_ref_clk_init()
272 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_CFG_PLLCFG1,  in exynos_eusb2_ref_clk_init()
283 static int qcom_eusb2_ref_clk_init(struct snps_eusb2_hsphy *phy)  in qcom_eusb2_ref_clk_init()  argument
286 	unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk);  in qcom_eusb2_ref_clk_init()
296 		dev_err(&phy->phy->dev, "unsupported ref_clk_freq: %lu\n", ref_clk_freq);  in qcom_eusb2_ref_clk_init()
300 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,  in qcom_eusb2_ref_clk_init()
304 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_2,  in qcom_eusb2_ref_clk_init()
308 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_3,  in qcom_eusb2_ref_clk_init()
312 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_3,  in qcom_eusb2_ref_clk_init()
318 static int exynos_snps_eusb2_hsphy_init(struct phy *p)  in exynos_snps_eusb2_hsphy_init()
320 	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);  in exynos_snps_eusb2_hsphy_init()  local
323 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,  in exynos_snps_eusb2_hsphy_init()
326 	fsleep(50); /* required after holding phy in reset */  in exynos_snps_eusb2_hsphy_init()
328 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,  in exynos_snps_eusb2_hsphy_init()
332 	ret = exynos_eusb2_ref_clk_init(phy);  in exynos_snps_eusb2_hsphy_init()
337 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_PHY_CFG_TX,  in exynos_snps_eusb2_hsphy_init()
341 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_UTMI_TESTSE,  in exynos_snps_eusb2_hsphy_init()
345 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,  in exynos_snps_eusb2_hsphy_init()
348 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,  in exynos_snps_eusb2_hsphy_init()
351 	snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,  in exynos_snps_eusb2_hsphy_init()
367 static int qcom_snps_eusb2_hsphy_init(struct phy *p)  in qcom_snps_eusb2_hsphy_init()
369 	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);  in qcom_snps_eusb2_hsphy_init()  local
372 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG0,  in qcom_snps_eusb2_hsphy_init()
375 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, POR);  in qcom_snps_eusb2_hsphy_init()
377 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,  in qcom_snps_eusb2_hsphy_init()
380 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_APB_ACCESS_CMD,  in qcom_snps_eusb2_hsphy_init()
383 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_UTMI_PHY_CMN_CTRL0, TESTBURNIN, 0);  in qcom_snps_eusb2_hsphy_init()
385 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_FSEL_SEL,  in qcom_snps_eusb2_hsphy_init()
389 	ret = qcom_eusb2_ref_clk_init(phy);  in qcom_snps_eusb2_hsphy_init()
393 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_1,  in qcom_snps_eusb2_hsphy_init()
397 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_4,  in qcom_snps_eusb2_hsphy_init()
401 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_4,  in qcom_snps_eusb2_hsphy_init()
405 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_5,  in qcom_snps_eusb2_hsphy_init()
409 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_6,  in qcom_snps_eusb2_hsphy_init()
413 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_5,  in qcom_snps_eusb2_hsphy_init()
417 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_eusb2_hsphy_init()
421 	qcom_eusb2_default_parameters(phy);  in qcom_snps_eusb2_hsphy_init()
423 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_eusb2_hsphy_init()
427 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL0, SLEEPM, SLEEPM);  in qcom_snps_eusb2_hsphy_init()
429 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,  in qcom_snps_eusb2_hsphy_init()
432 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,  in qcom_snps_eusb2_hsphy_init()
435 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, 0);  in qcom_snps_eusb2_hsphy_init()
437 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_eusb2_hsphy_init()
440 	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG0,  in qcom_snps_eusb2_hsphy_init()
456 static int snps_eusb2_hsphy_init(struct phy *p)  in snps_eusb2_hsphy_init()
458 	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);  in snps_eusb2_hsphy_init()  local
461 	ret = regulator_bulk_enable(ARRAY_SIZE(phy->vregs), phy->vregs);  in snps_eusb2_hsphy_init()
465 	ret = phy_init(phy->repeater);  in snps_eusb2_hsphy_init()
471 	ret = clk_bulk_prepare_enable(phy->data->num_clks, phy->clks);  in snps_eusb2_hsphy_init()
477 	ret = reset_control_assert(phy->phy_reset);  in snps_eusb2_hsphy_init()
485 	ret = reset_control_deassert(phy->phy_reset);  in snps_eusb2_hsphy_init()
491 	ret = phy->data->phy_init(p);  in snps_eusb2_hsphy_init()
498 	clk_bulk_disable_unprepare(phy->data->num_clks, phy->clks);  in snps_eusb2_hsphy_init()
500 	phy_exit(phy->repeater);  in snps_eusb2_hsphy_init()
502 	regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);  in snps_eusb2_hsphy_init()
507 static int snps_eusb2_hsphy_exit(struct phy *p)  in snps_eusb2_hsphy_exit()
509 	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);  in snps_eusb2_hsphy_exit()  local
511 	clk_bulk_disable_unprepare(phy->data->num_clks, phy->clks);  in snps_eusb2_hsphy_exit()
513 	regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);  in snps_eusb2_hsphy_exit()
515 	phy_exit(phy->repeater);  in snps_eusb2_hsphy_exit()
531 	struct snps_eusb2_hsphy *phy;  in snps_eusb2_hsphy_probe()  local
533 	struct phy *generic_phy;  in snps_eusb2_hsphy_probe()
537 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);  in snps_eusb2_hsphy_probe()
538 	if (!phy)  in snps_eusb2_hsphy_probe()
541 	phy->data = device_get_match_data(dev);  in snps_eusb2_hsphy_probe()
542 	if (!phy->data)  in snps_eusb2_hsphy_probe()
545 	phy->base = devm_platform_ioremap_resource(pdev, 0);  in snps_eusb2_hsphy_probe()
546 	if (IS_ERR(phy->base))  in snps_eusb2_hsphy_probe()
547 		return PTR_ERR(phy->base);  in snps_eusb2_hsphy_probe()
549 	phy->phy_reset = devm_reset_control_get_optional_exclusive(dev, NULL);  in snps_eusb2_hsphy_probe()
550 	if (IS_ERR(phy->phy_reset))  in snps_eusb2_hsphy_probe()
551 		return PTR_ERR(phy->phy_reset);  in snps_eusb2_hsphy_probe()
553 	phy->clks = devm_kcalloc(dev, phy->data->num_clks, sizeof(*phy->clks),  in snps_eusb2_hsphy_probe()
555 	if (!phy->clks)  in snps_eusb2_hsphy_probe()
558 	for (i = 0; i < phy->data->num_clks; ++i)  in snps_eusb2_hsphy_probe()
559 		phy->clks[i].id = phy->data->clk_names[i];  in snps_eusb2_hsphy_probe()
561 	ret = devm_clk_bulk_get(dev, phy->data->num_clks, phy->clks);  in snps_eusb2_hsphy_probe()
564 				     "failed to get phy clock(s)\n");  in snps_eusb2_hsphy_probe()
566 	phy->ref_clk = NULL;  in snps_eusb2_hsphy_probe()
567 	for (i = 0; i < phy->data->num_clks; ++i) {  in snps_eusb2_hsphy_probe()
568 		if (!strcmp(phy->clks[i].id, "ref")) {  in snps_eusb2_hsphy_probe()
569 			phy->ref_clk = phy->clks[i].clk;  in snps_eusb2_hsphy_probe()
574 	if (IS_ERR_OR_NULL(phy->ref_clk)) {  in snps_eusb2_hsphy_probe()
575 		ret = phy->ref_clk ? PTR_ERR(phy->ref_clk) : -ENOENT;  in snps_eusb2_hsphy_probe()
580 	num = ARRAY_SIZE(phy->vregs);  in snps_eusb2_hsphy_probe()
582 		phy->vregs[i].supply = eusb2_hsphy_vreg_names[i];  in snps_eusb2_hsphy_probe()
584 	ret = devm_regulator_bulk_get(dev, num, phy->vregs);  in snps_eusb2_hsphy_probe()
589 	phy->repeater = devm_of_phy_optional_get(dev, np, NULL);  in snps_eusb2_hsphy_probe()
590 	if (IS_ERR(phy->repeater))  in snps_eusb2_hsphy_probe()
591 		return dev_err_probe(dev, PTR_ERR(phy->repeater),  in snps_eusb2_hsphy_probe()
596 		dev_err(dev, "failed to create phy: %d\n", ret);  in snps_eusb2_hsphy_probe()
600 	dev_set_drvdata(dev, phy);  in snps_eusb2_hsphy_probe()
601 	phy_set_drvdata(generic_phy, phy);  in snps_eusb2_hsphy_probe()
612 		.compatible = "qcom,sm8550-snps-eusb2-phy",
615 		.compatible = "samsung,exynos2200-eusb2-phy",
632 MODULE_DESCRIPTION("Synopsys eUSB2 HS PHY driver");