302 	void __iomem *com;  member
387 	void __iomem *com = u2_banks->com;  in u2_phy_params_show()  local
395 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
401 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
416 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
422 		tmp = readl(com + U3P_USBPHYACR6);  in u2_phy_params_show()
428 		tmp = readl(com + U3P_USBPHYACR6);  in u2_phy_params_show()
454 	void __iomem *com = u2_banks->com;  in u2_phy_params_write()  local
465 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_VRT_SEL, val);  in u2_phy_params_write()
469 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL, val);  in u2_phy_params_write()
479 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL, val);  in u2_phy_params_write()
483 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH, val);  in u2_phy_params_write()
487 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP, val);  in u2_phy_params_write()
686 	void __iomem *com = u2_banks->com;  in hs_slew_rate_calibrate()  local
702 	mtk_phy_set_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN);  in hs_slew_rate_calibrate()
746 	mtk_phy_update_field(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCTRL,  in hs_slew_rate_calibrate()
750 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN);  in hs_slew_rate_calibrate()
806 	void __iomem *com = u2_banks->com;  in u2_phy_pll_26m_set()  local
811 	mtk_phy_update_field(com + U3P_USBPHYACR0, PA0_USB20_PLL_PREDIV, 0);  in u2_phy_pll_26m_set()
813 	mtk_phy_update_field(com + U3P_USBPHYACR2, PA2_RG_U2PLL_BW, 3);  in u2_phy_pll_26m_set()
815 	writel(P2R_RG_U2PLL_FBDIV_26M, com + U3P_U2PHYA_RESV);  in u2_phy_pll_26m_set()
817 	mtk_phy_set_bits(com + U3P_U2PHYA_RESV1,  in u2_phy_pll_26m_set()
825 	void __iomem *com = u2_banks->com;  in u2_phy_instance_init()  local
829 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_UART_EN | P2C_FORCE_SUSPENDM);  in u2_phy_instance_init()
831 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0,  in u2_phy_instance_init()
834 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_UART_EN);  in u2_phy_instance_init()
836 	mtk_phy_set_bits(com + U3P_USBPHYACR0, PA0_RG_USB20_INTR_EN);  in u2_phy_instance_init()
839 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HS_100U_U3_EN);  in u2_phy_instance_init()
841 	mtk_phy_clear_bits(com + U3P_U2PHYACR4, P2C_U2_GPIO_CTR_MSK);  in u2_phy_instance_init()
845 			mtk_phy_set_bits(com + U3P_USBPHYACR2, PA2_RG_SIF_U2PLL_FORCE_EN);  in u2_phy_instance_init()
847 			mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_init()
849 			mtk_phy_set_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_init()
851 			mtk_phy_set_bits(com + U3P_U2PHYDTM0,  in u2_phy_instance_init()
857 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_BC11_SW_EN);  in u2_phy_instance_init()
859 	mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_SQTH, 2);  in u2_phy_instance_init()
871 	void __iomem *com = u2_banks->com;  in u2_phy_instance_power_on()  local
875 	mtk_phy_set_bits(com + U3P_USBPHYACR6, PA6_RG_U2_OTG_VBUSCMP_EN);  in u2_phy_instance_power_on()
877 	mtk_phy_set_bits(com + U3P_U2PHYDTM1, P2C_RG_VBUSVALID | P2C_RG_AVALID);  in u2_phy_instance_power_on()
879 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_SESSEND);  in u2_phy_instance_power_on()
882 		mtk_phy_set_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_power_on()
884 		mtk_phy_set_bits(com + U3P_U2PHYDTM0, P2C_RG_SUSPENDM | P2C_FORCE_SUSPENDM);  in u2_phy_instance_power_on()
893 	void __iomem *com = u2_banks->com;  in u2_phy_instance_power_off()  local
897 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_OTG_VBUSCMP_EN);  in u2_phy_instance_power_off()
899 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_VBUSVALID | P2C_RG_AVALID);  in u2_phy_instance_power_off()
901 	mtk_phy_set_bits(com + U3P_U2PHYDTM1, P2C_RG_SESSEND);  in u2_phy_instance_power_off()
904 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_RG_SUSPENDM | P2C_FORCE_SUSPENDM);  in u2_phy_instance_power_off()
906 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_power_off()
916 	void __iomem *com = u2_banks->com;  in u2_phy_instance_exit()  local
920 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_exit()
922 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_SUSPENDM);  in u2_phy_instance_exit()
933 	tmp = readl(u2_banks->com + U3P_U2PHYDTM1);  in u2_phy_instance_set_mode()
948 	writel(tmp, u2_banks->com + U3P_U2PHYDTM1);  in u2_phy_instance_set_mode()
1081 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
1109 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
1159 	void __iomem *com = u2_banks->com;  in u2_phy_props_set()  local
1162 		mtk_phy_set_bits(com + U3P_U2PHYBC12C, P2C_RG_CHGDT_EN);  in u2_phy_props_set()
1165 		mtk_phy_update_field(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCTRL,  in u2_phy_props_set()
1169 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_VRT_SEL,  in u2_phy_props_set()
1173 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL,  in u2_phy_props_set()
1181 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL,  in u2_phy_props_set()
1186 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,  in u2_phy_props_set()
1190 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP,  in u2_phy_props_set()
1340 		mtk_phy_update_field(u2_banks->com + U3P_USBPHYACR1, PA1_RG_INTR_CAL,  in phy_efuse_set()