Lines Matching +full:pcie +full:- +full:phy +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
15 #include <linux/phy/phy.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
25 #define ANA_PLL_CLK_OUT_TO_EXT_IO_SEL BIT(3)
30 #define ANA_AUX_RX_TERM_GND_EN BIT(3)
34 #define ANA_AUX_TX_LVL GENMASK(3, 0)
62 struct phy *phy; member
73 static int imx8_pcie_phy_power_on(struct phy *phy) in imx8_pcie_phy_power_on() argument
77 struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy); in imx8_pcie_phy_power_on()
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
86 writel(imx8_phy->tx_deemph_gen1, in imx8_pcie_phy_power_on()
87 imx8_phy->base + PCIE_PHY_TRSV_REG5); in imx8_pcie_phy_power_on()
88 if (imx8_phy->tx_deemph_gen2) in imx8_pcie_phy_power_on()
89 writel(imx8_phy->tx_deemph_gen2, in imx8_pcie_phy_power_on()
90 imx8_phy->base + PCIE_PHY_TRSV_REG6); in imx8_pcie_phy_power_on()
99 val = readl(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG061); in imx8_pcie_phy_power_on()
101 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG061); in imx8_pcie_phy_power_on()
103 /* Configure the PHY to output the refclock via pad */ in imx8_pcie_phy_power_on()
105 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG061); in imx8_pcie_phy_power_on()
112 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG062); in imx8_pcie_phy_power_on()
113 if (imx8_phy->drvdata->variant != IMX8MM) { in imx8_pcie_phy_power_on()
115 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063); in imx8_pcie_phy_power_on()
119 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG064); in imx8_pcie_phy_power_on()
121 imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG065); in imx8_pcie_phy_power_on()
125 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
127 imx8_phy->clkreq_unused ? in imx8_pcie_phy_power_on()
129 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
132 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
134 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
137 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
144 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
146 reset_control_deassert(imx8_phy->perst); in imx8_pcie_phy_power_on()
149 reset_control_deassert(imx8_phy->reset); in imx8_pcie_phy_power_on()
154 /* Do the PHY common block reset */ in imx8_pcie_phy_power_on()
155 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
159 /* Polling to check the phy is ready or not. */ in imx8_pcie_phy_power_on()
160 ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075, in imx8_pcie_phy_power_on()
165 static int imx8_pcie_phy_init(struct phy *phy) in imx8_pcie_phy_init() argument
167 struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy); in imx8_pcie_phy_init()
169 return clk_prepare_enable(imx8_phy->clk); in imx8_pcie_phy_init()
172 static int imx8_pcie_phy_exit(struct phy *phy) in imx8_pcie_phy_exit() argument
174 struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy); in imx8_pcie_phy_exit()
176 clk_disable_unprepare(imx8_phy->clk); in imx8_pcie_phy_exit()
189 .gpr = "fsl,imx8mm-iomuxc-gpr",
194 .gpr = "fsl,imx8mp-iomuxc-gpr",
199 {.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
200 {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
208 struct device *dev = &pdev->dev; in imx8_pcie_phy_probe()
209 struct device_node *np = dev->of_node; in imx8_pcie_phy_probe()
214 return -ENOMEM; in imx8_pcie_phy_probe()
216 imx8_phy->drvdata = of_device_get_match_data(dev); in imx8_pcie_phy_probe()
218 /* get PHY refclk pad mode */ in imx8_pcie_phy_probe()
219 of_property_read_u32(np, "fsl,refclk-pad-mode", in imx8_pcie_phy_probe()
220 &imx8_phy->refclk_pad_mode); in imx8_pcie_phy_probe()
222 if (of_property_read_u32(np, "fsl,tx-deemph-gen1", in imx8_pcie_phy_probe()
223 &imx8_phy->tx_deemph_gen1)) in imx8_pcie_phy_probe()
224 imx8_phy->tx_deemph_gen1 = 0; in imx8_pcie_phy_probe()
226 if (of_property_read_u32(np, "fsl,tx-deemph-gen2", in imx8_pcie_phy_probe()
227 &imx8_phy->tx_deemph_gen2)) in imx8_pcie_phy_probe()
228 imx8_phy->tx_deemph_gen2 = 0; in imx8_pcie_phy_probe()
230 if (of_property_read_bool(np, "fsl,clkreq-unsupported")) in imx8_pcie_phy_probe()
231 imx8_phy->clkreq_unused = true; in imx8_pcie_phy_probe()
233 imx8_phy->clkreq_unused = false; in imx8_pcie_phy_probe()
235 imx8_phy->clk = devm_clk_get(dev, "ref"); in imx8_pcie_phy_probe()
236 if (IS_ERR(imx8_phy->clk)) { in imx8_pcie_phy_probe()
237 dev_err(dev, "failed to get imx pcie phy clock\n"); in imx8_pcie_phy_probe()
238 return PTR_ERR(imx8_phy->clk); in imx8_pcie_phy_probe()
242 imx8_phy->iomuxc_gpr = in imx8_pcie_phy_probe()
243 syscon_regmap_lookup_by_compatible(imx8_phy->drvdata->gpr); in imx8_pcie_phy_probe()
244 if (IS_ERR(imx8_phy->iomuxc_gpr)) { in imx8_pcie_phy_probe()
246 return PTR_ERR(imx8_phy->iomuxc_gpr); in imx8_pcie_phy_probe()
249 imx8_phy->reset = devm_reset_control_get_exclusive(dev, "pciephy"); in imx8_pcie_phy_probe()
250 if (IS_ERR(imx8_phy->reset)) { in imx8_pcie_phy_probe()
252 return PTR_ERR(imx8_phy->reset); in imx8_pcie_phy_probe()
255 if (imx8_phy->drvdata->variant == IMX8MP) { in imx8_pcie_phy_probe()
256 imx8_phy->perst = in imx8_pcie_phy_probe()
258 if (IS_ERR(imx8_phy->perst)) in imx8_pcie_phy_probe()
259 return dev_err_probe(dev, PTR_ERR(imx8_phy->perst), in imx8_pcie_phy_probe()
260 "Failed to get PCIE PHY PERST control\n"); in imx8_pcie_phy_probe()
263 imx8_phy->base = devm_platform_ioremap_resource(pdev, 0); in imx8_pcie_phy_probe()
264 if (IS_ERR(imx8_phy->base)) in imx8_pcie_phy_probe()
265 return PTR_ERR(imx8_phy->base); in imx8_pcie_phy_probe()
267 imx8_phy->phy = devm_phy_create(dev, NULL, &imx8_pcie_phy_ops); in imx8_pcie_phy_probe()
268 if (IS_ERR(imx8_phy->phy)) in imx8_pcie_phy_probe()
269 return PTR_ERR(imx8_phy->phy); in imx8_pcie_phy_probe()
271 phy_set_drvdata(imx8_phy->phy, imx8_phy); in imx8_pcie_phy_probe()
281 .name = "imx8-pcie-phy",
287 MODULE_DESCRIPTION("FSL IMX8 PCIE PHY driver");