47 #define SPE_PMU_HW_FLAGS_CX			0x00001
62 #define ARM_SPE_BUF_PAD_BYTE			0
81 #define SPE_PMU_FEAT_FILT_EVT			(1UL << 0)
116 	SPE_PMU_CAP_ARCH_INST = 0,
145 	return 0;  in arm_spe_pmu_cap_get()
169 	return sysfs_emit(buf, "0x%llx\n", arm_spe_pmu_cap_get(spe_pmu, cap));  in arm_spe_pmu_cap_show_hex()
175 	})[0].attr.attr
198 #define ATTR_CFG_FLD_ts_enable_LO		0
199 #define ATTR_CFG_FLD_ts_enable_HI		0
244 #define ATTR_CFG_FLD_event_filter_LO		0
248 #define ATTR_CFG_FLD_min_latency_LO		0
252 #define ATTR_CFG_FLD_inv_event_filter_LO	0
304 		return 0;  in arm_spe_pmu_format_attr_is_visible()
307 		return 0;  in arm_spe_pmu_format_attr_is_visible()
317 		return 0;  in arm_spe_pmu_format_attr_is_visible()
357 	u64 reg = 0;  in arm_spe_event_to_pmscr()
398 	u64 reg = 0;  in arm_spe_event_to_pmsirr()
411 	u64 reg = 0;  in arm_spe_event_to_pmsfcr()
562 	perf_aux_output_end(handle, 0);  in __arm_spe_pmu_next_off()
563 	return 0;  in __arm_spe_pmu_next_off()
605 		limit = 0;  in arm_spe_perf_aux_output_begin()
639 	write_sysreg_s(0, SYS_PMSCR_EL1);  in arm_spe_pmu_disable_and_drain_local()
647 	write_sysreg_s(0, SYS_PMBLIMITR_EL1);  in arm_spe_pmu_disable_and_drain_local()
710 	pr_err_ratelimited("%s on CPU %d [PMBSR=0x%016llx, PMBPTR=0x%016llx, PMBLIMITR=0x%016llx]\n",  in arm_spe_pmu_buf_get_fault_act()
769 	write_sysreg_s(0, SYS_PMBSR_EL1);  in arm_spe_pmu_irq_handler()
784 	if (event->cpu >= 0 &&  in arm_spe_pmu_event_init()
843 	return 0;  in arm_spe_pmu_event_init()
853 	hwc->state = 0;  in arm_spe_pmu_start()
911 				write_sysreg_s(0, SYS_PMBSR_EL1);  in arm_spe_pmu_stop()
928 	int ret = 0;  in arm_spe_pmu_add()
987 	for (i = 0; i < nr_pages; ++i)  in arm_spe_pmu_setup_aux()
1187 		 "probed SPEv1.%d for CPUs %*pbl [max_record_sz %u, align %u, features 0x%llx]\n",  in __arm_spe_pmu_dev_probe()
1203 	write_sysreg_s(0, SYS_PMBPTR_EL1);  in __arm_spe_pmu_reset_local()
1207 	write_sysreg_s(0, SYS_PMBSR_EL1);  in __arm_spe_pmu_reset_local()
1233 		return 0;  in arm_spe_pmu_cpu_startup()
1236 	return 0;  in arm_spe_pmu_cpu_startup()
1245 		return 0;  in arm_spe_pmu_cpu_teardown()
1248 	return 0;  in arm_spe_pmu_cpu_teardown()
1290 	int irq = platform_get_irq(pdev, 0);  in arm_spe_pmu_irq_probe()
1292 	if (irq < 0)  in arm_spe_pmu_irq_probe()
1306 	return 0;  in arm_spe_pmu_irq_probe()
1316 	{ ARMV8_SPE_PDEV_NAME, 0},
1359 	return 0;  in arm_spe_pmu_device_probe()
1395 	if (ret < 0)  in arm_spe_pmu_init()