Lines Matching full:pmu

10 	tristate "ARM CCI PMU driver"
14 	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
41 	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
45 	tristate "Arm CMN-600 PMU support"
48 	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
52 	tristate "Arm NI-700 PMU support"
55 	  Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
60 	bool "ARM PMU framework"
80 	bool "RISC-V PMU framework"
84 	  systems. This provides the core PMU framework that abstracts common
85 	  PMU functionalities in a core library so that different PMU drivers
90 	bool "RISC-V legacy PMU implementation"
100 	bool "RISC-V PMU based on SBI PMU extension"
104 	  using SBI PMU extension on RISC-V based systems. This option provides
111 	bool "StarFive StarLink PMU"
119 	bool "Andes custom PMU support"
123 	  The Andes cores implement the PMU overflow extension very
127 	  non-standard behaviour via the regular SBI PMU driver and
151 	  Say y if you want to use the ARM performance monitor unit (PMU)
157 	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
162 	  system, control logic. The PMU allows counting various events related
182 	bool "Qualcomm Technologies L2-cache PMU"
186 	  Provides support for the L2 cache performance monitor unit (PMU)
188 	  Adds the L2 cache PMU into the perf events subsystem for
192 	bool "Qualcomm Technologies L3-cache PMU"
196 	   Provides support for the L3 cache performance monitor unit (PMU)
198 	   Adds the L3 cache PMU into the perf events subsystem for
202 	tristate "Cavium ThunderX2 SoC PMU UNCORE"
208 	   The SoC has PMU support in its L3 cache controller (L3C) and
213         bool "APM X-Gene SoC PMU"
227 	tristate "Enable PMU support for the ARM DMC-620 memory controller"
230 	  Support for PMU events monitoring on the ARM DMC-620 memory
234 	tristate "Marvell CN10K LLC-TAD PMU"
241 	bool "Apple M1 CPU PMU support"
248 	tristate "Alibaba T-Head Yitian 710 DDR Sub-system Driveway PMU driver"
251 	  Support for Driveway PMU events monitoring on Yitian 710 DDR
257 	tristate "Enable MARVELL CN10K DRAM Subsystem(DSS) PMU Support"
264 	tristate "Synopsys DesignWare PCIe PMU"
267 	  Enable perf support for Synopsys DesignWare PCIe PMU Performance
288 	tristate "MARVELL PEM PMU Support"