Lines Matching full:monitoring

14 	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
48 	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
55 	  Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
116 	   subsystem, allowing monitoring of various L3 cache perf events.
142 	   Groups (PMCG), which provide monitoring of transactions passing
189 	  monitoring L2 cache events.
199 	   monitoring L3 cache events.
230 	  Support for PMU events monitoring on the ARM DMC-620 memory
251 	  Support for Driveway PMU events monitoring on Yitian 710 DDR
260 	  Enable perf support for Marvell DDR Performance monitoring
268 	  monitoring event on platform including the Alibaba Yitian 710.
275 	tristate "CXL Performance Monitoring Unit"
278 	  Support performance monitoring as defined in CXL rev 3.0
279 	  section 13.2: Performance Monitoring. CXL components may have
280 	  one or more CXL Performance Monitoring Units (CPMUs).
283 	  monitoring units and provide standard perf based interfaces.
291 	  Enable support for PCIe Interface performance monitoring