Lines Matching full:monitoring

14 	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
48 	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
55 	  Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
116 	   subsystem, allowing monitoring of various L3 cache perf events.
142 	   Groups (PMCG), which provide monitoring of transactions passing
188 	 monitoring Uncore events.
198 	  monitoring L2 cache events.
208 	   monitoring L3 cache events.
250 	  Support for PMU events monitoring on the ARM DMC-620 memory
271 	  Support for Driveway PMU events monitoring on Yitian 710 DDR
280 	  Enable perf support for Marvell DDR Performance monitoring
288 	  monitoring event on platform including the Alibaba Yitian 710.
295 	tristate "CXL Performance Monitoring Unit"
298 	  Support performance monitoring as defined in CXL rev 3.0
299 	  section 13.2: Performance Monitoring. CXL components may have
300 	  one or more CXL Performance Monitoring Units (CPMUs).
303 	  monitoring units and provide standard perf based interfaces.
311 	  Enable support for PCIe Interface performance monitoring