Lines Matching +full:ddr +full:- +full:config
1 # SPDX-License-Identifier: GPL-2.0-only
9 config ARM_CCI_PMU
17 If compiled as a module, it will be called arm-cci.
19 config ARM_CCI400_PMU
20 bool "support CCI-400"
25 CCI-400 provides 4 independent event counters counting events related
28 config ARM_CCI5xx_PMU
29 bool "support CCI-500/CCI-550"
33 CCI-500/CCI-550 both provide 8 independent event counters, which can
37 config ARM_CCN
44 config ARM_CMN
45 tristate "Arm CMN-600 PMU support"
48 Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
51 config ARM_NI
52 tristate "Arm NI-700 PMU support"
55 Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
58 config ARM_PMU
63 Say y if you want to use CPU performance monitors on ARM-based
66 config ARM_V6_PMU
70 config ARM_V7_PMU
74 config ARM_XSCALE_PMU
78 config RISCV_PMU
80 bool "RISC-V PMU framework"
83 Say y if you want to use CPU performance monitors on RISCV-based
88 config RISCV_PMU_LEGACY
90 bool "RISC-V legacy PMU implementation"
94 implementation on RISC-V based systems. This only allows counting
98 config RISCV_PMU_SBI
100 bool "RISC-V PMU based on SBI PMU extension"
104 using SBI PMU extension on RISC-V based systems. This option provides
108 config STARFIVE_STARLINK_PMU
118 config ANDES_CUSTOM_PMU
127 non-standard behaviour via the regular SBI PMU driver and
132 config ARM_PMU_ACPI
136 config ARM_SMMU_V3_PMU
146 config ARM_PMUV3
156 config ARM_DSU_PMU
165 config FSL_IMX8_DDR_PMU
166 tristate "Freescale i.MX8 DDR perf monitor"
169 Provides support for the DDR performance monitor in i.MX8, which
173 config FSL_IMX9_DDR_PMU
174 tristate "Freescale i.MX9 DDR perf monitor"
177 Provides support for the DDR performance monitor in i.MX9, which
181 config QCOM_L2_PMU
182 bool "Qualcomm Technologies L2-cache PMU"
191 config QCOM_L3_PMU
192 bool "Qualcomm Technologies L3-cache PMU"
201 config THUNDERX2_PMU
211 config XGENE_PMU
213 bool "APM X-Gene SoC PMU"
216 Say y if you want to use APM X-Gene SoC performance monitors.
218 config ARM_SPE_PMU
226 config ARM_DMC620_PMU
227 tristate "Enable PMU support for the ARM DMC-620 memory controller"
230 Support for PMU events monitoring on the ARM DMC-620 memory
233 config MARVELL_CN10K_TAD_PMU
234 tristate "Marvell CN10K LLC-TAD PMU"
237 Provides support for Last-Level cache Tag-and-data Units (LLC-TAD)
240 config APPLE_M1_CPU_PMU
244 Provides support for the non-architectural CPU PMUs present on
247 config ALIBABA_UNCORE_DRW_PMU
248 tristate "Alibaba T-Head Yitian 710 DDR Sub-system Driveway PMU driver"
251 Support for Driveway PMU events monitoring on Yitian 710 DDR
252 Sub-system.
256 config MARVELL_CN10K_DDR_PMU
260 Enable perf support for Marvell DDR Performance monitoring
263 config DWC_PCIE_PMU
274 config CXL_PMU
287 config MARVELL_PEM_PMU