Lines Matching +full:arm +full:- +full:platform

1 # SPDX-License-Identifier: GPL-2.0-only
10 	tristate "ARM CCI PMU driver"
11 	depends on (ARM && CPU_V7) || ARM64
14 	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
17 	  If compiled as a module, it will be called arm-cci.
20 	bool "support CCI-400"
25 	  CCI-400 provides 4 independent event counters counting events related
29 	bool "support CCI-500/CCI-550"
33 	  CCI-500/CCI-550 both provide 8 independent event counters, which can
38 	tristate "ARM CCN driver support"
39 	depends on ARM || ARM64 || COMPILE_TEST
41 	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
45 	tristate "Arm CMN-600 PMU support"
48 	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
52 	tristate "Arm NI-700 PMU support"
55 	  Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
59 	depends on ARM || ARM64
60 	bool "ARM PMU framework"
63 	  Say y if you want to use CPU performance monitors on ARM-based
80 	bool "RISC-V PMU framework"
83 	  Say y if you want to use CPU performance monitors on RISCV-based
90 	bool "RISC-V legacy PMU implementation"
94 	  implementation on RISC-V based systems. This only allows counting
100 	bool "RISC-V PMU based on SBI PMU extension"
104 	  using SBI PMU extension on RISC-V based systems. This option provides
127 	  non-standard behaviour via the regular SBI PMU driver and
137 	 tristate "ARM SMMUv3 Performance Monitors Extension"
141 	   Provides support for the ARM SMMUv3 Performance Monitor Counter
147 	depends on HW_PERF_EVENTS && ((ARM && CPU_V7) || ARM64)
148 	bool "ARM PMUv3 support" if !ARM64
151 	  Say y if you want to use the ARM performance monitor unit (PMU)
157 	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
160 	  Provides support for performance monitor unit in ARM DynamIQ Shared
182 	bool "Qualcomm Technologies L2-cache PMU"
192 	bool "Qualcomm Technologies L3-cache PMU"
213         bool "APM X-Gene SoC PMU"
216           Say y if you want to use APM X-Gene SoC performance monitors.
238 	tristate "Enable PMU support for the ARM DMC-620 memory controller"
241 	  Support for PMU events monitoring on the ARM DMC-620 memory
245 	tristate "Marvell CN10K LLC-TAD PMU"
248 	  Provides support for Last-Level cache Tag-and-data Units (LLC-TAD)
255 	  Provides support for the non-architectural CPU PMUs present on
259 	tristate "Alibaba T-Head Yitian 710 DDR Sub-system Driveway PMU driver"
263 	  Sub-system.
272 	  event on CN10K platform.
279 	  monitoring event on platform including the Alibaba Yitian 710.
303 	  on Marvell platform.