1 // SPDX-License-Identifier: GPL-2.0
11  *	     PCI-PCI bridges cleanup, sorted resource allocation.
14  *	     tighter packing. Prefetchable range support.
54 		list_del(&dev_res->list);  in free_list()
60  * add_to_list() - Add a new resource tracker to the list
75 		return -ENOMEM;  in add_to_list()
77 	tmp->res = res;  in add_to_list()
78 	tmp->dev = dev;  in add_to_list()
79 	tmp->start = res->start;  in add_to_list()
80 	tmp->end = res->end;  in add_to_list()
81 	tmp->flags = res->flags;  in add_to_list()
82 	tmp->add_size = add_size;  in add_to_list()
83 	tmp->min_align = min_align;  in add_to_list()
85 	list_add(&tmp->list, head);  in add_to_list()
95 		if (dev_res->res == res) {  in remove_from_list()
96 			list_del(&dev_res->list);  in remove_from_list()
109 		if (dev_res->res == res)  in res_to_dev_res()
122 	return dev_res ? dev_res->add_size : 0;  in get_res_add_size()
131 	return dev_res ? dev_res->min_align : 0;  in get_res_add_align()
136 	struct resource *res = dev_res->res;  in restore_dev_resource()
138 	res->start = dev_res->start;  in restore_dev_resource()
139 	res->end = dev_res->end;  in restore_dev_resource()
140 	res->flags = dev_res->flags;  in restore_dev_resource()
144  * Helper function for sizing routines.  Assigned resources have non-NULL
164 		if ((r->flags & type_mask) != type)  in find_bus_resource_of_type()
167 		if (!r->parent)  in find_bus_resource_of_type()
176  * pbus_select_window_for_type - Select bridge window for a resource type
184  * Any non-prefetchable resource is put into the non-prefetchable window.
186  * If there is no prefetchable MMIO window, put all memory resources into the
187  * non-prefetchable window.
189  * If there's a 64-bit prefetchable MMIO window, put all 64-bit prefetchable
190  * resources into it and place 32-bit prefetchable memory into the
191  * non-prefetchable window.
193  * Otherwise, put all prefetchable resources into the prefetchable window.
231 		    !(mmio_pref->flags & IORESOURCE_MEM))  in pbus_select_window_for_type()
235 		    !(mmio_pref->flags & IORESOURCE_MEM_64))  in pbus_select_window_for_type()
245  * pbus_select_window - Select bridge window for a resource
254  * Any non-prefetchable resource is put into the non-prefetchable window.
256  * If there is no prefetchable MMIO window, put all memory resources into the
257  * non-prefetchable window.
259  * If there's a 64-bit prefetchable MMIO window, put all 64-bit prefetchable
260  * resources into it and place 32-bit prefetchable memory into the
261  * non-prefetchable window.
263  * Otherwise, put all prefetchable resources into the prefetchable window.
270 	if (res->parent)  in pbus_select_window()
271 		return res->parent;  in pbus_select_window()
273 	return pbus_select_window_for_type(bus, res->flags);  in pbus_select_window()
278 	u16 class = dev->class >> 8, command;  in pdev_resources_assignable()
298 	if (!res->flags)  in pdev_resource_assignable()
302 	    res->flags & IORESOURCE_DISABLED)  in pdev_resource_assignable()
310 	if (res->parent)  in pdev_resource_should_fit()
313 	if (res->flags & IORESOURCE_PCI_FIXED)  in pdev_resource_should_fit()
347 		tmp->res = r;  in pdev_sort_resources()
348 		tmp->dev = dev;  in pdev_sort_resources()
349 		tmp->start = r->start;  in pdev_sort_resources()
350 		tmp->end = r->end;  in pdev_sort_resources()
351 		tmp->flags = r->flags;  in pdev_sort_resources()
358 			align = pci_resource_alignment(dev_res->dev,  in pdev_sort_resources()
359 							 dev_res->res);  in pdev_sort_resources()
362 				n = &dev_res->list;  in pdev_sort_resources()
367 		list_add_tail(&tmp->list, n);  in pdev_sort_resources()
377 	if (resno == PCI_ROM_RESOURCE && !(res->flags & IORESOURCE_ROM_ENABLE))  in pci_resource_is_optional()
388 		res->flags |= IORESOURCE_UNSET;  in reset_resource()
392 	res->start = 0;  in reset_resource()
393 	res->end = 0;  in reset_resource()
394 	res->flags = 0;  in reset_resource()
398  * reassign_resources_sorted() - Satisfy any additional resource requests
422 		res = add_res->res;  in reassign_resources_sorted()
423 		dev = add_res->dev;  in reassign_resources_sorted()
430 		if (!res->parent && resource_size(res) &&  in reassign_resources_sorted()
436 			if (dev_res->res == res) {  in reassign_resources_sorted()
445 		add_size = add_res->add_size;  in reassign_resources_sorted()
446 		align = add_res->min_align;  in reassign_resources_sorted()
447 		if (!res->parent) {  in reassign_resources_sorted()
456 			res->flags |= add_res->flags &  in reassign_resources_sorted()
464 		list_del(&add_res->list);  in reassign_resources_sorted()
470  * assign_requested_resources_sorted() - Satisfy resource requests
491 		res = dev_res->res;  in assign_requested_resources_sorted()
492 		dev = dev_res->dev;  in assign_requested_resources_sorted()
519 		mask |= fail_res->flags;  in pci_fail_res_type_mask()
523 	 * allocate pref in non-pref range.  Will release all assigned  in pci_fail_res_type_mask()
524 	 * non-pref sibling resources according to that bit.  in pci_fail_res_type_mask()
531 	if (res->flags & IORESOURCE_IO)  in pci_need_to_release()
535 	if (res->flags & IORESOURCE_PREFETCH) {  in pci_need_to_release()
538 		/* Count pref if its parent is non-pref */  in pci_need_to_release()
540 			 !(res->parent->flags & IORESOURCE_PREFETCH))  in pci_need_to_release()
546 	if (res->flags & IORESOURCE_MEM)  in pci_need_to_release()
561 		int idx = pci_resource_num(fail_res->dev, fail_res->res);  in pci_required_resource_failed()
563 		if (type && (fail_res->flags & PCI_RES_TYPE_MASK) != type)  in pci_required_resource_failed()
566 		if (!pci_resource_is_optional(fail_res->dev, idx))  in pci_required_resource_failed()
593 	 *	   MMIO.  If assigned pref MMIO's parent is non-pref MMIO  in __assign_resources_sorted()
594 	 *	   and non-pref MMIO assignment fails, will release that  in __assign_resources_sorted()
596 	 *	3. If non-pref MMIO assignment fails or pref MMIO  in __assign_resources_sorted()
597 	 *	   assignment fails, will release assigned non-pref MMIO.  in __assign_resources_sorted()
618 		if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {  in __assign_resources_sorted()
626 		res = dev_res->res;  in __assign_resources_sorted()
628 		res->end += get_res_add_size(realloc_head, res);  in __assign_resources_sorted()
632 		 * 1. bridge resource  -- IORESOURCE_STARTALIGN  in __assign_resources_sorted()
633 		 * 2. SR-IOV resource  -- IORESOURCE_SIZEALIGN  in __assign_resources_sorted()
636 		if (!(res->flags & IORESOURCE_STARTALIGN))  in __assign_resources_sorted()
648 		if (add_align > res->start) {  in __assign_resources_sorted()
652 				align = pci_resource_alignment(dev_res2->dev,  in __assign_resources_sorted()
653 							       dev_res2->res);  in __assign_resources_sorted()
655 					list_move_tail(&dev_res->list,  in __assign_resources_sorted()
656 						       &dev_res2->list);  in __assign_resources_sorted()
667 	/* All non-optional resources assigned? */  in __assign_resources_sorted()
671 			remove_from_list(realloc_head, dev_res->res);  in __assign_resources_sorted()
680 			struct resource *res = save_res->res;  in __assign_resources_sorted()
682 			if (res->parent)  in __assign_resources_sorted()
696 		res = dev_res->res;  in __assign_resources_sorted()
698 		if (res->parent && !pci_need_to_release(fail_type, res)) {  in __assign_resources_sorted()
702 			list_del(&dev_res->list);  in __assign_resources_sorted()
710 		res = dev_res->res;  in __assign_resources_sorted()
711 		dev = dev_res->dev;  in __assign_resources_sorted()
721 	/* Satisfy the must-have resource requests */  in __assign_resources_sorted()
731 		res = dev_res->res;  in __assign_resources_sorted()
732 		dev = dev_res->dev;  in __assign_resources_sorted()
734 		if (res->parent)  in __assign_resources_sorted()
767 	list_for_each_entry(dev, &bus->devices, bus_list)  in pbus_assign_resources_sorted()
775 	struct pci_dev *bridge = bus->self;  in pci_setup_cardbus()
780 		 &bus->busn_res);  in pci_setup_cardbus()
782 	res = bus->resource[0];  in pci_setup_cardbus()
783 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
784 	if (res->parent && res->flags & IORESOURCE_IO) {  in pci_setup_cardbus()
796 	res = bus->resource[1];  in pci_setup_cardbus()
797 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
798 	if (res->parent && res->flags & IORESOURCE_IO) {  in pci_setup_cardbus()
806 	res = bus->resource[2];  in pci_setup_cardbus()
807 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
808 	if (res->parent && res->flags & IORESOURCE_MEM) {  in pci_setup_cardbus()
816 	res = bus->resource[3];  in pci_setup_cardbus()
817 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
818 	if (res->parent && res->flags & IORESOURCE_MEM) {  in pci_setup_cardbus()
829  * Initialize bridges with base/limit values we have collected.  PCI-to-PCI
836  * bridges which support 32-bit I/O.  This update requires two config space
839  * 64-bit prefetchable MMIO.
852 	if (bridge->io_window_1k)  in pci_setup_bridge_io()
856 	res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];  in pci_setup_bridge_io()
858 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_io()
859 	if (res->parent && res->flags & IORESOURCE_IO) {  in pci_setup_bridge_io()
888 	res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];  in pci_setup_bridge_mmio()
890 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio()
891 	if (res->parent && res->flags & IORESOURCE_MEM) {  in pci_setup_bridge_mmio()
910 	 * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables  in pci_setup_bridge_mmio_pref()
917 	res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in pci_setup_bridge_mmio_pref()
919 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio_pref()
920 	if (res->parent && res->flags & IORESOURCE_PREFETCH) {  in pci_setup_bridge_mmio_pref()
923 		if (res->flags & IORESOURCE_MEM_64) {  in pci_setup_bridge_mmio_pref()
940 	struct pci_dev *bridge = bus->self;  in __pci_setup_bridge()
942 	pci_info(bridge, "PCI bridge to %pR\n", &bus->busn_res);  in __pci_setup_bridge()
953 	pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);  in __pci_setup_bridge()
989 	int ret = -EINVAL;  in pci_claim_bridge_resource()
997 	if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)  in pci_claim_bridge_resource()
1001 		return -EINVAL;  in pci_claim_bridge_resource()
1013  * Check whether the bridge supports optional I/O and prefetchable memory
1014  * ranges.  If not, the respective base/limit registers must be read-only
1019 	struct pci_dev *bridge = bus->self;  in pci_bridge_check_ranges()
1022 	b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];  in pci_bridge_check_ranges()
1023 	b_res->flags |= IORESOURCE_MEM;  in pci_bridge_check_ranges()
1025 	if (bridge->io_window) {  in pci_bridge_check_ranges()
1026 		b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];  in pci_bridge_check_ranges()
1027 		b_res->flags |= IORESOURCE_IO;  in pci_bridge_check_ranges()
1030 	if (bridge->pref_window) {  in pci_bridge_check_ranges()
1031 		b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in pci_bridge_check_ranges()
1032 		b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;  in pci_bridge_check_ranges()
1033 		if (bridge->pref_64_window) {  in pci_bridge_check_ranges()
1034 			b_res->flags |= IORESOURCE_MEM_64 |  in pci_bridge_check_ranges()
1099 		 * Per spec, I/O windows are 4K-aligned, but some bridges have  in window_alignment()
1102 		if (bus->self && bus->self->io_window_1k)  in window_alignment()
1113  * pbus_size_io() - Size the I/O window of a given bus
1120  * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
1121  * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
1139 	if (b_res->parent)  in pbus_size_io()
1143 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pbus_size_io()
1149 			if (r->parent || !(r->flags & IORESOURCE_IO))  in pbus_size_io()
1157 				/* Might be re-aligned for ISA */  in pbus_size_io()
1175 		b_res->flags &= ~IORESOURCE_DISABLED;  in pbus_size_io()
1185 		if (bus->self && (b_res->start || b_res->end))  in pbus_size_io()
1186 			pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",  in pbus_size_io()
1187 				 b_res, &bus->busn_res);  in pbus_size_io()
1188 		b_res->flags |= IORESOURCE_DISABLED;  in pbus_size_io()
1193 	b_res->flags |= IORESOURCE_STARTALIGN;  in pbus_size_io()
1194 	if (bus->self && size1 > size0 && realloc_head) {  in pbus_size_io()
1195 		b_res->flags &= ~IORESOURCE_DISABLED;  in pbus_size_io()
1196 		add_to_list(realloc_head, bus->self, b_res, size1-size0,  in pbus_size_io()
1198 		pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n",  in pbus_size_io()
1199 			 b_res, &bus->busn_res,  in pbus_size_io()
1200 			 (unsigned long long) size1 - size0);  in pbus_size_io()
1227  * pbus_upstream_space_available - Check no upstream resource limits allocation
1251 	while ((bus = bus->parent)) {  in pbus_upstream_space_available()
1258 		if (!res->parent)  in pbus_upstream_space_available()
1265 				gap.flags = res->flags;  in pbus_upstream_space_available()
1266 				pci_dbg(bus->self,  in pbus_upstream_space_available()
1268 					res, &bus->busn_res, &gap);  in pbus_upstream_space_available()
1273 		if (bus->self) {  in pbus_upstream_space_available()
1274 			pci_info(bus->self,  in pbus_upstream_space_available()
1276 				 res, &bus->busn_res,  in pbus_upstream_space_available()
1278 				 pci_name(downstream->self),  in pbus_upstream_space_available()
1279 				 &downstream->busn_res);  in pbus_upstream_space_available()
1289  * pbus_size_mem() - Size the memory window of a given bus
1326 	if (b_res->parent)  in pbus_size_mem()
1333 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pbus_size_mem()
1364 			order = __ffs(align) - __ffs(SZ_1M);  in pbus_size_mem()
1370 				r->flags = 0;  in pbus_size_mem()
1392 	win_align = window_alignment(bus, b_res->flags);  in pbus_size_mem()
1399 		b_res->flags &= ~IORESOURCE_DISABLED;  in pbus_size_mem()
1402 	if (bus->self && size0 &&  in pbus_size_mem()
1409 		pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n",  in pbus_size_mem()
1410 			 b_res, &bus->busn_res);  in pbus_size_mem()
1418 		if (bus->self && size1 &&  in pbus_size_mem()
1425 			pci_info(bus->self,  in pbus_size_mem()
1427 				 b_res, &bus->busn_res);  in pbus_size_mem()
1432 		if (bus->self && (b_res->start || b_res->end))  in pbus_size_mem()
1433 			pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",  in pbus_size_mem()
1434 				 b_res, &bus->busn_res);  in pbus_size_mem()
1435 		b_res->flags |= IORESOURCE_DISABLED;  in pbus_size_mem()
1440 	b_res->flags |= IORESOURCE_STARTALIGN;  in pbus_size_mem()
1441 	if (bus->self && size1 > size0 && realloc_head) {  in pbus_size_mem()
1442 		b_res->flags &= ~IORESOURCE_DISABLED;  in pbus_size_mem()
1443 		add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align);  in pbus_size_mem()
1444 		pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",  in pbus_size_mem()
1445 			   b_res, &bus->busn_res,  in pbus_size_mem()
1446 			   (unsigned long long) (size1 - size0),  in pbus_size_mem()
1453 	if (res->flags & IORESOURCE_IO)  in pci_cardbus_resource_alignment()
1455 	if (res->flags & IORESOURCE_MEM)  in pci_cardbus_resource_alignment()
1463 	struct pci_dev *bridge = bus->self;  in pci_bus_size_cardbus()
1468 	b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW];  in pci_bus_size_cardbus()
1469 	if (b_res->parent)  in pci_bus_size_cardbus()
1476 	b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;  in pci_bus_size_cardbus()
1478 		b_res->end -= pci_cardbus_io_size;  in pci_bus_size_cardbus()
1484 	b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW];  in pci_bus_size_cardbus()
1485 	if (b_res->parent)  in pci_bus_size_cardbus()
1488 	b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;  in pci_bus_size_cardbus()
1490 		b_res->end -= pci_cardbus_io_size;  in pci_bus_size_cardbus()
1504 	/* Check whether prefetchable memory is supported by this bridge. */  in pci_bus_size_cardbus()
1512 	b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW];  in pci_bus_size_cardbus()
1513 	if (b_res->parent)  in pci_bus_size_cardbus()
1516 	 * If we have prefetchable memory support, allocate two regions.  in pci_bus_size_cardbus()
1522 		b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |  in pci_bus_size_cardbus()
1525 			b_res->end -= pci_cardbus_mem_size;  in pci_bus_size_cardbus()
1535 	b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW];  in pci_bus_size_cardbus()
1536 	if (b_res->parent)  in pci_bus_size_cardbus()
1539 	b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;  in pci_bus_size_cardbus()
1541 		b_res->end -= b_res_3_size;  in pci_bus_size_cardbus()
1559 	list_for_each_entry(dev, &bus->devices, bus_list) {  in __pci_bus_size_bridges()
1560 		struct pci_bus *b = dev->subordinate;  in __pci_bus_size_bridges()
1564 		switch (dev->hdr_type) {  in __pci_bus_size_bridges()
1578 		host = to_pci_host_bridge(bus->bridge);  in __pci_bus_size_bridges()
1579 		if (!host->size_windows)  in __pci_bus_size_bridges()
1582 			if (pref && (pref->flags & IORESOURCE_PREFETCH))  in __pci_bus_size_bridges()
1584 		hdr_type = -1;	/* Intentionally invalid - not a PCI device. */  in __pci_bus_size_bridges()
1586 		pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in __pci_bus_size_bridges()
1587 		hdr_type = bus->self->hdr_type;  in __pci_bus_size_bridges()
1597 		if (bus->self->is_hotplug_bridge) {  in __pci_bus_size_bridges()
1610 				      (pref->flags & IORESOURCE_MEM_64),  in __pci_bus_size_bridges()
1638 		if ((r->flags & mask) == (parent_r->flags & mask) &&  in assign_fixed_resource_on_bus()
1655 		if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) ||  in pdev_assign_fixed_resources()
1656 		    !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))  in pdev_assign_fixed_resources()
1659 		b = dev->bus;  in pdev_assign_fixed_resources()
1660 		while (b && !r->parent) {  in pdev_assign_fixed_resources()
1662 			b = b->parent;  in pdev_assign_fixed_resources()
1676 	list_for_each_entry(dev, &bus->devices, bus_list) {  in __pci_bus_assign_resources()
1679 		b = dev->subordinate;  in __pci_bus_assign_resources()
1685 		switch (dev->hdr_type) {  in __pci_bus_assign_resources()
1697 				 pci_domain_nr(b), b->number);  in __pci_bus_assign_resources()
1714 		struct resource *r = &dev->resource[i];  in pci_claim_device_resources()
1716 		if (!r->flags || r->parent)  in pci_claim_device_resources()
1728 		struct resource *r = &dev->resource[i];  in pci_claim_bridge_resources()
1730 		if (!r->flags || r->parent)  in pci_claim_bridge_resources()
1742 	list_for_each_entry(dev, &b->devices, bus_list) {  in pci_bus_allocate_dev_resources()
1745 		child = dev->subordinate;  in pci_bus_allocate_dev_resources()
1756 	 * Carry out a depth-first search on the PCI bus tree to allocate  in pci_bus_allocate_resources()
1760 	if (b->self) {  in pci_bus_allocate_resources()
1762 		pci_claim_bridge_resources(b->self);  in pci_bus_allocate_resources()
1765 	list_for_each_entry(child, &b->children, node)  in pci_bus_allocate_resources()
1785 	b = bridge->subordinate;  in __pci_bridge_assign_resources()
1791 	switch (bridge->class >> 8) {  in __pci_bridge_assign_resources()
1802 			 pci_domain_nr(b), b->number);  in __pci_bridge_assign_resources()
1810 	struct pci_dev *dev = bus->self;  in pci_bridge_release_resources()
1813 	if (!b_win->parent)  in pci_bridge_release_resources()
1844 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pci_bus_release_bridge_resources()
1845 		struct pci_bus *b = dev->subordinate;  in pci_bus_release_bridge_resources()
1853 		if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)  in pci_bus_release_bridge_resources()
1860 			if (res->parent != b_win)  in pci_bus_release_bridge_resources()
1870 	if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)  in pci_bus_release_bridge_resources()
1883 		if (!res || !res->end || !res->flags)  in pci_bus_dump_res()
1886 		dev_info(&bus->dev, "resource %d %pR\n", i, res);  in pci_bus_dump_res()
1898 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pci_bus_dump_resources()
1899 		b = dev->subordinate;  in pci_bus_dump_resources()
1912 	list_for_each_entry(child_bus, &bus->children, node) {  in pci_bus_get_depth()
1924  * -1: undefined, will auto detect later
1931 	undefined = -1,
1959 		struct resource *r = &dev->resource[idx];  in iov_resources_unassigned()
1963 		if (!r->flags)  in iov_resources_unassigned()
1966 		pcibios_resource_to_bus(dev->bus, &region, r);  in iov_resources_unassigned()
1986 	if (host->preserve_config)  in pci_realloc_detect()
2009 	if (res->parent)  in adjust_bridge_window()
2016 		add_size = new_size - size;  in adjust_bridge_window()
2020 		add_size = size - new_size;  in adjust_bridge_window()
2044 	align = align ? ALIGN(avail->start, align) - avail->start : 0;  in remove_dev_resource()
2046 	avail->start = min(avail->start + tmp, avail->end + 1);  in remove_dev_resource()
2056 		b_win = pbus_select_window(dev->bus, res);  in remove_dev_resources()
2060 		idx = pci_resource_num(dev->bus->self, b_win);  in remove_dev_resources()
2061 		idx -= PCI_BRIDGE_RESOURCES;  in remove_dev_resources()
2082 	struct pci_dev *dev, *bridge = bus->self;  in pci_bus_distribute_available_resources()
2099 		if (!res->parent && align)  in pci_bus_distribute_available_resources()
2118 		if (dev->is_hotplug_bridge)  in pci_bus_distribute_available_resources()
2132 	list_for_each_entry(dev, &bus->devices, bus_list) {  in pci_bus_distribute_available_resources()
2133 		if (!dev->is_virtfn)  in pci_bus_distribute_available_resources()
2143 	 * split between non-hotplug bridges. This is to allow possible  in pci_bus_distribute_available_resources()
2155 		b = dev->subordinate;  in pci_bus_distribute_available_resources()
2158 		if (hotplug_bridges && !dev->is_hotplug_bridge)  in pci_bus_distribute_available_resources()
2181 			available[i].start -= resource_size(res);  in pci_bus_distribute_available_resources()
2197 	if (!bridge->is_hotplug_bridge)  in pci_bridge_distribute_available_resources()
2208 	pci_bus_distribute_available_resources(bridge->subordinate,  in pci_bridge_distribute_available_resources()
2222 	r = &dev->resource[PCI_BRIDGE_IO_WINDOW];  in pci_bridge_resources_not_assigned()
2223 	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))  in pci_bridge_resources_not_assigned()
2225 	r = &dev->resource[PCI_BRIDGE_MEM_WINDOW];  in pci_bridge_resources_not_assigned()
2226 	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))  in pci_bridge_resources_not_assigned()
2228 	r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in pci_bridge_resources_not_assigned()
2229 	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))  in pci_bridge_resources_not_assigned()
2239 	struct pci_dev *dev, *bridge = bus->self;  in pci_root_bus_distribute_available_resources()
2244 		b = dev->subordinate;  in pci_root_bus_distribute_available_resources()
2272 		struct pci_bus *bus = fail_res->dev->bus;  in pci_prepare_next_assign_round()
2275 		b_win = pbus_select_window_for_type(bus, fail_res->flags);  in pci_prepare_next_assign_round()
2310 		dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n",  in pci_assign_unassigned_root_bus_resources()
2341 				dev_info(&bus->dev,  in pci_assign_unassigned_root_bus_resources()
2344 				dev_info(&bus->dev,  in pci_assign_unassigned_root_bus_resources()
2369 		if (ACPI_HANDLE(root_bus->bridge))  in pci_assign_unassigned_resources()
2370 			acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));  in pci_assign_unassigned_resources()
2376 	struct pci_bus *parent = bridge->subordinate;  in pci_assign_unassigned_bridge_resources()
2425 	unsigned long type = res->flags;  in pbus_reassign_bridge_resources()
2437 		bridge = bus->self;  in pbus_reassign_bridge_resources()
2445 		if (!res->child) {  in pbus_reassign_bridge_resources()
2459 		bus = bus->parent;  in pbus_reassign_bridge_resources()
2464 		return -ENOENT;  in pbus_reassign_bridge_resources()
2467 	__pci_bus_size_bridges(bridge->subordinate, &added);  in pbus_reassign_bridge_resources()
2474 			ret = -ENOSPC;  in pbus_reassign_bridge_resources()
2483 		if (bridge == dev_res->dev)  in pbus_reassign_bridge_resources()
2486 		bridge = dev_res->dev;  in pbus_reassign_bridge_resources()
2487 		pci_setup_bridge(bridge->subordinate);  in pbus_reassign_bridge_resources()
2502 		struct resource *res = dev_res->res;  in pbus_reassign_bridge_resources()
2504 		bridge = dev_res->dev;  in pbus_reassign_bridge_resources()
2510 		pci_setup_bridge(bridge->subordinate);  in pbus_reassign_bridge_resources()
2527 			__pci_bus_size_bridges(dev->subordinate, &add_list);  in pci_assign_unassigned_bus_resources()