176  * pbus_select_window_for_type - Select bridge window for a resource type
180  * Select the bridge window based on a resource @type.
195  * Return: the bridge window resource or NULL if no bridge window is found.
245  * pbus_select_window - Select bridge window for a resource
249  * Select the bridge window for @res. If the resource is already assigned,
250  * return the current bridge window.
265  * Return: the bridge window resource or NULL if no bridge window is found.
632 		 * 1. bridge resource  -- IORESOURCE_STARTALIGN  in __assign_resources_sorted()
634 		 * Here just fix the additional alignment for bridge  in __assign_resources_sorted()
775 	struct pci_dev *bridge = bus->self;  in pci_setup_cardbus()  local
779 	pci_info(bridge, "CardBus bridge to %pR\n",  in pci_setup_cardbus()
783 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
789 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
790 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,  in pci_setup_cardbus()
792 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,  in pci_setup_cardbus()
797 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
799 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
800 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,  in pci_setup_cardbus()
802 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,  in pci_setup_cardbus()
807 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
809 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
810 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,  in pci_setup_cardbus()
812 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,  in pci_setup_cardbus()
817 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
819 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
820 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,  in pci_setup_cardbus()
822 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,  in pci_setup_cardbus()
830  * Bridge Architecture Specification rev. 1.1 (1998) requires that if there
831  * are no I/O ports or memory behind the bridge, the corresponding range
833  * bridge's base/limit registers.
837  * writes, so it's quite possible that an I/O window of the bridge will
841 static void pci_setup_bridge_io(struct pci_dev *bridge)  in pci_setup_bridge_io()  argument
852 	if (bridge->io_window_1k)  in pci_setup_bridge_io()
856 	res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];  in pci_setup_bridge_io()
857 	res_name = pci_resource_name(bridge, PCI_BRIDGE_IO_WINDOW);  in pci_setup_bridge_io()
858 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_io()
860 		pci_read_config_word(bridge, PCI_IO_BASE, &l);  in pci_setup_bridge_io()
866 		pci_info(bridge, "  %s %pR\n", res_name, res);  in pci_setup_bridge_io()
873 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);  in pci_setup_bridge_io()
875 	pci_write_config_word(bridge, PCI_IO_BASE, l);  in pci_setup_bridge_io()
877 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);  in pci_setup_bridge_io()
880 static void pci_setup_bridge_mmio(struct pci_dev *bridge)  in pci_setup_bridge_mmio()  argument
888 	res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];  in pci_setup_bridge_mmio()
889 	res_name = pci_resource_name(bridge, PCI_BRIDGE_MEM_WINDOW);  in pci_setup_bridge_mmio()
890 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio()
894 		pci_info(bridge, "  %s %pR\n", res_name, res);  in pci_setup_bridge_mmio()
898 	pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);  in pci_setup_bridge_mmio()
901 static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)  in pci_setup_bridge_mmio_pref()  argument
913 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);  in pci_setup_bridge_mmio_pref()
917 	res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in pci_setup_bridge_mmio_pref()
918 	res_name = pci_resource_name(bridge, PCI_BRIDGE_PREF_MEM_WINDOW);  in pci_setup_bridge_mmio_pref()
919 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio_pref()
927 		pci_info(bridge, "  %s %pR\n", res_name, res);  in pci_setup_bridge_mmio_pref()
931 	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);  in pci_setup_bridge_mmio_pref()
934 	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);  in pci_setup_bridge_mmio_pref()
935 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);  in pci_setup_bridge_mmio_pref()
940 	struct pci_dev *bridge = bus->self;  in __pci_setup_bridge()  local
942 	pci_info(bridge, "PCI bridge to %pR\n", &bus->busn_res);  in __pci_setup_bridge()
945 		pci_setup_bridge_io(bridge);  in __pci_setup_bridge()
948 		pci_setup_bridge_mmio(bridge);  in __pci_setup_bridge()
951 		pci_setup_bridge_mmio_pref(bridge);  in __pci_setup_bridge()
953 	pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);  in __pci_setup_bridge()
956 static void pci_setup_one_bridge_window(struct pci_dev *bridge, int resno)  in pci_setup_one_bridge_window()  argument
960 		pci_setup_bridge_io(bridge);  in pci_setup_one_bridge_window()
963 		pci_setup_bridge_mmio(bridge);  in pci_setup_one_bridge_window()
966 		pci_setup_bridge_mmio_pref(bridge);  in pci_setup_one_bridge_window()
987 int pci_claim_bridge_resource(struct pci_dev *bridge, int i)  in pci_claim_bridge_resource()  argument
994 	if (pci_claim_resource(bridge, i) == 0)  in pci_claim_bridge_resource()
997 	if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)  in pci_claim_bridge_resource()
1004 	if (pci_bus_clip_resource(bridge, i))  in pci_claim_bridge_resource()
1005 		ret = pci_claim_resource(bridge, i);  in pci_claim_bridge_resource()
1007 	pci_setup_one_bridge_window(bridge, i);  in pci_claim_bridge_resource()
1013  * Check whether the bridge supports optional I/O and prefetchable memory
1019 	struct pci_dev *bridge = bus->self;  in pci_bridge_check_ranges()  local
1022 	b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];  in pci_bridge_check_ranges()
1025 	if (bridge->io_window) {  in pci_bridge_check_ranges()
1026 		b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];  in pci_bridge_check_ranges()
1030 	if (bridge->pref_window) {  in pci_bridge_check_ranges()
1031 		b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];  in pci_bridge_check_ranges()
1033 		if (bridge->pref_64_window) {  in pci_bridge_check_ranges()
1120  * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
1121  * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
1186 			pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",  in pbus_size_io()
1198 		pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n",  in pbus_size_io()
1229  * @res:	The resource to help select the correct bridge window
1230  * @size:	The size required from the bridge window
1233  * Check that @size can fit inside the upstream bridge resources that are
1234  * already assigned. Select the upstream bridge window based on the type of
1267 					"Assigned bridge window %pR to %pR free space at %pR\n",  in pbus_upstream_space_available()
1275 				 "Assigned bridge window %pR to %pR cannot fit 0x%llx required for %s bridging to %pR\n",  in pbus_upstream_space_available()
1292  * @type:		The type of bridge resource
1358 			 * aligns[0] is for 1MB (since bridge memory  in pbus_size_mem()
1409 		pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n",  in pbus_size_mem()
1426 				 "bridge window %pR to %pR requires relaxed alignment rules\n",  in pbus_size_mem()
1433 			pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",  in pbus_size_mem()
1444 		pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",  in pbus_size_mem()
1463 	struct pci_dev *bridge = bus->self;  in pci_bus_size_cardbus()  local
1468 	b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW];  in pci_bus_size_cardbus()
1479 		add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,  in pci_bus_size_cardbus()
1484 	b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW];  in pci_bus_size_cardbus()
1491 		add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,  in pci_bus_size_cardbus()
1497 	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1500 		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);  in pci_bus_size_cardbus()
1501 		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1504 	/* Check whether prefetchable memory is supported by this bridge. */  in pci_bus_size_cardbus()
1505 	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1508 		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);  in pci_bus_size_cardbus()
1509 		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1512 	b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW];  in pci_bus_size_cardbus()
1526 			add_to_list(realloc_head, bridge, b_res,  in pci_bus_size_cardbus()
1535 	b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW];  in pci_bus_size_cardbus()
1542 		add_to_list(realloc_head, bridge, b_res, b_res_3_size,  in pci_bus_size_cardbus()
1578 		host = to_pci_host_bridge(bus->bridge);  in __pci_bus_size_bridges()
1696 			pci_info(dev, "not setting up bridge for bus %04x:%02x\n",  in __pci_bus_assign_resources()
1757 	 * bridge apertures.  Read the programmed bridge bases and  in pci_bus_allocate_resources()
1758 	 * recursively claim the respective bridge resources.  in pci_bus_allocate_resources()
1776 static void __pci_bridge_assign_resources(const struct pci_dev *bridge,  in __pci_bridge_assign_resources()  argument
1782 	pdev_assign_resources_sorted((struct pci_dev *)bridge,  in __pci_bridge_assign_resources()
1785 	b = bridge->subordinate;  in __pci_bridge_assign_resources()
1791 	switch (bridge->class >> 8) {  in __pci_bridge_assign_resources()
1801 		pci_info(bridge, "not setting up bridge for bus %04x:%02x\n",  in __pci_bridge_assign_resources()
1834  * Try to release PCI bridge resources from leaf bridge, so we can allocate
2003 static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,  in adjust_bridge_window()  argument
2017 		pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,  in adjust_bridge_window()
2021 		pci_dbg(bridge, "bridge window %pR shrunken by %pa\n", res,  in adjust_bridge_window()
2071  * io, mmio and mmio_pref contain the total amount of bridge window space
2082 	struct pci_dev *dev, *bridge = bus->self;  in pci_bus_distribute_available_resources()  local
2089 			pci_resource_n(bridge, PCI_BRIDGE_RESOURCES + i);  in pci_bus_distribute_available_resources()
2094 		 * The alignment of this bridge is yet to be considered,  in pci_bus_distribute_available_resources()
2095 		 * hence it must be done now before extending its bridge  in pci_bus_distribute_available_resources()
2098 		align = pci_resource_alignment(bridge, res);  in pci_bus_distribute_available_resources()
2105 		 * bridge window resources to fill as much remaining  in pci_bus_distribute_available_resources()
2108 		adjust_bridge_window(bridge, res, add_list,  in pci_bus_distribute_available_resources()
2138 	 * If there is at least one hotplug bridge on this bus it gets all  in pci_bus_distribute_available_resources()
2166 			 * aligned for bridge windows (align it down to  in pci_bus_distribute_available_resources()
2176 			 * that can be added for each bridge but there is  in pci_bus_distribute_available_resources()
2191 static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,  in pci_bridge_distribute_available_resources()  argument
2197 	if (!bridge->is_hotplug_bridge)  in pci_bridge_distribute_available_resources()
2200 	pci_dbg(bridge, "distributing available resources\n");  in pci_bridge_distribute_available_resources()
2204 		res = pci_resource_n(bridge, PCI_BRIDGE_RESOURCES + i);  in pci_bridge_distribute_available_resources()
2208 	pci_bus_distribute_available_resources(bridge->subordinate,  in pci_bridge_distribute_available_resources()
2219 	 * able to extend the upstream bridge resources in the same way we  in pci_bridge_resources_not_assigned()
2239 	struct pci_dev *dev, *bridge = bus->self;  in pci_root_bus_distribute_available_resources()  local
2249 		 * Need to check "bridge" here too because it is NULL  in pci_root_bus_distribute_available_resources()
2252 		if (bridge && pci_bridge_resources_not_assigned(dev))  in pci_root_bus_distribute_available_resources()
2268 	 * Try to release leaf bridge's resources that aren't big  in pci_prepare_next_assign_round()
2289  * First try will not touch PCI bridge res.
2290  * Second and later try will clear small leaf bridge res.
2317 		 * have as must have, so can realloc parent bridge resource  in pci_assign_unassigned_root_bus_resources()
2368 		/* Make sure the root bridge has a companion ACPI device */  in pci_assign_unassigned_resources()
2369 		if (ACPI_HANDLE(root_bus->bridge))  in pci_assign_unassigned_resources()
2370 			acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));  in pci_assign_unassigned_resources()
2374 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)  in pci_assign_unassigned_bridge_resources()  argument
2376 	struct pci_bus *parent = bridge->subordinate;  in pci_assign_unassigned_bridge_resources()
2391 		pci_bridge_distribute_available_resources(bridge, &add_list);  in pci_assign_unassigned_bridge_resources()
2393 		__pci_bridge_assign_resources(bridge, &add_list, &fail_head);  in pci_assign_unassigned_bridge_resources()
2411 	ret = pci_reenable_device(bridge);  in pci_assign_unassigned_bridge_resources()
2413 		pci_err(bridge, "Error reenabling bridge (%d)\n", ret);  in pci_assign_unassigned_bridge_resources()
2414 	pci_set_master(bridge);  in pci_assign_unassigned_bridge_resources()
2419  * Walk to the root bus, find the bridge window relevant for @res and
2420  * release it when possible. If the bridge window contains assigned
2427 	struct pci_dev *bridge;  in pbus_reassign_bridge_resources()  local
2437 		bridge = bus->self;  in pbus_reassign_bridge_resources()
2442 		i = pci_resource_num(bridge, res);  in pbus_reassign_bridge_resources()
2446 			ret = add_to_list(&saved, bridge, res, 0, 0);  in pbus_reassign_bridge_resources()
2450 			pci_release_resource(bridge, i);  in pbus_reassign_bridge_resources()
2452 			const char *res_name = pci_resource_name(bridge, i);  in pbus_reassign_bridge_resources()
2454 			pci_warn(bridge,  in pbus_reassign_bridge_resources()
2467 	__pci_bus_size_bridges(bridge->subordinate, &added);  in pbus_reassign_bridge_resources()
2468 	__pci_bridge_assign_resources(bridge, &added, &failed);  in pbus_reassign_bridge_resources()
2482 		/* Skip the bridge we just assigned resources for */  in pbus_reassign_bridge_resources()
2483 		if (bridge == dev_res->dev)  in pbus_reassign_bridge_resources()
2486 		bridge = dev_res->dev;  in pbus_reassign_bridge_resources()
2487 		pci_setup_bridge(bridge->subordinate);  in pbus_reassign_bridge_resources()
2504 		bridge = dev_res->dev;  in pbus_reassign_bridge_resources()
2505 		i = pci_resource_num(bridge, res);  in pbus_reassign_bridge_resources()
2509 		pci_claim_resource(bridge, i);  in pbus_reassign_bridge_resources()
2510 		pci_setup_bridge(bridge->subordinate);  in pbus_reassign_bridge_resources()