Lines Matching +full:scan +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/delay.h>
54 if (r->domain_nr == domain_nr) in get_pci_domain_busn_res()
55 return &r->res; in get_pci_domain_busn_res()
61 r->domain_nr = domain_nr; in get_pci_domain_busn_res()
62 r->res.start = 0; in get_pci_domain_busn_res()
63 r->res.end = 0xff; in get_pci_domain_busn_res()
64 r->res.flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED; in get_pci_domain_busn_res()
66 list_add_tail(&r->list, &pci_domain_busn_res_list); in get_pci_domain_busn_res()
68 return &r->res; in get_pci_domain_busn_res()
95 put_device(pci_bus->bridge); in release_pcibus_dev()
123 size = size & ~(size-1); in pci_size()
129 if (base == maxbase && ((base | (size - 1)) & mask) != mask) in pci_size()
156 /* 1M mem BAR treated as 32-bit BAR */ in decode_bar()
162 /* mem unknown type treated as 32-bit BAR */ in decode_bar()
171 * __pci_size_bars - Read the raw BAR mask for a range of PCI BARs
182 * non-trivial overhead in virtualized environments with very large PCI BARs.
210 * __pci_read_base - Read a PCI BAR
215 * @sizes: array of one or more pre-read BAR masks
217 * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
225 const char *res_name = pci_resource_name(dev, res - dev->resource); in __pci_read_base()
227 res->name = pci_name(dev); in __pci_read_base()
249 res->flags = decode_bar(dev, l); in __pci_read_base()
250 res->flags |= IORESOURCE_SIZEALIGN; in __pci_read_base()
251 if (res->flags & IORESOURCE_IO) { in __pci_read_base()
262 res->flags |= IORESOURCE_ROM_ENABLE; in __pci_read_base()
268 if (res->flags & IORESOURCE_MEM_64) { in __pci_read_base()
286 if (res->flags & IORESOURCE_MEM_64) { in __pci_read_base()
289 res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; in __pci_read_base()
290 res->start = 0; in __pci_read_base()
291 res->end = 0; in __pci_read_base()
298 /* Above 32-bit boundary; try to reallocate */ in __pci_read_base()
299 res->flags |= IORESOURCE_UNSET; in __pci_read_base()
300 res->start = 0; in __pci_read_base()
301 res->end = sz64 - 1; in __pci_read_base()
309 region.end = l64 + sz64 - 1; in __pci_read_base()
311 pcibios_bus_to_resource(dev->bus, res, ®ion); in __pci_read_base()
312 pcibios_resource_to_bus(dev->bus, &inverted_region, res); in __pci_read_base()
326 res->flags |= IORESOURCE_UNSET; in __pci_read_base()
327 res->start = 0; in __pci_read_base()
328 res->end = region.end - region.start; in __pci_read_base()
337 res->flags = 0; in __pci_read_base()
339 if (res->flags) in __pci_read_base()
342 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; in __pci_read_base()
354 if (dev->non_compliant_bars) in pci_read_bases()
358 if (dev->is_virtfn) in pci_read_bases()
362 if (!dev->mmio_always_on) { in pci_read_bases()
374 if (!dev->mmio_always_on && in pci_read_bases()
379 struct resource *res = &dev->resource[pos]; in pci_read_bases()
386 struct resource *res = &dev->resource[PCI_ROM_RESOURCE]; in pci_read_bases()
387 dev->rom_base_reg = rom; in pci_read_bases()
388 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | in pci_read_bases()
403 if (dev->io_window_1k) { in pci_read_bridge_io()
423 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; in pci_read_bridge_io()
427 region.end = limit + io_granularity - 1; in pci_read_bridge_io()
428 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_read_bridge_io()
433 res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; in pci_read_bridge_io()
449 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; in pci_read_bridge_mmio()
454 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_read_bridge_mmio()
459 res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; in pci_read_bridge_mmio()
502 res->flags = (mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) | IORESOURCE_MEM | in pci_read_bridge_mmio_pref()
504 if (res->flags & PCI_PREF_RANGE_TYPE_64) in pci_read_bridge_mmio_pref()
505 res->flags |= IORESOURCE_MEM_64; in pci_read_bridge_mmio_pref()
510 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_read_bridge_mmio_pref()
515 res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; in pci_read_bridge_mmio_pref()
531 bridge->transparent ? " (subtractive decode)" : ""); in pci_read_bridge_windows()
540 bridge->io_window = 1; in pci_read_bridge_windows()
551 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001) in pci_read_bridge_windows()
564 bridge->pref_window = 1; in pci_read_bridge_windows()
569 * Bridge claims to have a 64-bit prefetchable memory in pci_read_bridge_windows()
579 bridge->pref_64_window = 1; in pci_read_bridge_windows()
587 struct pci_dev *dev = child->self; in pci_read_bridge_bases()
595 &child->busn_res, in pci_read_bridge_bases()
596 dev->transparent ? " (subtractive decode)" : ""); in pci_read_bridge_bases()
600 child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i]; in pci_read_bridge_bases()
602 pci_read_bridge_io(child->self, in pci_read_bridge_bases()
603 child->resource[PCI_BUS_BRIDGE_IO_WINDOW], false); in pci_read_bridge_bases()
604 pci_read_bridge_mmio(child->self, in pci_read_bridge_bases()
605 child->resource[PCI_BUS_BRIDGE_MEM_WINDOW], false); in pci_read_bridge_bases()
606 pci_read_bridge_mmio_pref(child->self, in pci_read_bridge_bases()
607 child->resource[PCI_BUS_BRIDGE_PREF_MEM_WINDOW], in pci_read_bridge_bases()
610 if (!dev->transparent) in pci_read_bridge_bases()
613 pci_bus_for_each_resource(child->parent, res) { in pci_read_bridge_bases()
614 if (!res || !res->flags) in pci_read_bridge_bases()
630 INIT_LIST_HEAD(&b->node); in pci_alloc_bus()
631 INIT_LIST_HEAD(&b->children); in pci_alloc_bus()
632 INIT_LIST_HEAD(&b->devices); in pci_alloc_bus()
633 INIT_LIST_HEAD(&b->slots); in pci_alloc_bus()
634 INIT_LIST_HEAD(&b->resources); in pci_alloc_bus()
635 b->max_bus_speed = PCI_SPEED_UNKNOWN; in pci_alloc_bus()
636 b->cur_bus_speed = PCI_SPEED_UNKNOWN; in pci_alloc_bus()
639 b->domain_nr = parent->domain_nr; in pci_alloc_bus()
648 if (bridge->release_fn) in pci_release_host_bridge_dev()
649 bridge->release_fn(bridge); in pci_release_host_bridge_dev()
651 pci_free_resource_list(&bridge->windows); in pci_release_host_bridge_dev()
652 pci_free_resource_list(&bridge->dma_ranges); in pci_release_host_bridge_dev()
658 INIT_LIST_HEAD(&bridge->windows); in pci_init_host_bridge()
659 INIT_LIST_HEAD(&bridge->dma_ranges); in pci_init_host_bridge()
667 bridge->native_aer = 1; in pci_init_host_bridge()
668 bridge->native_pcie_hotplug = 1; in pci_init_host_bridge()
669 bridge->native_shpc_hotplug = 1; in pci_init_host_bridge()
670 bridge->native_pme = 1; in pci_init_host_bridge()
671 bridge->native_ltr = 1; in pci_init_host_bridge()
672 bridge->native_dpc = 1; in pci_init_host_bridge()
673 bridge->domain_nr = PCI_DOMAIN_NR_NOT_SET; in pci_init_host_bridge()
674 bridge->native_cxl_error = 1; in pci_init_host_bridge()
676 device_initialize(&bridge->dev); in pci_init_host_bridge()
688 bridge->dev.release = pci_release_host_bridge_dev; in pci_alloc_host_bridge()
709 bridge->dev.parent = dev; in devm_pci_alloc_host_bridge()
726 put_device(&bridge->dev); in pci_free_host_bridge()
777 "66 MHz PCI-X", /* 0x02 */ in pci_speed_string()
778 "100 MHz PCI-X", /* 0x03 */ in pci_speed_string()
779 "133 MHz PCI-X", /* 0x04 */ in pci_speed_string()
784 "66 MHz PCI-X 266", /* 0x09 */ in pci_speed_string()
785 "100 MHz PCI-X 266", /* 0x0a */ in pci_speed_string()
786 "133 MHz PCI-X 266", /* 0x0b */ in pci_speed_string()
792 "66 MHz PCI-X 533", /* 0x11 */ in pci_speed_string()
793 "100 MHz PCI-X 533", /* 0x12 */ in pci_speed_string()
794 "133 MHz PCI-X 533", /* 0x13 */ in pci_speed_string()
811 struct pci_dev *bridge = bus->self; in pcie_update_link_speed()
853 struct pci_dev *bridge = bus->self; in pci_set_bus_speed()
863 bus->max_bus_speed = agp_speed(agpstat & 8, agpstat & 7); in pci_set_bus_speed()
866 bus->cur_bus_speed = agp_speed(agpstat & 8, agpcmd & 7); in pci_set_bus_speed()
890 bus->max_bus_speed = max; in pci_set_bus_speed()
891 bus->cur_bus_speed = in pci_set_bus_speed()
901 bus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS]; in pci_set_bus_speed()
912 d = dev_get_msi_domain(bus->bridge); in pci_host_bridge_msi_domain()
945 * created by an SR-IOV device. Walk up to the first bridge device in pci_set_bus_msi_domain()
948 for (b = bus, d = NULL; !d && !pci_is_root_bus(b); b = b->parent) { in pci_set_bus_msi_domain()
949 if (b->self) in pci_set_bus_msi_domain()
950 d = dev_get_msi_domain(&b->self->dev); in pci_set_bus_msi_domain()
956 dev_set_msi_domain(&bus->dev, d); in pci_set_bus_msi_domain()
964 if (host_bridge->dev.parent && host_bridge->dev.parent->of_node) in pci_preserve_config()
965 return of_pci_preserve_config(host_bridge->dev.parent->of_node); in pci_preserve_config()
972 struct device *parent = bridge->dev.parent; in pci_register_host_bridge()
985 return -ENOMEM; in pci_register_host_bridge()
987 bridge->bus = bus; in pci_register_host_bridge()
989 bus->sysdata = bridge->sysdata; in pci_register_host_bridge()
990 bus->ops = bridge->ops; in pci_register_host_bridge()
991 bus->number = bus->busn_res.start = bridge->busnr; in pci_register_host_bridge()
993 if (bridge->domain_nr == PCI_DOMAIN_NR_NOT_SET) in pci_register_host_bridge()
994 bus->domain_nr = pci_bus_find_domain_nr(bus, parent); in pci_register_host_bridge()
996 bus->domain_nr = bridge->domain_nr; in pci_register_host_bridge()
997 if (bus->domain_nr < 0) { in pci_register_host_bridge()
998 err = bus->domain_nr; in pci_register_host_bridge()
1003 b = pci_find_bus(pci_domain_nr(bus), bridge->busnr); in pci_register_host_bridge()
1006 dev_dbg(&b->dev, "bus already known\n"); in pci_register_host_bridge()
1007 err = -EEXIST; in pci_register_host_bridge()
1011 dev_set_name(&bridge->dev, "pci%04x:%02x", pci_domain_nr(bus), in pci_register_host_bridge()
1012 bridge->busnr); in pci_register_host_bridge()
1019 list_splice_init(&bridge->windows, &resources); in pci_register_host_bridge()
1020 err = device_add(&bridge->dev); in pci_register_host_bridge()
1024 bus->bridge = get_device(&bridge->dev); in pci_register_host_bridge()
1025 device_enable_async_suspend(bus->bridge); in pci_register_host_bridge()
1028 if (bridge->msi_domain && !dev_get_msi_domain(&bus->dev) && in pci_register_host_bridge()
1030 bus->bus_flags |= PCI_BUS_FLAGS_NO_MSI; in pci_register_host_bridge()
1033 set_dev_node(bus->bridge, pcibus_to_node(bus)); in pci_register_host_bridge()
1035 bus->dev.class = &pcibus_class; in pci_register_host_bridge()
1036 bus->dev.parent = bus->bridge; in pci_register_host_bridge()
1038 dev_set_name(&bus->dev, "%04x:%02x", pci_domain_nr(bus), bus->number); in pci_register_host_bridge()
1039 name = dev_name(&bus->dev); in pci_register_host_bridge()
1041 err = device_register(&bus->dev); in pci_register_host_bridge()
1048 if (bus->ops->add_bus) { in pci_register_host_bridge()
1049 err = bus->ops->add_bus(bus); in pci_register_host_bridge()
1051 dev_err(&bus->dev, "failed to add bus: %d\n", err); in pci_register_host_bridge()
1063 dev_warn(&bus->dev, "Unknown NUMA node; performance will be reduced\n"); in pci_register_host_bridge()
1066 bridge->preserve_config = pci_preserve_config(bridge); in pci_register_host_bridge()
1070 if (list_is_last(&window->node, &resources)) in pci_register_host_bridge()
1074 offset = window->offset; in pci_register_host_bridge()
1075 res = window->res; in pci_register_host_bridge()
1076 next_offset = next->offset; in pci_register_host_bridge()
1077 next_res = next->res; in pci_register_host_bridge()
1079 if (res->flags != next_res->flags || offset != next_offset) in pci_register_host_bridge()
1082 if (res->end + 1 == next_res->start) { in pci_register_host_bridge()
1083 next_res->start = res->start; in pci_register_host_bridge()
1084 res->flags = res->start = res->end = 0; in pci_register_host_bridge()
1090 offset = window->offset; in pci_register_host_bridge()
1091 res = window->res; in pci_register_host_bridge()
1092 if (!res->flags && !res->start && !res->end) { in pci_register_host_bridge()
1098 list_move_tail(&window->node, &bridge->windows); in pci_register_host_bridge()
1100 if (res->flags & IORESOURCE_BUS) in pci_register_host_bridge()
1101 pci_bus_insert_busn_res(bus, bus->number, res->end); in pci_register_host_bridge()
1107 fmt = " (bus address [%#06llx-%#06llx])"; in pci_register_host_bridge()
1109 fmt = " (bus address [%#010llx-%#010llx])"; in pci_register_host_bridge()
1112 (unsigned long long)(res->start - offset), in pci_register_host_bridge()
1113 (unsigned long long)(res->end - offset)); in pci_register_host_bridge()
1117 dev_info(&bus->dev, "root bus resource %pR%s\n", res, addr); in pci_register_host_bridge()
1123 list_add_tail(&bus->node, &pci_root_buses); in pci_register_host_bridge()
1129 put_device(&bridge->dev); in pci_register_host_bridge()
1130 device_del(&bridge->dev); in pci_register_host_bridge()
1133 pci_bus_release_domain_nr(parent, bus->domain_nr); in pci_register_host_bridge()
1136 put_device(&bus->dev); in pci_register_host_bridge()
1152 if (bridge->bus->bus_flags & PCI_BUS_FLAGS_NO_EXTCFG) in pci_bridge_child_ext_cfg_accessible()
1168 * - PCI-to-PCI bridges in pci_bridge_child_ext_cfg_accessible()
1169 * - PCIe-to-PCI/PCI-X forward bridges in pci_bridge_child_ext_cfg_accessible()
1170 * - PCI/PCI-X-to-PCIe reverse bridges in pci_bridge_child_ext_cfg_accessible()
1172 * if the bridge supports PCI-X Mode 2. in pci_bridge_child_ext_cfg_accessible()
1195 child->parent = parent; in pci_alloc_child_bus()
1196 child->sysdata = parent->sysdata; in pci_alloc_child_bus()
1197 child->bus_flags = parent->bus_flags; in pci_alloc_child_bus()
1200 if (host->child_ops) in pci_alloc_child_bus()
1201 child->ops = host->child_ops; in pci_alloc_child_bus()
1203 child->ops = parent->ops; in pci_alloc_child_bus()
1209 child->dev.class = &pcibus_class; in pci_alloc_child_bus()
1210 dev_set_name(&child->dev, "%04x:%02x", pci_domain_nr(child), busnr); in pci_alloc_child_bus()
1213 child->number = child->busn_res.start = busnr; in pci_alloc_child_bus()
1214 child->primary = parent->busn_res.start; in pci_alloc_child_bus()
1215 child->busn_res.end = 0xff; in pci_alloc_child_bus()
1218 child->dev.parent = parent->bridge; in pci_alloc_child_bus()
1222 child->self = bridge; in pci_alloc_child_bus()
1223 child->bridge = get_device(&bridge->dev); in pci_alloc_child_bus()
1224 child->dev.parent = child->bridge; in pci_alloc_child_bus()
1234 child->bus_flags |= PCI_BUS_FLAGS_NO_EXTCFG; in pci_alloc_child_bus()
1240 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i]; in pci_alloc_child_bus()
1241 child->resource[i]->name = child->name; in pci_alloc_child_bus()
1243 bridge->subordinate = child; in pci_alloc_child_bus()
1247 ret = device_register(&child->dev); in pci_alloc_child_bus()
1249 put_device(&child->dev); in pci_alloc_child_bus()
1255 if (child->ops->add_bus) { in pci_alloc_child_bus()
1256 ret = child->ops->add_bus(child); in pci_alloc_child_bus()
1258 dev_err(&child->dev, "failed to add bus: %d\n", ret); in pci_alloc_child_bus()
1275 list_add_tail(&child->node, &parent->children); in pci_add_new_bus()
1291 pdev->config_rrs_sv = 1; in pci_enable_rrs_sv()
1298 * pci_ea_fixed_busnrs() - Read fixed Secondary and Subordinate bus
1314 if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) in pci_ea_fixed_busnrs()
1335 * pci_scan_bridge_extend() - Scan buses behind a bridge
1342 * distributed equally between hotplug-capable bridges.
1343 * @pass: Either %0 (scan already configured bridges) or %1 (scan bridges
1346 * If it's a bridge, configure it and scan the bus behind it.
1347 * For CardBus bridges, we don't scan behind as the devices will
1350 * We need to process bridges in two passes -- first we scan those
1362 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS); in pci_scan_bridge_extend()
1375 pm_runtime_get_sync(&dev->dev); in pci_scan_bridge_extend()
1382 pci_dbg(dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n", in pci_scan_bridge_extend()
1385 if (!primary && (primary != bus->number) && secondary && subordinate) { in pci_scan_bridge_extend()
1387 primary = bus->number; in pci_scan_bridge_extend()
1392 (primary != bus->number || secondary <= bus->number || in pci_scan_bridge_extend()
1394 pci_info(dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n", in pci_scan_bridge_extend()
1400 * Disable Master-Abort Mode during probing to avoid reporting of in pci_scan_bridge_extend()
1429 child->primary = primary; in pci_scan_bridge_extend()
1431 child->bridge_ctl = bctl; in pci_scan_bridge_extend()
1434 buses = subordinate - secondary; in pci_scan_bridge_extend()
1440 /* Subordinate should equal child->busn_res.end */ in pci_scan_bridge_extend()
1477 * This can happen when a bridge is hot-plugged, so in this in pci_scan_bridge_extend()
1478 * case we only re-scan this bus. in pci_scan_bridge_extend()
1486 bus->busn_res.end); in pci_scan_bridge_extend()
1490 available_buses--; in pci_scan_bridge_extend()
1493 | ((unsigned int)(child->primary) << 0) in pci_scan_bridge_extend()
1494 | ((unsigned int)(child->busn_res.start) << 8) in pci_scan_bridge_extend()
1495 | ((unsigned int)(child->busn_res.end) << 16); in pci_scan_bridge_extend()
1510 child->bridge_ctl = bctl; in pci_scan_bridge_extend()
1516 * cards with a PCI-to-PCI bridge can be inserted in pci_scan_bridge_extend()
1524 while (parent->parent) { in pci_scan_bridge_extend()
1526 (parent->busn_res.end > max) && in pci_scan_bridge_extend()
1527 (parent->busn_res.end <= max+i)) { in pci_scan_bridge_extend()
1530 parent = parent->parent; in pci_scan_bridge_extend()
1536 * bridges -- try to leave one in pci_scan_bridge_extend()
1557 sprintf(child->name, in pci_scan_bridge_extend()
1559 pci_domain_nr(bus), child->number); in pci_scan_bridge_extend()
1562 while (bus->parent) { in pci_scan_bridge_extend()
1563 if ((child->busn_res.end > bus->busn_res.end) || in pci_scan_bridge_extend()
1564 (child->number > bus->busn_res.end) || in pci_scan_bridge_extend()
1565 (child->number < bus->number) || in pci_scan_bridge_extend()
1566 (child->busn_res.end < bus->number)) { in pci_scan_bridge_extend()
1567 …dev_info(&dev->dev, "devices behind bridge are unusable because %pR cannot be assigned for them\n", in pci_scan_bridge_extend()
1568 &child->busn_res); in pci_scan_bridge_extend()
1571 bus = bus->parent; in pci_scan_bridge_extend()
1580 pm_runtime_put(&dev->dev); in pci_scan_bridge_extend()
1586 * pci_scan_bridge() - Scan buses behind a bridge
1590 * @pass: Either %0 (scan already configured bridges) or %1 (scan bridges
1593 * If it's a bridge, configure it and scan the bus behind it.
1594 * For CardBus bridges, we don't scan behind as the devices will
1597 * We need to process bridges in two passes -- first we scan those
1612 * The architecture-dependent code can tweak these, of course.
1619 if (dev->is_virtfn) { in pci_read_irq()
1620 dev->pin = 0; in pci_read_irq()
1621 dev->irq = 0; in pci_read_irq()
1626 dev->pin = irq; in pci_read_irq()
1629 dev->irq = irq; in pci_read_irq()
1644 pdev->pcie_cap = pos; in set_pcie_port_type()
1646 pdev->pcie_flags_reg = reg16; in set_pcie_port_type()
1652 pci_read_config_dword(pdev, pos + PCI_EXP_DEVCAP, &pdev->devcap); in set_pcie_port_type()
1653 pdev->pcie_mpss = FIELD_GET(PCI_EXP_DEVCAP_PAYLOAD, pdev->devcap); in set_pcie_port_type()
1657 pdev->link_active_reporting = 1; in set_pcie_port_type()
1676 pdev->pcie_flags_reg &= ~PCI_EXP_FLAGS_TYPE; in set_pcie_port_type()
1677 pdev->pcie_flags_reg |= PCI_EXP_TYPE_UPSTREAM; in set_pcie_port_type()
1687 pdev->pcie_flags_reg &= ~PCI_EXP_FLAGS_TYPE; in set_pcie_port_type()
1688 pdev->pcie_flags_reg |= PCI_EXP_TYPE_DOWNSTREAM; in set_pcie_port_type()
1699 pdev->is_hotplug_bridge = pdev->is_pciehp = 1; in set_pcie_hotplug_bridge()
1709 dev->is_thunderbolt = 1; in set_pcie_thunderbolt()
1722 if (parent->untrusted) { in set_pcie_untrusted()
1723 dev->untrusted = true; in set_pcie_untrusted()
1729 dev->untrusted = true; in set_pcie_untrusted()
1750 if (dev_is_removable(&parent->dev)) { in pci_set_removable()
1751 dev_set_removable(&dev->dev, DEVICE_REMOVABLE); in pci_set_removable()
1757 dev_set_removable(&dev->dev, DEVICE_REMOVABLE); in pci_set_removable()
1762 * pci_ext_cfg_is_aliased - Is ext config space just an alias of std config?
1765 * PCI Express to PCI/PCI-X Bridge Specification, rev 1.0, 4.1.4 says that
1774 * ASM1083/1085 PCIe-to-PCI Reversible Bridge (1b21:1080, rev 01 & 03)
1799 * pci_cfg_space_size_ext - Get the configuration space size of the PCI device
1802 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
1830 * Per the SR-IOV specification (rev 1.1, sec 3.5), VFs are required to in pci_cfg_space_size()
1834 * the fact that the SR-IOV capability on the PF resides in extended in pci_cfg_space_size()
1835 * config space and must be accessible and non-aliased to have enabled in pci_cfg_space_size()
1839 if (dev->is_virtfn) in pci_cfg_space_size()
1843 if (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_EXTCFG) in pci_cfg_space_size()
1846 class = dev->class >> 8; in pci_cfg_space_size()
1869 if (dev->is_virtfn) in pci_class()
1870 return dev->physfn->sriov->class; in pci_class()
1879 if (dev->is_virtfn) { in pci_subsystem_ids()
1880 *vendor = dev->physfn->sriov->subsystem_vendor; in pci_subsystem_ids()
1881 *device = dev->physfn->sriov->subsystem_device; in pci_subsystem_ids()
1894 if (dev->is_virtfn) in pci_hdr_type()
1895 return dev->physfn->sriov->hdr_type; in pci_hdr_type()
1904 * pci_intx_mask_broken - Test PCI_COMMAND_INTX_DISABLE writability
1908 * at enumeration-time to avoid modifying PCI_COMMAND at run-time.
1922 * PCI_COMMAND_INTX_DISABLE was reserved and read-only prior to PCI in pci_intx_mask_broken()
1955 "PCIe to PCI/PCI-X bridge", in pci_type_str()
1956 "PCI/PCI-X to PCIe bridge", in pci_type_str()
1970 switch (dev->hdr_type) { in pci_type_str()
1983 * pci_setup_device - Fill in class and map information of a device
1987 * vendor,class,memory and IO-space addresses, IRQ lines etc.
2003 dev->sysdata = dev->bus->sysdata; in pci_setup_device()
2004 dev->dev.parent = dev->bus->bridge; in pci_setup_device()
2005 dev->dev.bus = &pci_bus_type; in pci_setup_device()
2006 dev->hdr_type = FIELD_GET(PCI_HEADER_TYPE_MASK, hdr_type); in pci_setup_device()
2007 dev->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr_type); in pci_setup_device()
2008 dev->error_state = pci_channel_io_normal; in pci_setup_device()
2019 * Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer) in pci_setup_device()
2022 dev->dma_mask = 0xffffffff; in pci_setup_device()
2024 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus), in pci_setup_device()
2025 dev->bus->number, PCI_SLOT(dev->devfn), in pci_setup_device()
2026 PCI_FUNC(dev->devfn)); in pci_setup_device()
2030 dev->revision = class & 0xff; in pci_setup_device()
2031 dev->class = class >> 8; /* upper 3 bytes */ in pci_setup_device()
2036 /* Need to have dev->class ready */ in pci_setup_device()
2037 dev->cfg_size = pci_cfg_space_size(dev); in pci_setup_device()
2039 /* Need to have dev->cfg_size ready */ in pci_setup_device()
2045 dev->supported_speeds = pcie_get_supported_speeds(dev); in pci_setup_device()
2048 dev->current_state = PCI_UNKNOWN; in pci_setup_device()
2056 dev->vendor, dev->device, dev->hdr_type, dev->class, in pci_setup_device()
2060 class = dev->class >> 8; in pci_setup_device()
2062 if (dev->non_compliant_bars && !dev->mmio_always_on) { in pci_setup_device()
2065 pci_info(dev, "device has non-compliant BARs; disabling IO/MEM decoding\n"); in pci_setup_device()
2072 dev->broken_intx_masking = pci_intx_mask_broken(dev); in pci_setup_device()
2074 switch (dev->hdr_type) { /* header type */ in pci_setup_device()
2081 pci_subsystem_ids(dev, &dev->subsystem_vendor, &dev->subsystem_device); in pci_setup_device()
2086 * addresses. These are not always echoed in BAR0-3, and in pci_setup_device()
2087 * BAR0-3 in a few cases contain junk! in pci_setup_device()
2095 res = &dev->resource[0]; in pci_setup_device()
2096 res->flags = LEGACY_IO_RESOURCE; in pci_setup_device()
2097 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_setup_device()
2102 res = &dev->resource[1]; in pci_setup_device()
2103 res->flags = LEGACY_IO_RESOURCE; in pci_setup_device()
2104 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_setup_device()
2111 res = &dev->resource[2]; in pci_setup_device()
2112 res->flags = LEGACY_IO_RESOURCE; in pci_setup_device()
2113 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_setup_device()
2118 res = &dev->resource[3]; in pci_setup_device()
2119 res->flags = LEGACY_IO_RESOURCE; in pci_setup_device()
2120 pcibios_bus_to_resource(dev->bus, res, ®ion); in pci_setup_device()
2129 * The PCI-to-PCI bridge spec requires that subtractive in pci_setup_device()
2134 dev->transparent = ((dev->class & 0xff) == 1); in pci_setup_device()
2140 pci_read_config_word(dev, pos + PCI_SSVID_VENDOR_ID, &dev->subsystem_vendor); in pci_setup_device()
2141 pci_read_config_word(dev, pos + PCI_SSVID_DEVICE_ID, &dev->subsystem_device); in pci_setup_device()
2150 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor); in pci_setup_device()
2151 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device); in pci_setup_device()
2156 dev->hdr_type); in pci_setup_device()
2158 return -EIO; in pci_setup_device()
2162 dev->class, dev->hdr_type); in pci_setup_device()
2163 dev->class = PCI_CLASS_NOT_DEFINED << 8; in pci_setup_device()
2178 /* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */ in pci_configure_mps()
2179 if (dev->is_virtfn) in pci_configure_mps()
2190 mps = 128 << dev->pcie_mpss; in pci_configure_mps()
2221 mpss = 128 << dev->pcie_mpss; in pci_configure_mps()
2225 mpss, p_mps, 128 << bridge->pcie_mpss); in pci_configure_mps()
2261 host = pci_find_host_bridge(dev->bus); in pci_configure_extended_tags()
2269 if (host->no_ext_tags) { in pci_configure_extended_tags()
2287 * pcie_relaxed_ordering_enabled - Probe for PCIe relaxed ordering enable
2307 if (dev->is_virtfn) in pci_configure_relaxed_ordering()
2315 * Ports. Peer-to-Peer DMA is another can of worms. in pci_configure_relaxed_ordering()
2321 if (root->dev_flags & PCI_DEV_FLAGS_NO_RELAXED_ORDERING) { in pci_configure_relaxed_ordering()
2350 dev->eetlp_prefix_max = eetlp_max; in pci_configure_eetlp_prefix()
2353 if (bridge && bridge->eetlp_prefix_max) in pci_configure_eetlp_prefix()
2354 dev->eetlp_prefix_max = eetlp_max; in pci_configure_eetlp_prefix()
2362 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { in pci_configure_serr()
2398 * pci_release_dev - Free a PCI device structure when all users of it are
2413 pci_bus_put(pci_dev->bus); in pci_release_dev()
2414 kfree(pci_dev->driver_override); in pci_release_dev()
2415 bitmap_free(pci_dev->dma_alias_mask); in pci_release_dev()
2432 INIT_LIST_HEAD(&dev->bus_list); in pci_alloc_dev()
2433 dev->dev.type = &pci_dev_type; in pci_alloc_dev()
2434 dev->bus = pci_bus_get(bus); in pci_alloc_dev()
2435 dev->driver_exclusive_resource = (struct resource) { in pci_alloc_dev()
2438 .end = -1, in pci_alloc_dev()
2441 spin_lock_init(&dev->pcie_cap_lock); in pci_alloc_dev()
2443 raw_spin_lock_init(&dev->msi_lock); in pci_alloc_dev()
2452 int delay = 1; in pci_bus_wait_rrs() local
2466 if (delay > timeout) { in pci_bus_wait_rrs()
2468 pci_domain_nr(bus), bus->number, in pci_bus_wait_rrs()
2469 PCI_SLOT(devfn), PCI_FUNC(devfn), delay - 1); in pci_bus_wait_rrs()
2473 if (delay >= 1000) in pci_bus_wait_rrs()
2475 pci_domain_nr(bus), bus->number, in pci_bus_wait_rrs()
2476 PCI_SLOT(devfn), PCI_FUNC(devfn), delay - 1); in pci_bus_wait_rrs()
2478 msleep(delay); in pci_bus_wait_rrs()
2479 delay *= 2; in pci_bus_wait_rrs()
2485 if (delay >= 1000) in pci_bus_wait_rrs()
2487 pci_domain_nr(bus), bus->number, in pci_bus_wait_rrs()
2488 PCI_SLOT(devfn), PCI_FUNC(devfn), delay - 1); in pci_bus_wait_rrs()
2514 struct pci_dev *bridge = bus->self; in pci_bus_read_dev_vendor_id()
2520 if (bridge && bridge->vendor == PCI_VENDOR_ID_IDT && in pci_bus_read_dev_vendor_id()
2521 bridge->device == 0x80b5) in pci_bus_read_dev_vendor_id()
2536 np = of_pci_find_child_device(dev_of_node(&bus->dev), devfn); in pci_pwrctrl_create_device()
2542 put_device(&pdev->dev); in pci_pwrctrl_create_device()
2552 pr_debug("PCI/pwrctrl: Skipping OF node: %s\n", np->name); in pci_pwrctrl_create_device()
2557 pdev = of_platform_device_create(np, NULL, &host->dev); in pci_pwrctrl_create_device()
2559 pr_err("PCI/pwrctrl: Failed to create pwrctrl device for node: %s\n", np->name); in pci_pwrctrl_create_device()
2580 * Read the config data for a PCI device, sanity-check it,
2604 dev->devfn = devfn; in pci_scan_device()
2605 dev->vendor = l & 0xffff; in pci_scan_device()
2606 dev->device = (l >> 16) & 0xffff; in pci_scan_device()
2609 pci_bus_put(dev->bus); in pci_scan_device()
2628 /* Multi-function PCIe devices share the same link/status */ in pcie_report_downtraining()
2629 if (PCI_FUNC(dev->devfn) != 0 || dev->is_virtfn) in pcie_report_downtraining()
2642 dev->imm_ready = 1; in pci_imm_ready_init()
2649 pci_msix_init(dev); /* Disable MSI-X */ in pci_init_capabilities()
2651 /* Buffers for saving PCIe and PCI-X capabilities */ in pci_init_capabilities()
2657 pci_configure_ari(dev); /* Alternative Routing-ID Forwarding */ in pci_init_capabilities()
2678 * per-device basis should be called from here.
2688 d = dev_get_msi_domain(&dev->dev); in pci_dev_msi_domain()
2709 * device-specific MSI domain, then inherit the default domain in pci_set_msi_domain()
2714 d = dev_get_msi_domain(&dev->bus->dev); in pci_set_msi_domain()
2716 dev_set_msi_domain(&dev->dev, d); in pci_set_msi_domain()
2725 device_initialize(&dev->dev); in pci_device_add()
2726 dev->dev.release = pci_release_dev; in pci_device_add()
2728 set_dev_node(&dev->dev, pcibus_to_node(bus)); in pci_device_add()
2729 dev->dev.dma_mask = &dev->dma_mask; in pci_device_add()
2730 dev->dev.dma_parms = &dev->dma_parms; in pci_device_add()
2731 dev->dev.coherent_dma_mask = 0xffffffffull; in pci_device_add()
2733 dma_set_max_seg_size(&dev->dev, 65536); in pci_device_add()
2734 dma_set_seg_boundary(&dev->dev, 0xffffffff); in pci_device_add()
2743 dev->state_saved = false; in pci_device_add()
2752 list_add_tail(&dev->bus_list, &bus->devices); in pci_device_add()
2762 ret = device_add(&dev->dev); in pci_device_add()
2797 return -ENODEV; in next_ari_fn()
2801 return -ENODEV; in next_ari_fn()
2806 return -ENODEV; /* protect against malformed list */ in next_ari_fn()
2817 return -ENODEV; in next_fn()
2819 if (dev && !dev->multifunction) in next_fn()
2820 return -ENODEV; in next_fn()
2827 struct pci_dev *bridge = bus->self; in only_one_child()
2831 * we scan for all possible devices, not just Device 0. in only_one_child()
2838 * 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan in only_one_child()
2848 * pci_scan_slot - Scan a PCI slot on a bus for devices
2849 * @bus: PCI bus to scan
2850 * @devfn: slot number to scan (must have zero function)
2852 * Scan a PCI slot on the specified PCI bus for devices, adding
2853 * discovered devices to the @bus->devices list. New devices
2872 dev->multifunction = 1; in pci_scan_slot()
2886 if (bus->self && nr) in pci_scan_slot()
2887 pcie_aspm_init_link_state(bus->self); in pci_scan_slot()
2902 * drivers attached. A hot-added device might support only the minimum in pcie_find_smpss()
2904 * where devices may be hot-added, we limit the fabric MPS to 128 so in pcie_find_smpss()
2905 * hot-added devices will work correctly. in pcie_find_smpss()
2907 * However, if we hot-add a device to a slot directly below a Root in pcie_find_smpss()
2910 * reconfigure MPS on both the Root Port and the hot-added device, in pcie_find_smpss()
2913 * Note that this PCIE_BUS_SAFE path assumes no peer-to-peer DMA. in pcie_find_smpss()
2915 if (dev->is_hotplug_bridge && in pcie_find_smpss()
2919 if (*smpss > dev->pcie_mpss) in pcie_find_smpss()
2920 *smpss = dev->pcie_mpss; in pcie_find_smpss()
2930 mps = 128 << dev->pcie_mpss; in pcie_write_mps()
2933 dev->bus->self) in pcie_write_mps()
2948 mps = min(mps, pcie_get_mps(dev->bus->self)); in pcie_write_mps()
3012 pcie_get_mps(dev), 128 << dev->pcie_mpss, in pcie_bus_configure_set()
3019 * pcie_bus_configure_settings() requires that pci_walk_bus work in a top-down,
3027 if (!bus->self) in pcie_bus_configure_settings()
3030 if (!pci_is_pcie(bus->self)) in pcie_bus_configure_settings()
3034 * FIXME - Peer to peer DMA is possible, though the endpoint would need in pcie_bus_configure_settings()
3042 smpss = bus->self->pcie_mpss; in pcie_bus_configure_settings()
3044 pcie_find_smpss(bus->self, &smpss); in pcie_bus_configure_settings()
3048 pcie_bus_configure_set(bus->self, &smpss); in pcie_bus_configure_settings()
3063 * pci_scan_child_bus_extend() - Scan devices below a bus
3064 * @bus: Bus to scan for devices
3071 * equally between hotplug-capable bridges to allow future extension of the
3078 unsigned int start = bus->busn_res.start; in pci_scan_child_bus_extend()
3082 dev_dbg(&bus->dev, "scanning bus\n"); in pci_scan_child_bus_extend()
3088 /* Reserve buses for SR-IOV capability */ in pci_scan_child_bus_extend()
3093 * After performing arch-dependent fixup of the bus, look behind in pci_scan_child_bus_extend()
3094 * all PCI-to-PCI bridges on this bus. in pci_scan_child_bus_extend()
3096 if (!bus->is_added) { in pci_scan_child_bus_extend()
3097 dev_dbg(&bus->dev, "fixups for bus\n"); in pci_scan_child_bus_extend()
3099 bus->is_added = 1; in pci_scan_child_bus_extend()
3108 if (dev->is_hotplug_bridge) in pci_scan_child_bus_extend()
3115 * Scan bridges that are already configured. We don't touch them in pci_scan_child_bus_extend()
3117 * scan below). in pci_scan_child_bus_extend()
3125 * hotplug bridges too much during the second scan below. in pci_scan_child_bus_extend()
3128 if (max - cmax > 1) in pci_scan_child_bus_extend()
3129 used_buses += max - cmax - 1; in pci_scan_child_bus_extend()
3132 /* Scan bridges that need to be reconfigured */ in pci_scan_child_bus_extend()
3144 } else if (dev->is_hotplug_bridge) { in pci_scan_child_bus_extend()
3150 buses = min(buses, available_buses - used_buses + 1); in pci_scan_child_bus_extend()
3156 if (max - cmax > 1) in pci_scan_child_bus_extend()
3157 used_buses += max - cmax - 1; in pci_scan_child_bus_extend()
3165 if (bus->self && bus->self->is_hotplug_bridge) { in pci_scan_child_bus_extend()
3167 pci_hotplug_bus_size - 1); in pci_scan_child_bus_extend()
3168 if (max - start < used_buses) { in pci_scan_child_bus_extend()
3172 if (max > bus->busn_res.end) in pci_scan_child_bus_extend()
3173 max = bus->busn_res.end; in pci_scan_child_bus_extend()
3175 dev_dbg(&bus->dev, "%pR extended by %#02x\n", in pci_scan_child_bus_extend()
3176 &bus->busn_res, max - start); in pci_scan_child_bus_extend()
3185 * Return how far we've got finding sub-buses. in pci_scan_child_bus_extend()
3187 dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max); in pci_scan_child_bus_extend()
3192 * pci_scan_child_bus() - Scan devices below a bus
3193 * @bus: Bus to scan for devices
3205 * pcibios_root_bridge_prepare - Platform-specific host bridge setup
3208 * Default empty implementation. Replace with an architecture-specific setup
3234 bridge->dev.parent = parent; in pci_create_root_bus()
3236 list_splice_init(resources, &bridge->windows); in pci_create_root_bus()
3237 bridge->sysdata = sysdata; in pci_create_root_bus()
3238 bridge->busnr = bus; in pci_create_root_bus()
3239 bridge->ops = ops; in pci_create_root_bus()
3245 return bridge->bus; in pci_create_root_bus()
3248 put_device(&bridge->dev); in pci_create_root_bus()
3262 dev_err(bridge->dev.parent, "Scanning root bridge failed"); in pci_host_probe()
3266 bus = bridge->bus; in pci_host_probe()
3269 if (bridge->preserve_config) in pci_host_probe()
3278 list_for_each_entry(child, &bus->children, node) in pci_host_probe()
3291 pm_runtime_set_active(&bridge->dev); in pci_host_probe()
3292 pm_runtime_no_callbacks(&bridge->dev); in pci_host_probe()
3293 devm_pm_runtime_enable(&bridge->dev); in pci_host_probe()
3301 struct resource *res = &b->busn_res; in pci_bus_insert_busn_res()
3304 res->start = bus; in pci_bus_insert_busn_res()
3305 res->end = bus_max; in pci_bus_insert_busn_res()
3306 res->flags = IORESOURCE_BUS; in pci_bus_insert_busn_res()
3309 parent_res = &b->parent->busn_res; in pci_bus_insert_busn_res()
3312 res->flags |= IORESOURCE_PCI_FIXED; in pci_bus_insert_busn_res()
3318 dev_info(&b->dev, in pci_bus_insert_busn_res()
3321 parent_res, conflict->name, conflict); in pci_bus_insert_busn_res()
3328 struct resource *res = &b->busn_res; in pci_bus_update_busn_res_end()
3333 if (res->start > bus_max) in pci_bus_update_busn_res_end()
3334 return -EINVAL; in pci_bus_update_busn_res_end()
3336 size = bus_max - res->start + 1; in pci_bus_update_busn_res_end()
3337 ret = adjust_resource(res, res->start, size); in pci_bus_update_busn_res_end()
3338 dev_info(&b->dev, "busn_res: %pR end %s updated to %02x\n", in pci_bus_update_busn_res_end()
3341 if (!ret && !res->parent) in pci_bus_update_busn_res_end()
3342 pci_bus_insert_busn_res(b, res->start, res->end); in pci_bus_update_busn_res_end()
3349 struct resource *res = &b->busn_res; in pci_bus_release_busn_res()
3352 if (!res->flags || !res->parent) in pci_bus_release_busn_res()
3356 dev_info(&b->dev, "busn_res: %pR %s released\n", in pci_bus_release_busn_res()
3368 return -EINVAL; in pci_scan_root_bus_bridge()
3370 resource_list_for_each_entry(window, &bridge->windows) in pci_scan_root_bus_bridge()
3371 if (window->res->flags & IORESOURCE_BUS) { in pci_scan_root_bus_bridge()
3372 bridge->busnr = window->res->start; in pci_scan_root_bus_bridge()
3381 b = bridge->bus; in pci_scan_root_bus_bridge()
3382 bus = bridge->busnr; in pci_scan_root_bus_bridge()
3385 dev_info(&b->dev, in pci_scan_root_bus_bridge()
3386 "No busn resource found for root bus, will use [bus %02x-ff]\n", in pci_scan_root_bus_bridge()
3409 if (window->res->flags & IORESOURCE_BUS) { in pci_scan_root_bus()
3419 dev_info(&b->dev, in pci_scan_root_bus()
3420 "No busn resource found for root bus, will use [bus %02x-ff]\n", in pci_scan_root_bus()
3454 * pci_rescan_bus_bridge_resize - Scan a PCI bus for devices
3455 * @bridge: PCI bridge for the bus to scan
3457 * Scan a PCI bus and child buses for new devices, add them,
3467 struct pci_bus *bus = bridge->subordinate; in pci_rescan_bus_bridge_resize()
3479 * pci_rescan_bus - Scan a PCI bus for devices
3480 * @bus: PCI bus to scan
3482 * Scan a PCI bus and child buses for new devices, add them,
3523 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1; in pci_sort_bf_cmp()
3524 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1; in pci_sort_bf_cmp()
3526 if (a->bus->number < b->bus->number) return -1; in pci_sort_bf_cmp()
3527 else if (a->bus->number > b->bus->number) return 1; in pci_sort_bf_cmp()
3529 if (a->devfn < b->devfn) return -1; in pci_sort_bf_cmp()
3530 else if (a->devfn > b->devfn) return 1; in pci_sort_bf_cmp()
3542 struct pci_bus *parent = dev->bus; in pci_hp_add_bridge()
3543 int busnr, start = parent->busn_res.start; in pci_hp_add_bridge()
3545 int end = parent->busn_res.end; in pci_hp_add_bridge()
3551 if (busnr-- > end) { in pci_hp_add_bridge()
3552 pci_err(dev, "No bus number available for hot-added bridge\n"); in pci_hp_add_bridge()
3553 return -1; in pci_hp_add_bridge()
3556 /* Scan bridges that are already configured */ in pci_hp_add_bridge()
3560 * Distribute the available bus numbers between hotplug-capable in pci_hp_add_bridge()
3563 available_buses = end - busnr; in pci_hp_add_bridge()
3565 /* Scan bridges that need to be reconfigured */ in pci_hp_add_bridge()
3568 if (!dev->subordinate) in pci_hp_add_bridge()
3569 return -1; in pci_hp_add_bridge()